xref: /linux/arch/s390/kernel/entry.S (revision 5499b45190237ca90dd2ac86395cf464fe1f4cc7)
1/*
2 *  arch/s390/kernel/entry.S
3 *    S390 low-level entry points.
4 *
5 *    Copyright (C) IBM Corp. 1999,2006
6 *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 *		 Hartmut Penner (hp@de.ibm.com),
8 *		 Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 *		 Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
11
12#include <linux/sys.h>
13#include <linux/linkage.h>
14#include <linux/init.h>
15#include <asm/cache.h>
16#include <asm/errno.h>
17#include <asm/ptrace.h>
18#include <asm/thread_info.h>
19#include <asm/asm-offsets.h>
20#include <asm/unistd.h>
21#include <asm/page.h>
22
23/*
24 * Stack layout for the system_call stack entry.
25 * The first few entries are identical to the user_regs_struct.
26 */
27SP_PTREGS    =	STACK_FRAME_OVERHEAD
28SP_ARGS      =	STACK_FRAME_OVERHEAD + __PT_ARGS
29SP_PSW	     =	STACK_FRAME_OVERHEAD + __PT_PSW
30SP_R0	     =	STACK_FRAME_OVERHEAD + __PT_GPRS
31SP_R1	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 4
32SP_R2	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33SP_R3	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 12
34SP_R4	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 16
35SP_R5	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 20
36SP_R6	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 24
37SP_R7	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 28
38SP_R8	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 32
39SP_R9	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 36
40SP_R10	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 40
41SP_R11	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 44
42SP_R12	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 48
43SP_R13	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 52
44SP_R14	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 56
45SP_R15	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 60
46SP_ORIG_R2   =	STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
47SP_ILC	     =	STACK_FRAME_OVERHEAD + __PT_ILC
48SP_SVCNR     =	STACK_FRAME_OVERHEAD + __PT_SVCNR
49SP_SIZE      =	STACK_FRAME_OVERHEAD + __PT_SIZE
50
51_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
52		 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
53_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
54		 _TIF_MCCK_PENDING)
55_TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
56		_TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8)
57
58STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
59STACK_SIZE  = 1 << STACK_SHIFT
60
61#define BASED(name) name-system_call(%r13)
62
63#ifdef CONFIG_TRACE_IRQFLAGS
64	.macro	TRACE_IRQS_ON
65	basr	%r2,%r0
66	l	%r1,BASED(.Ltrace_irq_on_caller)
67	basr	%r14,%r1
68	.endm
69
70	.macro	TRACE_IRQS_OFF
71	basr	%r2,%r0
72	l	%r1,BASED(.Ltrace_irq_off_caller)
73	basr	%r14,%r1
74	.endm
75
76	.macro	TRACE_IRQS_CHECK
77	basr	%r2,%r0
78	tm	SP_PSW(%r15),0x03	# irqs enabled?
79	jz	0f
80	l	%r1,BASED(.Ltrace_irq_on_caller)
81	basr	%r14,%r1
82	j	1f
830:	l	%r1,BASED(.Ltrace_irq_off_caller)
84	basr	%r14,%r1
851:
86	.endm
87#else
88#define TRACE_IRQS_ON
89#define TRACE_IRQS_OFF
90#define TRACE_IRQS_CHECK
91#endif
92
93#ifdef CONFIG_LOCKDEP
94	.macro	LOCKDEP_SYS_EXIT
95	tm	SP_PSW+1(%r15),0x01	# returning to user ?
96	jz	0f
97	l	%r1,BASED(.Llockdep_sys_exit)
98	basr	%r14,%r1
990:
100	.endm
101#else
102#define LOCKDEP_SYS_EXIT
103#endif
104
105/*
106 * Register usage in interrupt handlers:
107 *    R9  - pointer to current task structure
108 *    R13 - pointer to literal pool
109 *    R14 - return register for function calls
110 *    R15 - kernel stack pointer
111 */
112
113	.macro	UPDATE_VTIME lc_from,lc_to,lc_sum
114	lm	%r10,%r11,\lc_from
115	sl	%r10,\lc_to
116	sl	%r11,\lc_to+4
117	bc	3,BASED(0f)
118	sl	%r10,BASED(.Lc_1)
1190:	al	%r10,\lc_sum
120	al	%r11,\lc_sum+4
121	bc	12,BASED(1f)
122	al	%r10,BASED(.Lc_1)
1231:	stm	%r10,%r11,\lc_sum
124	.endm
125
126	.macro	SAVE_ALL_BASE savearea
127	stm	%r12,%r15,\savearea
128	l	%r13,__LC_SVC_NEW_PSW+4	# load &system_call to %r13
129	.endm
130
131	.macro	SAVE_ALL_SVC psworg,savearea
132	la	%r12,\psworg
133	l	%r15,__LC_KERNEL_STACK	# problem state -> load ksp
134	.endm
135
136	.macro	SAVE_ALL_SYNC psworg,savearea
137	la	%r12,\psworg
138	tm	\psworg+1,0x01		# test problem state bit
139	bz	BASED(2f)		# skip stack setup save
140	l	%r15,__LC_KERNEL_STACK	# problem state -> load ksp
141#ifdef CONFIG_CHECK_STACK
142	b	BASED(3f)
1432:	tml	%r15,STACK_SIZE - CONFIG_STACK_GUARD
144	bz	BASED(stack_overflow)
1453:
146#endif
1472:
148	.endm
149
150	.macro	SAVE_ALL_ASYNC psworg,savearea
151	la	%r12,\psworg
152	tm	\psworg+1,0x01		# test problem state bit
153	bnz	BASED(1f)		# from user -> load async stack
154	clc	\psworg+4(4),BASED(.Lcritical_end)
155	bhe	BASED(0f)
156	clc	\psworg+4(4),BASED(.Lcritical_start)
157	bl	BASED(0f)
158	l	%r14,BASED(.Lcleanup_critical)
159	basr	%r14,%r14
160	tm	1(%r12),0x01		# retest problem state after cleanup
161	bnz	BASED(1f)
1620:	l	%r14,__LC_ASYNC_STACK	# are we already on the async stack ?
163	slr	%r14,%r15
164	sra	%r14,STACK_SHIFT
165	be	BASED(2f)
1661:	l	%r15,__LC_ASYNC_STACK
167#ifdef CONFIG_CHECK_STACK
168	b	BASED(3f)
1692:	tml	%r15,STACK_SIZE - CONFIG_STACK_GUARD
170	bz	BASED(stack_overflow)
1713:
172#endif
1732:
174	.endm
175
176	.macro	CREATE_STACK_FRAME psworg,savearea
177	s	%r15,BASED(.Lc_spsize)	# make room for registers & psw
178	mvc	SP_PSW(8,%r15),0(%r12)	# move user PSW to stack
179	st	%r2,SP_ORIG_R2(%r15)	# store original content of gpr 2
180	icm	%r12,3,__LC_SVC_ILC
181	stm	%r0,%r11,SP_R0(%r15)	# store gprs %r0-%r11 to kernel stack
182	st	%r12,SP_SVCNR(%r15)
183	mvc	SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
184	la	%r12,0
185	st	%r12,__SF_BACKCHAIN(%r15)	# clear back chain
186	.endm
187
188	.macro	RESTORE_ALL psworg,sync
189	mvc	\psworg(8),SP_PSW(%r15) # move user PSW to lowcore
190	.if !\sync
191	ni	\psworg+1,0xfd		# clear wait state bit
192	.endif
193	lm	%r0,%r15,SP_R0(%r15)	# load gprs 0-15 of user
194	stpt	__LC_EXIT_TIMER
195	lpsw	\psworg			# back to caller
196	.endm
197
198/*
199 * Scheduler resume function, called by switch_to
200 *  gpr2 = (task_struct *) prev
201 *  gpr3 = (task_struct *) next
202 * Returns:
203 *  gpr2 = prev
204 */
205	.globl	__switch_to
206__switch_to:
207	basr	%r1,0
208__switch_to_base:
209	tm	__THREAD_per(%r3),0xe8		# new process is using per ?
210	bz	__switch_to_noper-__switch_to_base(%r1)	# if not we're fine
211	stctl	%c9,%c11,__SF_EMPTY(%r15)	# We are using per stuff
212	clc	__THREAD_per(12,%r3),__SF_EMPTY(%r15)
213	be	__switch_to_noper-__switch_to_base(%r1)	# we got away w/o bashing TLB's
214	lctl	%c9,%c11,__THREAD_per(%r3)	# Nope we didn't
215__switch_to_noper:
216	l	%r4,__THREAD_info(%r2)		# get thread_info of prev
217	tm	__TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?
218	bz	__switch_to_no_mcck-__switch_to_base(%r1)
219	ni	__TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
220	l	%r4,__THREAD_info(%r3)		# get thread_info of next
221	oi	__TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next
222__switch_to_no_mcck:
223	stm	%r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
224	st	%r15,__THREAD_ksp(%r2)	# store kernel stack to prev->tss.ksp
225	l	%r15,__THREAD_ksp(%r3)	# load kernel stack from next->tss.ksp
226	lm	%r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
227	st	%r3,__LC_CURRENT	# __LC_CURRENT = current task struct
228	lctl	%c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
229	l	%r3,__THREAD_info(%r3)	# load thread_info from task struct
230	st	%r3,__LC_THREAD_INFO
231	ahi	%r3,STACK_SIZE
232	st	%r3,__LC_KERNEL_STACK	# __LC_KERNEL_STACK = new kernel stack
233	br	%r14
234
235__critical_start:
236/*
237 * SVC interrupt handler routine. System calls are synchronous events and
238 * are executed with interrupts enabled.
239 */
240
241	.globl	system_call
242system_call:
243	stpt	__LC_SYNC_ENTER_TIMER
244sysc_saveall:
245	SAVE_ALL_BASE __LC_SAVE_AREA
246	SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
247	CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
248	lh	%r7,0x8a	  # get svc number from lowcore
249sysc_vtime:
250	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
251sysc_stime:
252	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
253sysc_update:
254	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
255sysc_do_svc:
256	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
257	ltr	%r7,%r7			# test for svc 0
258	bnz	BASED(sysc_nr_ok)	# svc number > 0
259	# svc 0: system call number in %r1
260	cl	%r1,BASED(.Lnr_syscalls)
261	bnl	BASED(sysc_nr_ok)
262	lr	%r7,%r1 	  # copy svc number to %r7
263sysc_nr_ok:
264	mvc	SP_ARGS(4,%r15),SP_R7(%r15)
265sysc_do_restart:
266	sth	%r7,SP_SVCNR(%r15)
267	sll	%r7,2		  # svc number *4
268	l	%r8,BASED(.Lsysc_table)
269	tm	__TI_flags+2(%r9),_TIF_SYSCALL
270	l	%r8,0(%r7,%r8)	  # get system call addr.
271	bnz	BASED(sysc_tracesys)
272	basr	%r14,%r8	  # call sys_xxxx
273	st	%r2,SP_R2(%r15)   # store return value (change R2 on stack)
274
275sysc_return:
276	tm	__TI_flags+3(%r9),_TIF_WORK_SVC
277	bnz	BASED(sysc_work)  # there is work to do (signals etc.)
278sysc_restore:
279#ifdef CONFIG_TRACE_IRQFLAGS
280	la	%r1,BASED(sysc_restore_trace_psw_addr)
281	l	%r1,0(%r1)
282	lpsw	0(%r1)
283sysc_restore_trace:
284	TRACE_IRQS_CHECK
285	LOCKDEP_SYS_EXIT
286#endif
287sysc_leave:
288	RESTORE_ALL __LC_RETURN_PSW,1
289sysc_done:
290
291#ifdef CONFIG_TRACE_IRQFLAGS
292sysc_restore_trace_psw_addr:
293	.long sysc_restore_trace_psw
294
295	.section .data,"aw",@progbits
296	.align	8
297	.globl	sysc_restore_trace_psw
298sysc_restore_trace_psw:
299	.long	0, sysc_restore_trace + 0x80000000
300	.previous
301#endif
302
303#
304# recheck if there is more work to do
305#
306sysc_work_loop:
307	tm	__TI_flags+3(%r9),_TIF_WORK_SVC
308	bz	BASED(sysc_restore)	# there is no work to do
309#
310# One of the work bits is on. Find out which one.
311#
312sysc_work:
313	tm	SP_PSW+1(%r15),0x01	# returning to user ?
314	bno	BASED(sysc_restore)
315	tm	__TI_flags+3(%r9),_TIF_MCCK_PENDING
316	bo	BASED(sysc_mcck_pending)
317	tm	__TI_flags+3(%r9),_TIF_NEED_RESCHED
318	bo	BASED(sysc_reschedule)
319	tm	__TI_flags+3(%r9),_TIF_SIGPENDING
320	bnz	BASED(sysc_sigpending)
321	tm	__TI_flags+3(%r9),_TIF_NOTIFY_RESUME
322	bnz	BASED(sysc_notify_resume)
323	tm	__TI_flags+3(%r9),_TIF_RESTART_SVC
324	bo	BASED(sysc_restart)
325	tm	__TI_flags+3(%r9),_TIF_SINGLE_STEP
326	bo	BASED(sysc_singlestep)
327	b	BASED(sysc_restore)
328sysc_work_done:
329
330#
331# _TIF_NEED_RESCHED is set, call schedule
332#
333sysc_reschedule:
334	l	%r1,BASED(.Lschedule)
335	la	%r14,BASED(sysc_work_loop)
336	br	%r1			# call scheduler
337
338#
339# _TIF_MCCK_PENDING is set, call handler
340#
341sysc_mcck_pending:
342	l	%r1,BASED(.Ls390_handle_mcck)
343	la	%r14,BASED(sysc_work_loop)
344	br	%r1			# TIF bit will be cleared by handler
345
346#
347# _TIF_SIGPENDING is set, call do_signal
348#
349sysc_sigpending:
350	ni	__TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
351	la	%r2,SP_PTREGS(%r15)	# load pt_regs
352	l	%r1,BASED(.Ldo_signal)
353	basr	%r14,%r1		# call do_signal
354	tm	__TI_flags+3(%r9),_TIF_RESTART_SVC
355	bo	BASED(sysc_restart)
356	tm	__TI_flags+3(%r9),_TIF_SINGLE_STEP
357	bo	BASED(sysc_singlestep)
358	b	BASED(sysc_work_loop)
359
360#
361# _TIF_NOTIFY_RESUME is set, call do_notify_resume
362#
363sysc_notify_resume:
364	la	%r2,SP_PTREGS(%r15)	# load pt_regs
365	l	%r1,BASED(.Ldo_notify_resume)
366	la	%r14,BASED(sysc_work_loop)
367	br	%r1			# call do_notify_resume
368
369
370#
371# _TIF_RESTART_SVC is set, set up registers and restart svc
372#
373sysc_restart:
374	ni	__TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
375	l	%r7,SP_R2(%r15) 	# load new svc number
376	mvc	SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
377	lm	%r2,%r6,SP_R2(%r15)	# load svc arguments
378	b	BASED(sysc_do_restart)	# restart svc
379
380#
381# _TIF_SINGLE_STEP is set, call do_single_step
382#
383sysc_singlestep:
384	ni	__TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
385	mvi	SP_SVCNR(%r15),0xff	# set trap indication to pgm check
386	mvi	SP_SVCNR+1(%r15),0xff
387	la	%r2,SP_PTREGS(%r15)	# address of register-save area
388	l	%r1,BASED(.Lhandle_per)	# load adr. of per handler
389	la	%r14,BASED(sysc_return)	# load adr. of system return
390	br	%r1			# branch to do_single_step
391
392#
393# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
394# and after the system call
395#
396sysc_tracesys:
397	l	%r1,BASED(.Ltrace_entry)
398	la	%r2,SP_PTREGS(%r15)	# load pt_regs
399	la	%r3,0
400	srl	%r7,2
401	st	%r7,SP_R2(%r15)
402	basr	%r14,%r1
403	cl	%r2,BASED(.Lnr_syscalls)
404	bnl	BASED(sysc_tracenogo)
405	l	%r8,BASED(.Lsysc_table)
406	lr	%r7,%r2
407	sll	%r7,2			# svc number *4
408	l	%r8,0(%r7,%r8)
409sysc_tracego:
410	lm	%r3,%r6,SP_R3(%r15)
411	l	%r2,SP_ORIG_R2(%r15)
412	basr	%r14,%r8		# call sys_xxx
413	st	%r2,SP_R2(%r15)		# store return value
414sysc_tracenogo:
415	tm	__TI_flags+2(%r9),_TIF_SYSCALL
416	bz	BASED(sysc_return)
417	l	%r1,BASED(.Ltrace_exit)
418	la	%r2,SP_PTREGS(%r15)	# load pt_regs
419	la	%r14,BASED(sysc_return)
420	br	%r1
421
422#
423# a new process exits the kernel with ret_from_fork
424#
425	.globl	ret_from_fork
426ret_from_fork:
427	l	%r13,__LC_SVC_NEW_PSW+4
428	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
429	tm	SP_PSW+1(%r15),0x01	# forking a kernel thread ?
430	bo	BASED(0f)
431	st	%r15,SP_R15(%r15)	# store stack pointer for new kthread
4320:	l	%r1,BASED(.Lschedtail)
433	basr	%r14,%r1
434	TRACE_IRQS_ON
435	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
436	b	BASED(sysc_tracenogo)
437
438#
439# kernel_execve function needs to deal with pt_regs that is not
440# at the usual place
441#
442	.globl	kernel_execve
443kernel_execve:
444	stm	%r12,%r15,48(%r15)
445	lr	%r14,%r15
446	l	%r13,__LC_SVC_NEW_PSW+4
447	s	%r15,BASED(.Lc_spsize)
448	st	%r14,__SF_BACKCHAIN(%r15)
449	la	%r12,SP_PTREGS(%r15)
450	xc	0(__PT_SIZE,%r12),0(%r12)
451	l	%r1,BASED(.Ldo_execve)
452	lr	%r5,%r12
453	basr	%r14,%r1
454	ltr	%r2,%r2
455	be	BASED(0f)
456	a	%r15,BASED(.Lc_spsize)
457	lm	%r12,%r15,48(%r15)
458	br	%r14
459	# execve succeeded.
4600:	stnsm	__SF_EMPTY(%r15),0xfc	# disable interrupts
461	l	%r15,__LC_KERNEL_STACK	# load ksp
462	s	%r15,BASED(.Lc_spsize)	# make room for registers & psw
463	l	%r9,__LC_THREAD_INFO
464	mvc	SP_PTREGS(__PT_SIZE,%r15),0(%r12)	# copy pt_regs
465	xc	__SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
466	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
467	l	%r1,BASED(.Lexecve_tail)
468	basr	%r14,%r1
469	b	BASED(sysc_return)
470
471/*
472 * Program check handler routine
473 */
474
475	.globl	pgm_check_handler
476pgm_check_handler:
477/*
478 * First we need to check for a special case:
479 * Single stepping an instruction that disables the PER event mask will
480 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
481 * For a single stepped SVC the program check handler gets control after
482 * the SVC new PSW has been loaded. But we want to execute the SVC first and
483 * then handle the PER event. Therefore we update the SVC old PSW to point
484 * to the pgm_check_handler and branch to the SVC handler after we checked
485 * if we have to load the kernel stack register.
486 * For every other possible cause for PER event without the PER mask set
487 * we just ignore the PER event (FIXME: is there anything we have to do
488 * for LPSW?).
489 */
490	stpt	__LC_SYNC_ENTER_TIMER
491	SAVE_ALL_BASE __LC_SAVE_AREA
492	tm	__LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
493	bnz	BASED(pgm_per)		# got per exception -> special case
494	SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
495	CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
496	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
497	bz	BASED(pgm_no_vtime)
498	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
499	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
500	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
501pgm_no_vtime:
502	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
503	TRACE_IRQS_OFF
504	l	%r3,__LC_PGM_ILC	# load program interruption code
505	la	%r8,0x7f
506	nr	%r8,%r3
507pgm_do_call:
508	l	%r7,BASED(.Ljump_table)
509	sll	%r8,2
510	l	%r7,0(%r8,%r7)		# load address of handler routine
511	la	%r2,SP_PTREGS(%r15)	# address of register-save area
512	la	%r14,BASED(sysc_return)
513	br	%r7			# branch to interrupt-handler
514
515#
516# handle per exception
517#
518pgm_per:
519	tm	__LC_PGM_OLD_PSW,0x40	# test if per event recording is on
520	bnz	BASED(pgm_per_std)	# ok, normal per event from user space
521# ok its one of the special cases, now we need to find out which one
522	clc	__LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
523	be	BASED(pgm_svcper)
524# no interesting special case, ignore PER event
525	lm	%r12,%r15,__LC_SAVE_AREA
526	lpsw	0x28
527
528#
529# Normal per exception
530#
531pgm_per_std:
532	SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
533	CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
534	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
535	bz	BASED(pgm_no_vtime2)
536	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
537	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
538	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
539pgm_no_vtime2:
540	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
541	TRACE_IRQS_OFF
542	l	%r1,__TI_task(%r9)
543	mvc	__THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
544	mvc	__THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
545	mvc	__THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
546	oi	__TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
547	tm	SP_PSW+1(%r15),0x01	# kernel per event ?
548	bz	BASED(kernel_per)
549	l	%r3,__LC_PGM_ILC	# load program interruption code
550	la	%r8,0x7f
551	nr	%r8,%r3 		# clear per-event-bit and ilc
552	be	BASED(sysc_return)	# only per or per+check ?
553	b	BASED(pgm_do_call)
554
555#
556# it was a single stepped SVC that is causing all the trouble
557#
558pgm_svcper:
559	SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
560	CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
561	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
562	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
563	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
564	lh	%r7,0x8a		# get svc number from lowcore
565	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
566	TRACE_IRQS_OFF
567	l	%r8,__TI_task(%r9)
568	mvc	__THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID
569	mvc	__THREAD_per+__PER_address(4,%r8),__LC_PER_ADDRESS
570	mvc	__THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
571	oi	__TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
572	TRACE_IRQS_ON
573	lm	%r2,%r6,SP_R2(%r15)	# load svc arguments
574	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
575	b	BASED(sysc_do_svc)
576
577#
578# per was called from kernel, must be kprobes
579#
580kernel_per:
581	mvi	SP_SVCNR(%r15),0xff	# set trap indication to pgm check
582	mvi	SP_SVCNR+1(%r15),0xff
583	la	%r2,SP_PTREGS(%r15)	# address of register-save area
584	l	%r1,BASED(.Lhandle_per)	# load adr. of per handler
585	la	%r14,BASED(sysc_restore)# load adr. of system return
586	br	%r1			# branch to do_single_step
587
588/*
589 * IO interrupt handler routine
590 */
591
592	.globl io_int_handler
593io_int_handler:
594	stck	__LC_INT_CLOCK
595	stpt	__LC_ASYNC_ENTER_TIMER
596	SAVE_ALL_BASE __LC_SAVE_AREA+16
597	SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
598	CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
599	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
600	bz	BASED(io_no_vtime)
601	UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
602	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
603	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
604io_no_vtime:
605	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
606	TRACE_IRQS_OFF
607	l	%r1,BASED(.Ldo_IRQ)	# load address of do_IRQ
608	la	%r2,SP_PTREGS(%r15)	# address of register-save area
609	basr	%r14,%r1		# branch to standard irq handler
610io_return:
611	tm	__TI_flags+3(%r9),_TIF_WORK_INT
612	bnz	BASED(io_work)		# there is work to do (signals etc.)
613io_restore:
614#ifdef CONFIG_TRACE_IRQFLAGS
615	la	%r1,BASED(io_restore_trace_psw_addr)
616	l	%r1,0(%r1)
617	lpsw	0(%r1)
618io_restore_trace:
619	TRACE_IRQS_CHECK
620	LOCKDEP_SYS_EXIT
621#endif
622io_leave:
623	RESTORE_ALL __LC_RETURN_PSW,0
624io_done:
625
626#ifdef CONFIG_TRACE_IRQFLAGS
627io_restore_trace_psw_addr:
628	.long io_restore_trace_psw
629
630	.section .data,"aw",@progbits
631	.align	8
632	.globl	io_restore_trace_psw
633io_restore_trace_psw:
634	.long	0, io_restore_trace + 0x80000000
635	.previous
636#endif
637
638#
639# switch to kernel stack, then check the TIF bits
640#
641io_work:
642	tm	SP_PSW+1(%r15),0x01	# returning to user ?
643#ifndef CONFIG_PREEMPT
644	bno	BASED(io_restore)	# no-> skip resched & signal
645#else
646	bnz	BASED(io_work_user)	# no -> check for preemptive scheduling
647	# check for preemptive scheduling
648	icm	%r0,15,__TI_precount(%r9)
649	bnz	BASED(io_restore)	# preemption disabled
650	l	%r1,SP_R15(%r15)
651	s	%r1,BASED(.Lc_spsize)
652	mvc	SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
653	xc	__SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
654	lr	%r15,%r1
655io_resume_loop:
656	tm	__TI_flags+3(%r9),_TIF_NEED_RESCHED
657	bno	BASED(io_restore)
658	l	%r1,BASED(.Lpreempt_schedule_irq)
659	la	%r14,BASED(io_resume_loop)
660	br	%r1			# call schedule
661#endif
662
663io_work_user:
664	l	%r1,__LC_KERNEL_STACK
665	s	%r1,BASED(.Lc_spsize)
666	mvc	SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
667	xc	__SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
668	lr	%r15,%r1
669#
670# One of the work bits is on. Find out which one.
671# Checked are: _TIF_SIGPENDING, _TIF_NEED_RESCHED
672#		and _TIF_MCCK_PENDING
673#
674io_work_loop:
675	tm	__TI_flags+3(%r9),_TIF_MCCK_PENDING
676	bo	BASED(io_mcck_pending)
677	tm	__TI_flags+3(%r9),_TIF_NEED_RESCHED
678	bo	BASED(io_reschedule)
679	tm	__TI_flags+3(%r9),_TIF_SIGPENDING
680	bnz	BASED(io_sigpending)
681	tm	__TI_flags+3(%r9),_TIF_NOTIFY_RESUME
682	bnz	BASED(io_notify_resume)
683	b	BASED(io_restore)
684io_work_done:
685
686#
687# _TIF_MCCK_PENDING is set, call handler
688#
689io_mcck_pending:
690	l	%r1,BASED(.Ls390_handle_mcck)
691	basr	%r14,%r1		# TIF bit will be cleared by handler
692	b	BASED(io_work_loop)
693
694#
695# _TIF_NEED_RESCHED is set, call schedule
696#
697io_reschedule:
698	TRACE_IRQS_ON
699	l	%r1,BASED(.Lschedule)
700	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
701	basr	%r14,%r1		# call scheduler
702	stnsm	__SF_EMPTY(%r15),0xfc	# disable I/O and ext. interrupts
703	TRACE_IRQS_OFF
704	tm	__TI_flags+3(%r9),_TIF_WORK_INT
705	bz	BASED(io_restore)	# there is no work to do
706	b	BASED(io_work_loop)
707
708#
709# _TIF_SIGPENDING is set, call do_signal
710#
711io_sigpending:
712	TRACE_IRQS_ON
713	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
714	la	%r2,SP_PTREGS(%r15)	# load pt_regs
715	l	%r1,BASED(.Ldo_signal)
716	basr	%r14,%r1		# call do_signal
717	stnsm	__SF_EMPTY(%r15),0xfc	# disable I/O and ext. interrupts
718	TRACE_IRQS_OFF
719	b	BASED(io_work_loop)
720
721#
722# _TIF_SIGPENDING is set, call do_signal
723#
724io_notify_resume:
725	TRACE_IRQS_ON
726	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
727	la	%r2,SP_PTREGS(%r15)	# load pt_regs
728	l	%r1,BASED(.Ldo_notify_resume)
729	basr	%r14,%r1		# call do_signal
730	stnsm	__SF_EMPTY(%r15),0xfc	# disable I/O and ext. interrupts
731	TRACE_IRQS_OFF
732	b	BASED(io_work_loop)
733
734/*
735 * External interrupt handler routine
736 */
737
738	.globl	ext_int_handler
739ext_int_handler:
740	stck	__LC_INT_CLOCK
741	stpt	__LC_ASYNC_ENTER_TIMER
742	SAVE_ALL_BASE __LC_SAVE_AREA+16
743	SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
744	CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
745	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
746	bz	BASED(ext_no_vtime)
747	UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
748	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
749	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
750ext_no_vtime:
751	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
752	TRACE_IRQS_OFF
753	la	%r2,SP_PTREGS(%r15)	# address of register-save area
754	lh	%r3,__LC_EXT_INT_CODE	# get interruption code
755	l	%r1,BASED(.Ldo_extint)
756	basr	%r14,%r1
757	b	BASED(io_return)
758
759__critical_end:
760
761/*
762 * Machine check handler routines
763 */
764
765	.globl mcck_int_handler
766mcck_int_handler:
767	stck	__LC_INT_CLOCK
768	spt	__LC_CPU_TIMER_SAVE_AREA	# revalidate cpu timer
769	lm	%r0,%r15,__LC_GPREGS_SAVE_AREA	# revalidate gprs
770	SAVE_ALL_BASE __LC_SAVE_AREA+32
771	la	%r12,__LC_MCK_OLD_PSW
772	tm	__LC_MCCK_CODE,0x80	# system damage?
773	bo	BASED(mcck_int_main)	# yes -> rest of mcck code invalid
774	mvc	__LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER
775	mvc	__LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
776	tm	__LC_MCCK_CODE+5,0x02	# stored cpu timer value valid?
777	bo	BASED(1f)
778	la	%r14,__LC_SYNC_ENTER_TIMER
779	clc	0(8,%r14),__LC_ASYNC_ENTER_TIMER
780	bl	BASED(0f)
781	la	%r14,__LC_ASYNC_ENTER_TIMER
7820:	clc	0(8,%r14),__LC_EXIT_TIMER
783	bl	BASED(0f)
784	la	%r14,__LC_EXIT_TIMER
7850:	clc	0(8,%r14),__LC_LAST_UPDATE_TIMER
786	bl	BASED(0f)
787	la	%r14,__LC_LAST_UPDATE_TIMER
7880:	spt	0(%r14)
789	mvc	__LC_ASYNC_ENTER_TIMER(8),0(%r14)
7901:	tm	__LC_MCCK_CODE+2,0x09	# mwp + ia of old psw valid?
791	bno	BASED(mcck_int_main)	# no -> skip cleanup critical
792	tm	__LC_MCK_OLD_PSW+1,0x01	# test problem state bit
793	bnz	BASED(mcck_int_main)	# from user -> load async stack
794	clc	__LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end)
795	bhe	BASED(mcck_int_main)
796	clc	__LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start)
797	bl	BASED(mcck_int_main)
798	l	%r14,BASED(.Lcleanup_critical)
799	basr	%r14,%r14
800mcck_int_main:
801	l	%r14,__LC_PANIC_STACK	# are we already on the panic stack?
802	slr	%r14,%r15
803	sra	%r14,PAGE_SHIFT
804	be	BASED(0f)
805	l	%r15,__LC_PANIC_STACK	# load panic stack
8060:	CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
807	tm	__LC_MCCK_CODE+2,0x08	# mwp of old psw valid?
808	bno	BASED(mcck_no_vtime)	# no -> skip cleanup critical
809	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
810	bz	BASED(mcck_no_vtime)
811	UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
812	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
813	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
814mcck_no_vtime:
815	l	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
816	la	%r2,SP_PTREGS(%r15)	# load pt_regs
817	l	%r1,BASED(.Ls390_mcck)
818	basr	%r14,%r1		# call machine check handler
819	tm	SP_PSW+1(%r15),0x01	# returning to user ?
820	bno	BASED(mcck_return)
821	l	%r1,__LC_KERNEL_STACK	# switch to kernel stack
822	s	%r1,BASED(.Lc_spsize)
823	mvc	SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
824	xc	__SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
825	lr	%r15,%r1
826	stosm	__SF_EMPTY(%r15),0x04	# turn dat on
827	tm	__TI_flags+3(%r9),_TIF_MCCK_PENDING
828	bno	BASED(mcck_return)
829	TRACE_IRQS_OFF
830	l	%r1,BASED(.Ls390_handle_mcck)
831	basr	%r14,%r1		# call machine check handler
832	TRACE_IRQS_ON
833mcck_return:
834	mvc	__LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
835	ni	__LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
836	mvc	__LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52
837	tm	__LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
838	bno	BASED(0f)
839	lm	%r0,%r15,SP_R0(%r15)	# load gprs 0-15
840	stpt	__LC_EXIT_TIMER
841	lpsw	__LC_RETURN_MCCK_PSW	# back to caller
8420:	lm	%r0,%r15,SP_R0(%r15)	# load gprs 0-15
843	lpsw	__LC_RETURN_MCCK_PSW	# back to caller
844
845	RESTORE_ALL __LC_RETURN_MCCK_PSW,0
846
847/*
848 * Restart interruption handler, kick starter for additional CPUs
849 */
850#ifdef CONFIG_SMP
851	__CPUINIT
852	.globl restart_int_handler
853restart_int_handler:
854	basr	%r1,0
855restart_base:
856	spt	restart_vtime-restart_base(%r1)
857	stck	__LC_LAST_UPDATE_CLOCK
858	mvc	__LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
859	mvc	__LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
860	l	%r15,__LC_SAVE_AREA+60	# load ksp
861	lctl	%c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
862	lam	%a0,%a15,__LC_AREGS_SAVE_AREA
863	lm	%r6,%r15,__SF_GPRS(%r15) # load registers from clone
864	l	%r1,__LC_THREAD_INFO
865	mvc	__LC_USER_TIMER(8),__TI_user_timer(%r1)
866	mvc	__LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
867	xc	__LC_STEAL_TIMER(8),__LC_STEAL_TIMER
868	stosm	__SF_EMPTY(%r15),0x04	# now we can turn dat on
869	basr	%r14,0
870	l	%r14,restart_addr-.(%r14)
871	br	%r14			# branch to start_secondary
872restart_addr:
873	.long	start_secondary
874	.align	8
875restart_vtime:
876	.long	0x7fffffff,0xffffffff
877	.previous
878#else
879/*
880 * If we do not run with SMP enabled, let the new CPU crash ...
881 */
882	.globl restart_int_handler
883restart_int_handler:
884	basr	%r1,0
885restart_base:
886	lpsw	restart_crash-restart_base(%r1)
887	.align	8
888restart_crash:
889	.long	0x000a0000,0x00000000
890restart_go:
891#endif
892
893#ifdef CONFIG_CHECK_STACK
894/*
895 * The synchronous or the asynchronous stack overflowed. We are dead.
896 * No need to properly save the registers, we are going to panic anyway.
897 * Setup a pt_regs so that show_trace can provide a good call trace.
898 */
899stack_overflow:
900	l	%r15,__LC_PANIC_STACK	# change to panic stack
901	sl	%r15,BASED(.Lc_spsize)
902	mvc	SP_PSW(8,%r15),0(%r12)	# move user PSW to stack
903	stm	%r0,%r11,SP_R0(%r15)	# store gprs %r0-%r11 to kernel stack
904	la	%r1,__LC_SAVE_AREA
905	ch	%r12,BASED(.L0x020)	# old psw addr == __LC_SVC_OLD_PSW ?
906	be	BASED(0f)
907	ch	%r12,BASED(.L0x028)	# old psw addr == __LC_PGM_OLD_PSW ?
908	be	BASED(0f)
909	la	%r1,__LC_SAVE_AREA+16
9100:	mvc	SP_R12(16,%r15),0(%r1)	# move %r12-%r15 to stack
911	xc	__SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
912	l	%r1,BASED(1f)		# branch to kernel_stack_overflow
913	la	%r2,SP_PTREGS(%r15)	# load pt_regs
914	br	%r1
9151:	.long	kernel_stack_overflow
916#endif
917
918cleanup_table_system_call:
919	.long	system_call + 0x80000000, sysc_do_svc + 0x80000000
920cleanup_table_sysc_return:
921	.long	sysc_return + 0x80000000, sysc_leave + 0x80000000
922cleanup_table_sysc_leave:
923	.long	sysc_leave + 0x80000000, sysc_done + 0x80000000
924cleanup_table_sysc_work_loop:
925	.long	sysc_work_loop + 0x80000000, sysc_work_done + 0x80000000
926cleanup_table_io_return:
927	.long	io_return + 0x80000000, io_leave + 0x80000000
928cleanup_table_io_leave:
929	.long	io_leave + 0x80000000, io_done + 0x80000000
930cleanup_table_io_work_loop:
931	.long	io_work_loop + 0x80000000, io_work_done + 0x80000000
932
933cleanup_critical:
934	clc	4(4,%r12),BASED(cleanup_table_system_call)
935	bl	BASED(0f)
936	clc	4(4,%r12),BASED(cleanup_table_system_call+4)
937	bl	BASED(cleanup_system_call)
9380:
939	clc	4(4,%r12),BASED(cleanup_table_sysc_return)
940	bl	BASED(0f)
941	clc	4(4,%r12),BASED(cleanup_table_sysc_return+4)
942	bl	BASED(cleanup_sysc_return)
9430:
944	clc	4(4,%r12),BASED(cleanup_table_sysc_leave)
945	bl	BASED(0f)
946	clc	4(4,%r12),BASED(cleanup_table_sysc_leave+4)
947	bl	BASED(cleanup_sysc_leave)
9480:
949	clc	4(4,%r12),BASED(cleanup_table_sysc_work_loop)
950	bl	BASED(0f)
951	clc	4(4,%r12),BASED(cleanup_table_sysc_work_loop+4)
952	bl	BASED(cleanup_sysc_return)
9530:
954	clc	4(4,%r12),BASED(cleanup_table_io_return)
955	bl	BASED(0f)
956	clc	4(4,%r12),BASED(cleanup_table_io_return+4)
957	bl	BASED(cleanup_io_return)
9580:
959	clc	4(4,%r12),BASED(cleanup_table_io_leave)
960	bl	BASED(0f)
961	clc	4(4,%r12),BASED(cleanup_table_io_leave+4)
962	bl	BASED(cleanup_io_leave)
9630:
964	clc	4(4,%r12),BASED(cleanup_table_io_work_loop)
965	bl	BASED(0f)
966	clc	4(4,%r12),BASED(cleanup_table_io_work_loop+4)
967	bl	BASED(cleanup_io_return)
9680:
969	br	%r14
970
971cleanup_system_call:
972	mvc	__LC_RETURN_PSW(8),0(%r12)
973	c	%r12,BASED(.Lmck_old_psw)
974	be	BASED(0f)
975	la	%r12,__LC_SAVE_AREA+16
976	b	BASED(1f)
9770:	la	%r12,__LC_SAVE_AREA+32
9781:
979	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
980	bh	BASED(0f)
981	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
9820:	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
983	bhe	BASED(cleanup_vtime)
984	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
985	bh	BASED(0f)
986	mvc	__LC_SAVE_AREA(16),0(%r12)
9870:	st	%r13,4(%r12)
988	st	%r12,__LC_SAVE_AREA+48	# argh
989	SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
990	CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
991	l	%r12,__LC_SAVE_AREA+48	# argh
992	st	%r15,12(%r12)
993	lh	%r7,0x8a
994cleanup_vtime:
995	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
996	bhe	BASED(cleanup_stime)
997	UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
998cleanup_stime:
999	clc	__LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16)
1000	bh	BASED(cleanup_update)
1001	UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
1002cleanup_update:
1003	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1004	mvc	__LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
1005	la	%r12,__LC_RETURN_PSW
1006	br	%r14
1007cleanup_system_call_insn:
1008	.long	sysc_saveall + 0x80000000
1009	.long	system_call + 0x80000000
1010	.long	sysc_vtime + 0x80000000
1011	.long	sysc_stime + 0x80000000
1012	.long	sysc_update + 0x80000000
1013
1014cleanup_sysc_return:
1015	mvc	__LC_RETURN_PSW(4),0(%r12)
1016	mvc	__LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return)
1017	la	%r12,__LC_RETURN_PSW
1018	br	%r14
1019
1020cleanup_sysc_leave:
1021	clc	4(4,%r12),BASED(cleanup_sysc_leave_insn)
1022	be	BASED(2f)
1023	mvc	__LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1024	clc	4(4,%r12),BASED(cleanup_sysc_leave_insn+4)
1025	be	BASED(2f)
1026	mvc	__LC_RETURN_PSW(8),SP_PSW(%r15)
1027	c	%r12,BASED(.Lmck_old_psw)
1028	bne	BASED(0f)
1029	mvc	__LC_SAVE_AREA+32(16),SP_R12(%r15)
1030	b	BASED(1f)
10310:	mvc	__LC_SAVE_AREA+16(16),SP_R12(%r15)
10321:	lm	%r0,%r11,SP_R0(%r15)
1033	l	%r15,SP_R15(%r15)
10342:	la	%r12,__LC_RETURN_PSW
1035	br	%r14
1036cleanup_sysc_leave_insn:
1037	.long	sysc_done - 4 + 0x80000000
1038	.long	sysc_done - 8 + 0x80000000
1039
1040cleanup_io_return:
1041	mvc	__LC_RETURN_PSW(4),0(%r12)
1042	mvc	__LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop)
1043	la	%r12,__LC_RETURN_PSW
1044	br	%r14
1045
1046cleanup_io_leave:
1047	clc	4(4,%r12),BASED(cleanup_io_leave_insn)
1048	be	BASED(2f)
1049	mvc	__LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1050	clc	4(4,%r12),BASED(cleanup_io_leave_insn+4)
1051	be	BASED(2f)
1052	mvc	__LC_RETURN_PSW(8),SP_PSW(%r15)
1053	c	%r12,BASED(.Lmck_old_psw)
1054	bne	BASED(0f)
1055	mvc	__LC_SAVE_AREA+32(16),SP_R12(%r15)
1056	b	BASED(1f)
10570:	mvc	__LC_SAVE_AREA+16(16),SP_R12(%r15)
10581:	lm	%r0,%r11,SP_R0(%r15)
1059	l	%r15,SP_R15(%r15)
10602:	la	%r12,__LC_RETURN_PSW
1061	br	%r14
1062cleanup_io_leave_insn:
1063	.long	io_done - 4 + 0x80000000
1064	.long	io_done - 8 + 0x80000000
1065
1066/*
1067 * Integer constants
1068 */
1069		.align	4
1070.Lc_spsize:	.long	SP_SIZE
1071.Lc_overhead:	.long	STACK_FRAME_OVERHEAD
1072.Lnr_syscalls:	.long	NR_syscalls
1073.L0x018:	.short	0x018
1074.L0x020:	.short	0x020
1075.L0x028:	.short	0x028
1076.L0x030:	.short	0x030
1077.L0x038:	.short	0x038
1078.Lc_1:		.long	1
1079
1080/*
1081 * Symbol constants
1082 */
1083.Ls390_mcck:	.long	s390_do_machine_check
1084.Ls390_handle_mcck:
1085		.long	s390_handle_mcck
1086.Lmck_old_psw:	.long	__LC_MCK_OLD_PSW
1087.Ldo_IRQ:	.long	do_IRQ
1088.Ldo_extint:	.long	do_extint
1089.Ldo_signal:	.long	do_signal
1090.Ldo_notify_resume:
1091		.long	do_notify_resume
1092.Lhandle_per:	.long	do_single_step
1093.Ldo_execve:	.long	do_execve
1094.Lexecve_tail:	.long	execve_tail
1095.Ljump_table:	.long	pgm_check_table
1096.Lschedule:	.long	schedule
1097#ifdef CONFIG_PREEMPT
1098.Lpreempt_schedule_irq:
1099		.long	preempt_schedule_irq
1100#endif
1101.Ltrace_entry:	.long	do_syscall_trace_enter
1102.Ltrace_exit:	.long	do_syscall_trace_exit
1103.Lschedtail:	.long	schedule_tail
1104.Lsysc_table:	.long	sys_call_table
1105#ifdef CONFIG_TRACE_IRQFLAGS
1106.Ltrace_irq_on_caller:
1107		.long	trace_hardirqs_on_caller
1108.Ltrace_irq_off_caller:
1109		.long	trace_hardirqs_off_caller
1110#endif
1111#ifdef CONFIG_LOCKDEP
1112.Llockdep_sys_exit:
1113		.long	lockdep_sys_exit
1114#endif
1115.Lcritical_start:
1116		.long	__critical_start + 0x80000000
1117.Lcritical_end:
1118		.long	__critical_end + 0x80000000
1119.Lcleanup_critical:
1120		.long	cleanup_critical
1121
1122		.section .rodata, "a"
1123#define SYSCALL(esa,esame,emu)	.long esa
1124	.globl	sys_call_table
1125sys_call_table:
1126#include "syscalls.S"
1127#undef SYSCALL
1128