1/* 2 * S390 low-level entry points. 3 * 4 * Copyright IBM Corp. 1999, 2012 5 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), 6 * Hartmut Penner (hp@de.ibm.com), 7 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), 8 * Heiko Carstens <heiko.carstens@de.ibm.com> 9 */ 10 11#include <linux/init.h> 12#include <linux/linkage.h> 13#include <asm/processor.h> 14#include <asm/cache.h> 15#include <asm/errno.h> 16#include <asm/ptrace.h> 17#include <asm/thread_info.h> 18#include <asm/asm-offsets.h> 19#include <asm/unistd.h> 20#include <asm/page.h> 21#include <asm/sigp.h> 22#include <asm/irq.h> 23#include <asm/vx-insn.h> 24#include <asm/setup.h> 25#include <asm/nmi.h> 26#include <asm/export.h> 27 28__PT_R0 = __PT_GPRS 29__PT_R1 = __PT_GPRS + 8 30__PT_R2 = __PT_GPRS + 16 31__PT_R3 = __PT_GPRS + 24 32__PT_R4 = __PT_GPRS + 32 33__PT_R5 = __PT_GPRS + 40 34__PT_R6 = __PT_GPRS + 48 35__PT_R7 = __PT_GPRS + 56 36__PT_R8 = __PT_GPRS + 64 37__PT_R9 = __PT_GPRS + 72 38__PT_R10 = __PT_GPRS + 80 39__PT_R11 = __PT_GPRS + 88 40__PT_R12 = __PT_GPRS + 96 41__PT_R13 = __PT_GPRS + 104 42__PT_R14 = __PT_GPRS + 112 43__PT_R15 = __PT_GPRS + 120 44 45STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER 46STACK_SIZE = 1 << STACK_SHIFT 47STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE 48 49_TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ 50 _TIF_UPROBE | _TIF_GUARDED_STORAGE | _TIF_PATCH_PENDING) 51_TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \ 52 _TIF_SYSCALL_TRACEPOINT) 53_CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE_PRIMARY | \ 54 _CIF_ASCE_SECONDARY | _CIF_FPU) 55_PIF_WORK = (_PIF_PER_TRAP) 56 57#define BASED(name) name-cleanup_critical(%r13) 58 59 .macro TRACE_IRQS_ON 60#ifdef CONFIG_TRACE_IRQFLAGS 61 basr %r2,%r0 62 brasl %r14,trace_hardirqs_on_caller 63#endif 64 .endm 65 66 .macro TRACE_IRQS_OFF 67#ifdef CONFIG_TRACE_IRQFLAGS 68 basr %r2,%r0 69 brasl %r14,trace_hardirqs_off_caller 70#endif 71 .endm 72 73 .macro LOCKDEP_SYS_EXIT 74#ifdef CONFIG_LOCKDEP 75 tm __PT_PSW+1(%r11),0x01 # returning to user ? 76 jz .+10 77 brasl %r14,lockdep_sys_exit 78#endif 79 .endm 80 81 .macro CHECK_STACK stacksize,savearea 82#ifdef CONFIG_CHECK_STACK 83 tml %r15,\stacksize - CONFIG_STACK_GUARD 84 lghi %r14,\savearea 85 jz stack_overflow 86#endif 87 .endm 88 89 .macro SWITCH_ASYNC savearea,timer 90 tmhh %r8,0x0001 # interrupting from user ? 91 jnz 1f 92 lgr %r14,%r9 93 slg %r14,BASED(.Lcritical_start) 94 clg %r14,BASED(.Lcritical_length) 95 jhe 0f 96 lghi %r11,\savearea # inside critical section, do cleanup 97 brasl %r14,cleanup_critical 98 tmhh %r8,0x0001 # retest problem state after cleanup 99 jnz 1f 1000: lg %r14,__LC_ASYNC_STACK # are we already on the async stack? 101 slgr %r14,%r15 102 srag %r14,%r14,STACK_SHIFT 103 jnz 2f 104 CHECK_STACK 1<<STACK_SHIFT,\savearea 105 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 106 j 3f 1071: UPDATE_VTIME %r14,%r15,\timer 1082: lg %r15,__LC_ASYNC_STACK # load async stack 1093: la %r11,STACK_FRAME_OVERHEAD(%r15) 110 .endm 111 112 .macro UPDATE_VTIME w1,w2,enter_timer 113 lg \w1,__LC_EXIT_TIMER 114 lg \w2,__LC_LAST_UPDATE_TIMER 115 slg \w1,\enter_timer 116 slg \w2,__LC_EXIT_TIMER 117 alg \w1,__LC_USER_TIMER 118 alg \w2,__LC_SYSTEM_TIMER 119 stg \w1,__LC_USER_TIMER 120 stg \w2,__LC_SYSTEM_TIMER 121 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer 122 .endm 123 124 .macro REENABLE_IRQS 125 stg %r8,__LC_RETURN_PSW 126 ni __LC_RETURN_PSW,0xbf 127 ssm __LC_RETURN_PSW 128 .endm 129 130 .macro STCK savearea 131#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES 132 .insn s,0xb27c0000,\savearea # store clock fast 133#else 134 .insn s,0xb2050000,\savearea # store clock 135#endif 136 .endm 137 138 /* 139 * The TSTMSK macro generates a test-under-mask instruction by 140 * calculating the memory offset for the specified mask value. 141 * Mask value can be any constant. The macro shifts the mask 142 * value to calculate the memory offset for the test-under-mask 143 * instruction. 144 */ 145 .macro TSTMSK addr, mask, size=8, bytepos=0 146 .if (\bytepos < \size) && (\mask >> 8) 147 .if (\mask & 0xff) 148 .error "Mask exceeds byte boundary" 149 .endif 150 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)" 151 .exitm 152 .endif 153 .ifeq \mask 154 .error "Mask must not be zero" 155 .endif 156 off = \size - \bytepos - 1 157 tm off+\addr, \mask 158 .endm 159 160 .section .kprobes.text, "ax" 161.Ldummy: 162 /* 163 * This nop exists only in order to avoid that __switch_to starts at 164 * the beginning of the kprobes text section. In that case we would 165 * have several symbols at the same address. E.g. objdump would take 166 * an arbitrary symbol name when disassembling this code. 167 * With the added nop in between the __switch_to symbol is unique 168 * again. 169 */ 170 nop 0 171 172/* 173 * Scheduler resume function, called by switch_to 174 * gpr2 = (task_struct *) prev 175 * gpr3 = (task_struct *) next 176 * Returns: 177 * gpr2 = prev 178 */ 179ENTRY(__switch_to) 180 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task 181 lgr %r1,%r2 182 aghi %r1,__TASK_thread # thread_struct of prev task 183 lg %r5,__TASK_stack(%r3) # start of kernel stack of next 184 stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev 185 lgr %r1,%r3 186 aghi %r1,__TASK_thread # thread_struct of next task 187 lgr %r15,%r5 188 aghi %r15,STACK_INIT # end of kernel stack of next 189 stg %r3,__LC_CURRENT # store task struct of next 190 stg %r15,__LC_KERNEL_STACK # store end of kernel stack 191 lg %r15,__THREAD_ksp(%r1) # load kernel stack of next 192 mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next 193 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task 194 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP 195 bzr %r14 196 .insn s,0xb2800000,__LC_LPP # set program parameter 197 br %r14 198 199.L__critical_start: 200 201#if IS_ENABLED(CONFIG_KVM) 202/* 203 * sie64a calling convention: 204 * %r2 pointer to sie control block 205 * %r3 guest register save area 206 */ 207ENTRY(sie64a) 208 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers 209 stg %r2,__SF_EMPTY(%r15) # save control block pointer 210 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area 211 xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0 212 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ? 213 jno .Lsie_load_guest_gprs 214 brasl %r14,load_fpu_regs # load guest fp/vx regs 215.Lsie_load_guest_gprs: 216 lmg %r0,%r13,0(%r3) # load guest gprs 0-13 217 lg %r14,__LC_GMAP # get gmap pointer 218 ltgr %r14,%r14 219 jz .Lsie_gmap 220 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce 221.Lsie_gmap: 222 lg %r14,__SF_EMPTY(%r15) # get control block pointer 223 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now 224 tm __SIE_PROG20+3(%r14),3 # last exit... 225 jnz .Lsie_skip 226 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 227 jo .Lsie_skip # exit if fp/vx regs changed 228 sie 0(%r14) 229.Lsie_skip: 230 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE 231 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 232.Lsie_done: 233# some program checks are suppressing. C code (e.g. do_protection_exception) 234# will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There 235# are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable. 236# Other instructions between sie64a and .Lsie_done should not cause program 237# interrupts. So lets use 3 nops as a landing pad for all possible rewinds. 238# See also .Lcleanup_sie 239.Lrewind_pad6: 240 nopr 7 241.Lrewind_pad4: 242 nopr 7 243.Lrewind_pad2: 244 nopr 7 245 .globl sie_exit 246sie_exit: 247 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area 248 stmg %r0,%r13,0(%r14) # save guest gprs 0-13 249 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers 250 lg %r2,__SF_EMPTY+16(%r15) # return exit reason code 251 br %r14 252.Lsie_fault: 253 lghi %r14,-EFAULT 254 stg %r14,__SF_EMPTY+16(%r15) # set exit reason code 255 j sie_exit 256 257 EX_TABLE(.Lrewind_pad6,.Lsie_fault) 258 EX_TABLE(.Lrewind_pad4,.Lsie_fault) 259 EX_TABLE(.Lrewind_pad2,.Lsie_fault) 260 EX_TABLE(sie_exit,.Lsie_fault) 261EXPORT_SYMBOL(sie64a) 262EXPORT_SYMBOL(sie_exit) 263#endif 264 265/* 266 * SVC interrupt handler routine. System calls are synchronous events and 267 * are executed with interrupts enabled. 268 */ 269 270ENTRY(system_call) 271 stpt __LC_SYNC_ENTER_TIMER 272.Lsysc_stmg: 273 stmg %r8,%r15,__LC_SAVE_AREA_SYNC 274 lg %r12,__LC_CURRENT 275 lghi %r13,__TASK_thread 276 lghi %r14,_PIF_SYSCALL 277.Lsysc_per: 278 lg %r15,__LC_KERNEL_STACK 279 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs 280.Lsysc_vtime: 281 UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER 282 stmg %r0,%r7,__PT_R0(%r11) 283 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC 284 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW 285 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC 286 stg %r14,__PT_FLAGS(%r11) 287.Lsysc_do_svc: 288 # load address of system call table 289 lg %r10,__THREAD_sysc_table(%r13,%r12) 290 llgh %r8,__PT_INT_CODE+2(%r11) 291 slag %r8,%r8,2 # shift and test for svc 0 292 jnz .Lsysc_nr_ok 293 # svc 0: system call number in %r1 294 llgfr %r1,%r1 # clear high word in r1 295 cghi %r1,NR_syscalls 296 jnl .Lsysc_nr_ok 297 sth %r1,__PT_INT_CODE+2(%r11) 298 slag %r8,%r1,2 299.Lsysc_nr_ok: 300 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 301 stg %r2,__PT_ORIG_GPR2(%r11) 302 stg %r7,STACK_FRAME_OVERHEAD(%r15) 303 lgf %r9,0(%r8,%r10) # get system call add. 304 TSTMSK __TI_flags(%r12),_TIF_TRACE 305 jnz .Lsysc_tracesys 306 basr %r14,%r9 # call sys_xxxx 307 stg %r2,__PT_R2(%r11) # store return value 308 309.Lsysc_return: 310 LOCKDEP_SYS_EXIT 311.Lsysc_tif: 312 TSTMSK __PT_FLAGS(%r11),_PIF_WORK 313 jnz .Lsysc_work 314 TSTMSK __TI_flags(%r12),_TIF_WORK 315 jnz .Lsysc_work # check for work 316 TSTMSK __LC_CPU_FLAGS,_CIF_WORK 317 jnz .Lsysc_work 318.Lsysc_restore: 319 lg %r14,__LC_VDSO_PER_CPU 320 lmg %r0,%r10,__PT_R0(%r11) 321 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) 322.Lsysc_exit_timer: 323 stpt __LC_EXIT_TIMER 324 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 325 lmg %r11,%r15,__PT_R11(%r11) 326 lpswe __LC_RETURN_PSW 327.Lsysc_done: 328 329# 330# One of the work bits is on. Find out which one. 331# 332.Lsysc_work: 333 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING 334 jo .Lsysc_mcck_pending 335 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 336 jo .Lsysc_reschedule 337#ifdef CONFIG_UPROBES 338 TSTMSK __TI_flags(%r12),_TIF_UPROBE 339 jo .Lsysc_uprobe_notify 340#endif 341 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE 342 jo .Lsysc_guarded_storage 343 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP 344 jo .Lsysc_singlestep 345#ifdef CONFIG_LIVEPATCH 346 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING 347 jo .Lsysc_patch_pending # handle live patching just before 348 # signals and possible syscall restart 349#endif 350 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING 351 jo .Lsysc_sigpending 352 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME 353 jo .Lsysc_notify_resume 354 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 355 jo .Lsysc_vxrs 356 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY) 357 jnz .Lsysc_asce 358 j .Lsysc_return # beware of critical section cleanup 359 360# 361# _TIF_NEED_RESCHED is set, call schedule 362# 363.Lsysc_reschedule: 364 larl %r14,.Lsysc_return 365 jg schedule 366 367# 368# _CIF_MCCK_PENDING is set, call handler 369# 370.Lsysc_mcck_pending: 371 larl %r14,.Lsysc_return 372 jg s390_handle_mcck # TIF bit will be cleared by handler 373 374# 375# _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce 376# 377.Lsysc_asce: 378 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY 379 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 380 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY 381 jz .Lsysc_return 382 larl %r14,.Lsysc_return 383 jg set_fs_fixup 384 385# 386# CIF_FPU is set, restore floating-point controls and floating-point registers. 387# 388.Lsysc_vxrs: 389 larl %r14,.Lsysc_return 390 jg load_fpu_regs 391 392# 393# _TIF_SIGPENDING is set, call do_signal 394# 395.Lsysc_sigpending: 396 lgr %r2,%r11 # pass pointer to pt_regs 397 brasl %r14,do_signal 398 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL 399 jno .Lsysc_return 400.Lsysc_do_syscall: 401 lghi %r13,__TASK_thread 402 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments 403 lghi %r1,0 # svc 0 returns -ENOSYS 404 j .Lsysc_do_svc 405 406# 407# _TIF_NOTIFY_RESUME is set, call do_notify_resume 408# 409.Lsysc_notify_resume: 410 lgr %r2,%r11 # pass pointer to pt_regs 411 larl %r14,.Lsysc_return 412 jg do_notify_resume 413 414# 415# _TIF_UPROBE is set, call uprobe_notify_resume 416# 417#ifdef CONFIG_UPROBES 418.Lsysc_uprobe_notify: 419 lgr %r2,%r11 # pass pointer to pt_regs 420 larl %r14,.Lsysc_return 421 jg uprobe_notify_resume 422#endif 423 424# 425# _TIF_GUARDED_STORAGE is set, call guarded_storage_load 426# 427.Lsysc_guarded_storage: 428 lgr %r2,%r11 # pass pointer to pt_regs 429 larl %r14,.Lsysc_return 430 jg gs_load_bc_cb 431# 432# _TIF_PATCH_PENDING is set, call klp_update_patch_state 433# 434#ifdef CONFIG_LIVEPATCH 435.Lsysc_patch_pending: 436 lg %r2,__LC_CURRENT # pass pointer to task struct 437 larl %r14,.Lsysc_return 438 jg klp_update_patch_state 439#endif 440 441# 442# _PIF_PER_TRAP is set, call do_per_trap 443# 444.Lsysc_singlestep: 445 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP 446 lgr %r2,%r11 # pass pointer to pt_regs 447 larl %r14,.Lsysc_return 448 jg do_per_trap 449 450# 451# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before 452# and after the system call 453# 454.Lsysc_tracesys: 455 lgr %r2,%r11 # pass pointer to pt_regs 456 la %r3,0 457 llgh %r0,__PT_INT_CODE+2(%r11) 458 stg %r0,__PT_R2(%r11) 459 brasl %r14,do_syscall_trace_enter 460 lghi %r0,NR_syscalls 461 clgr %r0,%r2 462 jnh .Lsysc_tracenogo 463 sllg %r8,%r2,2 464 lgf %r9,0(%r8,%r10) 465.Lsysc_tracego: 466 lmg %r3,%r7,__PT_R3(%r11) 467 stg %r7,STACK_FRAME_OVERHEAD(%r15) 468 lg %r2,__PT_ORIG_GPR2(%r11) 469 basr %r14,%r9 # call sys_xxx 470 stg %r2,__PT_R2(%r11) # store return value 471.Lsysc_tracenogo: 472 TSTMSK __TI_flags(%r12),_TIF_TRACE 473 jz .Lsysc_return 474 lgr %r2,%r11 # pass pointer to pt_regs 475 larl %r14,.Lsysc_return 476 jg do_syscall_trace_exit 477 478# 479# a new process exits the kernel with ret_from_fork 480# 481ENTRY(ret_from_fork) 482 la %r11,STACK_FRAME_OVERHEAD(%r15) 483 lg %r12,__LC_CURRENT 484 brasl %r14,schedule_tail 485 TRACE_IRQS_ON 486 ssm __LC_SVC_NEW_PSW # reenable interrupts 487 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ? 488 jne .Lsysc_tracenogo 489 # it's a kernel thread 490 lmg %r9,%r10,__PT_R9(%r11) # load gprs 491ENTRY(kernel_thread_starter) 492 la %r2,0(%r10) 493 basr %r14,%r9 494 j .Lsysc_tracenogo 495 496/* 497 * Program check handler routine 498 */ 499 500ENTRY(pgm_check_handler) 501 stpt __LC_SYNC_ENTER_TIMER 502 stmg %r8,%r15,__LC_SAVE_AREA_SYNC 503 lg %r10,__LC_LAST_BREAK 504 lg %r12,__LC_CURRENT 505 larl %r13,cleanup_critical 506 lmg %r8,%r9,__LC_PGM_OLD_PSW 507 tmhh %r8,0x0001 # test problem state bit 508 jnz 2f # -> fault in user space 509#if IS_ENABLED(CONFIG_KVM) 510 # cleanup critical section for sie64a 511 lgr %r14,%r9 512 slg %r14,BASED(.Lsie_critical_start) 513 clg %r14,BASED(.Lsie_critical_length) 514 jhe 0f 515 brasl %r14,.Lcleanup_sie 516#endif 5170: tmhh %r8,0x4000 # PER bit set in old PSW ? 518 jnz 1f # -> enabled, can't be a double fault 519 tm __LC_PGM_ILC+3,0x80 # check for per exception 520 jnz .Lpgm_svcper # -> single stepped svc 5211: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC 522 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 523 j 4f 5242: UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER 525 lg %r15,__LC_KERNEL_STACK 526 lgr %r14,%r12 527 aghi %r14,__TASK_thread # pointer to thread_struct 528 lghi %r13,__LC_PGM_TDB 529 tm __LC_PGM_ILC+2,0x02 # check for transaction abort 530 jz 3f 531 mvc __THREAD_trap_tdb(256,%r14),0(%r13) 5323: stg %r10,__THREAD_last_break(%r14) 5334: la %r11,STACK_FRAME_OVERHEAD(%r15) 534 stmg %r0,%r7,__PT_R0(%r11) 535 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC 536 stmg %r8,%r9,__PT_PSW(%r11) 537 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC 538 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE 539 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 540 stg %r10,__PT_ARGS(%r11) 541 tm __LC_PGM_ILC+3,0x80 # check for per exception 542 jz 5f 543 tmhh %r8,0x0001 # kernel per event ? 544 jz .Lpgm_kprobe 545 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP 546 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS 547 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE 548 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID 5495: REENABLE_IRQS 550 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 551 larl %r1,pgm_check_table 552 llgh %r10,__PT_INT_CODE+2(%r11) 553 nill %r10,0x007f 554 sll %r10,2 555 je .Lpgm_return 556 lgf %r1,0(%r10,%r1) # load address of handler routine 557 lgr %r2,%r11 # pass pointer to pt_regs 558 basr %r14,%r1 # branch to interrupt-handler 559.Lpgm_return: 560 LOCKDEP_SYS_EXIT 561 tm __PT_PSW+1(%r11),0x01 # returning to user ? 562 jno .Lsysc_restore 563 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL 564 jo .Lsysc_do_syscall 565 j .Lsysc_tif 566 567# 568# PER event in supervisor state, must be kprobes 569# 570.Lpgm_kprobe: 571 REENABLE_IRQS 572 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 573 lgr %r2,%r11 # pass pointer to pt_regs 574 brasl %r14,do_per_trap 575 j .Lpgm_return 576 577# 578# single stepped system call 579# 580.Lpgm_svcper: 581 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW 582 lghi %r13,__TASK_thread 583 larl %r14,.Lsysc_per 584 stg %r14,__LC_RETURN_PSW+8 585 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP 586 lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs 587 588/* 589 * IO interrupt handler routine 590 */ 591ENTRY(io_int_handler) 592 STCK __LC_INT_CLOCK 593 stpt __LC_ASYNC_ENTER_TIMER 594 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC 595 lg %r12,__LC_CURRENT 596 larl %r13,cleanup_critical 597 lmg %r8,%r9,__LC_IO_OLD_PSW 598 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER 599 stmg %r0,%r7,__PT_R0(%r11) 600 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC 601 stmg %r8,%r9,__PT_PSW(%r11) 602 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID 603 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 604 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ 605 jo .Lio_restore 606 TRACE_IRQS_OFF 607 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 608.Lio_loop: 609 lgr %r2,%r11 # pass pointer to pt_regs 610 lghi %r3,IO_INTERRUPT 611 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ? 612 jz .Lio_call 613 lghi %r3,THIN_INTERRUPT 614.Lio_call: 615 brasl %r14,do_IRQ 616 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR 617 jz .Lio_return 618 tpi 0 619 jz .Lio_return 620 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID 621 j .Lio_loop 622.Lio_return: 623 LOCKDEP_SYS_EXIT 624 TRACE_IRQS_ON 625.Lio_tif: 626 TSTMSK __TI_flags(%r12),_TIF_WORK 627 jnz .Lio_work # there is work to do (signals etc.) 628 TSTMSK __LC_CPU_FLAGS,_CIF_WORK 629 jnz .Lio_work 630.Lio_restore: 631 lg %r14,__LC_VDSO_PER_CPU 632 lmg %r0,%r10,__PT_R0(%r11) 633 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) 634.Lio_exit_timer: 635 stpt __LC_EXIT_TIMER 636 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 637 lmg %r11,%r15,__PT_R11(%r11) 638 lpswe __LC_RETURN_PSW 639.Lio_done: 640 641# 642# There is work todo, find out in which context we have been interrupted: 643# 1) if we return to user space we can do all _TIF_WORK work 644# 2) if we return to kernel code and kvm is enabled check if we need to 645# modify the psw to leave SIE 646# 3) if we return to kernel code and preemptive scheduling is enabled check 647# the preemption counter and if it is zero call preempt_schedule_irq 648# Before any work can be done, a switch to the kernel stack is required. 649# 650.Lio_work: 651 tm __PT_PSW+1(%r11),0x01 # returning to user ? 652 jo .Lio_work_user # yes -> do resched & signal 653#ifdef CONFIG_PREEMPT 654 # check for preemptive scheduling 655 icm %r0,15,__LC_PREEMPT_COUNT 656 jnz .Lio_restore # preemption is disabled 657 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 658 jno .Lio_restore 659 # switch to kernel stack 660 lg %r1,__PT_R15(%r11) 661 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 662 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) 663 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) 664 la %r11,STACK_FRAME_OVERHEAD(%r1) 665 lgr %r15,%r1 666 # TRACE_IRQS_ON already done at .Lio_return, call 667 # TRACE_IRQS_OFF to keep things symmetrical 668 TRACE_IRQS_OFF 669 brasl %r14,preempt_schedule_irq 670 j .Lio_return 671#else 672 j .Lio_restore 673#endif 674 675# 676# Need to do work before returning to userspace, switch to kernel stack 677# 678.Lio_work_user: 679 lg %r1,__LC_KERNEL_STACK 680 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) 681 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) 682 la %r11,STACK_FRAME_OVERHEAD(%r1) 683 lgr %r15,%r1 684 685# 686# One of the work bits is on. Find out which one. 687# 688.Lio_work_tif: 689 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING 690 jo .Lio_mcck_pending 691 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 692 jo .Lio_reschedule 693#ifdef CONFIG_LIVEPATCH 694 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING 695 jo .Lio_patch_pending 696#endif 697 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING 698 jo .Lio_sigpending 699 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME 700 jo .Lio_notify_resume 701 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE 702 jo .Lio_guarded_storage 703 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 704 jo .Lio_vxrs 705 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY) 706 jnz .Lio_asce 707 j .Lio_return # beware of critical section cleanup 708 709# 710# _CIF_MCCK_PENDING is set, call handler 711# 712.Lio_mcck_pending: 713 # TRACE_IRQS_ON already done at .Lio_return 714 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler 715 TRACE_IRQS_OFF 716 j .Lio_return 717 718# 719# _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce 720# 721.Lio_asce: 722 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY 723 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 724 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY 725 jz .Lio_return 726 larl %r14,.Lio_return 727 jg set_fs_fixup 728 729# 730# CIF_FPU is set, restore floating-point controls and floating-point registers. 731# 732.Lio_vxrs: 733 larl %r14,.Lio_return 734 jg load_fpu_regs 735 736# 737# _TIF_GUARDED_STORAGE is set, call guarded_storage_load 738# 739.Lio_guarded_storage: 740 # TRACE_IRQS_ON already done at .Lio_return 741 ssm __LC_SVC_NEW_PSW # reenable interrupts 742 lgr %r2,%r11 # pass pointer to pt_regs 743 brasl %r14,gs_load_bc_cb 744 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 745 TRACE_IRQS_OFF 746 j .Lio_return 747 748# 749# _TIF_NEED_RESCHED is set, call schedule 750# 751.Lio_reschedule: 752 # TRACE_IRQS_ON already done at .Lio_return 753 ssm __LC_SVC_NEW_PSW # reenable interrupts 754 brasl %r14,schedule # call scheduler 755 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 756 TRACE_IRQS_OFF 757 j .Lio_return 758 759# 760# _TIF_PATCH_PENDING is set, call klp_update_patch_state 761# 762#ifdef CONFIG_LIVEPATCH 763.Lio_patch_pending: 764 lg %r2,__LC_CURRENT # pass pointer to task struct 765 larl %r14,.Lio_return 766 jg klp_update_patch_state 767#endif 768 769# 770# _TIF_SIGPENDING or is set, call do_signal 771# 772.Lio_sigpending: 773 # TRACE_IRQS_ON already done at .Lio_return 774 ssm __LC_SVC_NEW_PSW # reenable interrupts 775 lgr %r2,%r11 # pass pointer to pt_regs 776 brasl %r14,do_signal 777 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 778 TRACE_IRQS_OFF 779 j .Lio_return 780 781# 782# _TIF_NOTIFY_RESUME or is set, call do_notify_resume 783# 784.Lio_notify_resume: 785 # TRACE_IRQS_ON already done at .Lio_return 786 ssm __LC_SVC_NEW_PSW # reenable interrupts 787 lgr %r2,%r11 # pass pointer to pt_regs 788 brasl %r14,do_notify_resume 789 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts 790 TRACE_IRQS_OFF 791 j .Lio_return 792 793/* 794 * External interrupt handler routine 795 */ 796ENTRY(ext_int_handler) 797 STCK __LC_INT_CLOCK 798 stpt __LC_ASYNC_ENTER_TIMER 799 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC 800 lg %r12,__LC_CURRENT 801 larl %r13,cleanup_critical 802 lmg %r8,%r9,__LC_EXT_OLD_PSW 803 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER 804 stmg %r0,%r7,__PT_R0(%r11) 805 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC 806 stmg %r8,%r9,__PT_PSW(%r11) 807 lghi %r1,__LC_EXT_PARAMS2 808 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR 809 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS 810 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1) 811 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 812 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ 813 jo .Lio_restore 814 TRACE_IRQS_OFF 815 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 816 lgr %r2,%r11 # pass pointer to pt_regs 817 lghi %r3,EXT_INTERRUPT 818 brasl %r14,do_IRQ 819 j .Lio_return 820 821/* 822 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle. 823 */ 824ENTRY(psw_idle) 825 stg %r3,__SF_EMPTY(%r15) 826 larl %r1,.Lpsw_idle_lpsw+4 827 stg %r1,__SF_EMPTY+8(%r15) 828#ifdef CONFIG_SMP 829 larl %r1,smp_cpu_mtid 830 llgf %r1,0(%r1) 831 ltgr %r1,%r1 832 jz .Lpsw_idle_stcctm 833 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15) 834.Lpsw_idle_stcctm: 835#endif 836 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT 837 STCK __CLOCK_IDLE_ENTER(%r2) 838 stpt __TIMER_IDLE_ENTER(%r2) 839.Lpsw_idle_lpsw: 840 lpswe __SF_EMPTY(%r15) 841 br %r14 842.Lpsw_idle_end: 843 844/* 845 * Store floating-point controls and floating-point or vector register 846 * depending whether the vector facility is available. A critical section 847 * cleanup assures that the registers are stored even if interrupted for 848 * some other work. The CIF_FPU flag is set to trigger a lazy restore 849 * of the register contents at return from io or a system call. 850 */ 851ENTRY(save_fpu_regs) 852 lg %r2,__LC_CURRENT 853 aghi %r2,__TASK_thread 854 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 855 bor %r14 856 stfpc __THREAD_FPU_fpc(%r2) 857 lg %r3,__THREAD_FPU_regs(%r2) 858 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX 859 jz .Lsave_fpu_regs_fp # no -> store FP regs 860 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3) 861 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3) 862 j .Lsave_fpu_regs_done # -> set CIF_FPU flag 863.Lsave_fpu_regs_fp: 864 std 0,0(%r3) 865 std 1,8(%r3) 866 std 2,16(%r3) 867 std 3,24(%r3) 868 std 4,32(%r3) 869 std 5,40(%r3) 870 std 6,48(%r3) 871 std 7,56(%r3) 872 std 8,64(%r3) 873 std 9,72(%r3) 874 std 10,80(%r3) 875 std 11,88(%r3) 876 std 12,96(%r3) 877 std 13,104(%r3) 878 std 14,112(%r3) 879 std 15,120(%r3) 880.Lsave_fpu_regs_done: 881 oi __LC_CPU_FLAGS+7,_CIF_FPU 882 br %r14 883.Lsave_fpu_regs_end: 884#if IS_ENABLED(CONFIG_KVM) 885EXPORT_SYMBOL(save_fpu_regs) 886#endif 887 888/* 889 * Load floating-point controls and floating-point or vector registers. 890 * A critical section cleanup assures that the register contents are 891 * loaded even if interrupted for some other work. 892 * 893 * There are special calling conventions to fit into sysc and io return work: 894 * %r15: <kernel stack> 895 * The function requires: 896 * %r4 897 */ 898load_fpu_regs: 899 lg %r4,__LC_CURRENT 900 aghi %r4,__TASK_thread 901 TSTMSK __LC_CPU_FLAGS,_CIF_FPU 902 bnor %r14 903 lfpc __THREAD_FPU_fpc(%r4) 904 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX 905 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area 906 jz .Lload_fpu_regs_fp # -> no VX, load FP regs 907 VLM %v0,%v15,0,%r4 908 VLM %v16,%v31,256,%r4 909 j .Lload_fpu_regs_done 910.Lload_fpu_regs_fp: 911 ld 0,0(%r4) 912 ld 1,8(%r4) 913 ld 2,16(%r4) 914 ld 3,24(%r4) 915 ld 4,32(%r4) 916 ld 5,40(%r4) 917 ld 6,48(%r4) 918 ld 7,56(%r4) 919 ld 8,64(%r4) 920 ld 9,72(%r4) 921 ld 10,80(%r4) 922 ld 11,88(%r4) 923 ld 12,96(%r4) 924 ld 13,104(%r4) 925 ld 14,112(%r4) 926 ld 15,120(%r4) 927.Lload_fpu_regs_done: 928 ni __LC_CPU_FLAGS+7,255-_CIF_FPU 929 br %r14 930.Lload_fpu_regs_end: 931 932.L__critical_end: 933 934/* 935 * Machine check handler routines 936 */ 937ENTRY(mcck_int_handler) 938 STCK __LC_MCCK_CLOCK 939 la %r1,4095 # revalidate r1 940 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer 941 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs 942 lg %r12,__LC_CURRENT 943 larl %r13,cleanup_critical 944 lmg %r8,%r9,__LC_MCK_OLD_PSW 945 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE 946 jo .Lmcck_panic # yes -> rest of mcck code invalid 947 lghi %r14,__LC_CPU_TIMER_SAVE_AREA 948 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) 949 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID 950 jo 3f 951 la %r14,__LC_SYNC_ENTER_TIMER 952 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER 953 jl 0f 954 la %r14,__LC_ASYNC_ENTER_TIMER 9550: clc 0(8,%r14),__LC_EXIT_TIMER 956 jl 1f 957 la %r14,__LC_EXIT_TIMER 9581: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER 959 jl 2f 960 la %r14,__LC_LAST_UPDATE_TIMER 9612: spt 0(%r14) 962 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) 9633: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID) 964 jno .Lmcck_panic # no -> skip cleanup critical 965 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER 966.Lmcck_skip: 967 lghi %r14,__LC_GPREGS_SAVE_AREA+64 968 stmg %r0,%r7,__PT_R0(%r11) 969 mvc __PT_R8(64,%r11),0(%r14) 970 stmg %r8,%r9,__PT_PSW(%r11) 971 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 972 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 973 lgr %r2,%r11 # pass pointer to pt_regs 974 brasl %r14,s390_do_machine_check 975 tm __PT_PSW+1(%r11),0x01 # returning to user ? 976 jno .Lmcck_return 977 lg %r1,__LC_KERNEL_STACK # switch to kernel stack 978 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) 979 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) 980 la %r11,STACK_FRAME_OVERHEAD(%r1) 981 lgr %r15,%r1 982 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off 983 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING 984 jno .Lmcck_return 985 TRACE_IRQS_OFF 986 brasl %r14,s390_handle_mcck 987 TRACE_IRQS_ON 988.Lmcck_return: 989 lg %r14,__LC_VDSO_PER_CPU 990 lmg %r0,%r10,__PT_R0(%r11) 991 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW 992 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? 993 jno 0f 994 stpt __LC_EXIT_TIMER 995 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER 9960: lmg %r11,%r15,__PT_R11(%r11) 997 lpswe __LC_RETURN_MCCK_PSW 998 999.Lmcck_panic: 1000 lg %r15,__LC_PANIC_STACK 1001 la %r11,STACK_FRAME_OVERHEAD(%r15) 1002 j .Lmcck_skip 1003 1004# 1005# PSW restart interrupt handler 1006# 1007ENTRY(restart_int_handler) 1008 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP 1009 jz 0f 1010 .insn s,0xb2800000,__LC_LPP 10110: stg %r15,__LC_SAVE_AREA_RESTART 1012 lg %r15,__LC_RESTART_STACK 1013 aghi %r15,-__PT_SIZE # create pt_regs on stack 1014 xc 0(__PT_SIZE,%r15),0(%r15) 1015 stmg %r0,%r14,__PT_R0(%r15) 1016 mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART 1017 mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw 1018 aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack 1019 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15) 1020 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu 1021 lg %r2,__LC_RESTART_DATA 1022 lg %r3,__LC_RESTART_SOURCE 1023 ltgr %r3,%r3 # test source cpu address 1024 jm 1f # negative -> skip source stop 10250: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu 1026 brc 10,0b # wait for status stored 10271: basr %r14,%r1 # call function 1028 stap __SF_EMPTY(%r15) # store cpu address 1029 llgh %r3,__SF_EMPTY(%r15) 10302: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu 1031 brc 2,2b 10323: j 3b 1033 1034 .section .kprobes.text, "ax" 1035 1036#ifdef CONFIG_CHECK_STACK 1037/* 1038 * The synchronous or the asynchronous stack overflowed. We are dead. 1039 * No need to properly save the registers, we are going to panic anyway. 1040 * Setup a pt_regs so that show_trace can provide a good call trace. 1041 */ 1042stack_overflow: 1043 lg %r15,__LC_PANIC_STACK # change to panic stack 1044 la %r11,STACK_FRAME_OVERHEAD(%r15) 1045 stmg %r0,%r7,__PT_R0(%r11) 1046 stmg %r8,%r9,__PT_PSW(%r11) 1047 mvc __PT_R8(64,%r11),0(%r14) 1048 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2 1049 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 1050 lgr %r2,%r11 # pass pointer to pt_regs 1051 jg kernel_stack_overflow 1052#endif 1053 1054cleanup_critical: 1055#if IS_ENABLED(CONFIG_KVM) 1056 clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap 1057 jl 0f 1058 clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done 1059 jl .Lcleanup_sie 1060#endif 1061 clg %r9,BASED(.Lcleanup_table) # system_call 1062 jl 0f 1063 clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc 1064 jl .Lcleanup_system_call 1065 clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif 1066 jl 0f 1067 clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore 1068 jl .Lcleanup_sysc_tif 1069 clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done 1070 jl .Lcleanup_sysc_restore 1071 clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif 1072 jl 0f 1073 clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore 1074 jl .Lcleanup_io_tif 1075 clg %r9,BASED(.Lcleanup_table+56) # .Lio_done 1076 jl .Lcleanup_io_restore 1077 clg %r9,BASED(.Lcleanup_table+64) # psw_idle 1078 jl 0f 1079 clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end 1080 jl .Lcleanup_idle 1081 clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs 1082 jl 0f 1083 clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end 1084 jl .Lcleanup_save_fpu_regs 1085 clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs 1086 jl 0f 1087 clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end 1088 jl .Lcleanup_load_fpu_regs 10890: br %r14 1090 1091 .align 8 1092.Lcleanup_table: 1093 .quad system_call 1094 .quad .Lsysc_do_svc 1095 .quad .Lsysc_tif 1096 .quad .Lsysc_restore 1097 .quad .Lsysc_done 1098 .quad .Lio_tif 1099 .quad .Lio_restore 1100 .quad .Lio_done 1101 .quad psw_idle 1102 .quad .Lpsw_idle_end 1103 .quad save_fpu_regs 1104 .quad .Lsave_fpu_regs_end 1105 .quad load_fpu_regs 1106 .quad .Lload_fpu_regs_end 1107 1108#if IS_ENABLED(CONFIG_KVM) 1109.Lcleanup_table_sie: 1110 .quad .Lsie_gmap 1111 .quad .Lsie_done 1112 1113.Lcleanup_sie: 1114 lg %r9,__SF_EMPTY(%r15) # get control block pointer 1115 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE 1116 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce 1117 larl %r9,sie_exit # skip forward to sie_exit 1118 br %r14 1119#endif 1120 1121.Lcleanup_system_call: 1122 # check if stpt has been executed 1123 clg %r9,BASED(.Lcleanup_system_call_insn) 1124 jh 0f 1125 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER 1126 cghi %r11,__LC_SAVE_AREA_ASYNC 1127 je 0f 1128 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER 11290: # check if stmg has been executed 1130 clg %r9,BASED(.Lcleanup_system_call_insn+8) 1131 jh 0f 1132 mvc __LC_SAVE_AREA_SYNC(64),0(%r11) 11330: # check if base register setup + TIF bit load has been done 1134 clg %r9,BASED(.Lcleanup_system_call_insn+16) 1135 jhe 0f 1136 # set up saved register r12 task struct pointer 1137 stg %r12,32(%r11) 1138 # set up saved register r13 __TASK_thread offset 1139 mvc 40(8,%r11),BASED(.Lcleanup_system_call_const) 11400: # check if the user time update has been done 1141 clg %r9,BASED(.Lcleanup_system_call_insn+24) 1142 jh 0f 1143 lg %r15,__LC_EXIT_TIMER 1144 slg %r15,__LC_SYNC_ENTER_TIMER 1145 alg %r15,__LC_USER_TIMER 1146 stg %r15,__LC_USER_TIMER 11470: # check if the system time update has been done 1148 clg %r9,BASED(.Lcleanup_system_call_insn+32) 1149 jh 0f 1150 lg %r15,__LC_LAST_UPDATE_TIMER 1151 slg %r15,__LC_EXIT_TIMER 1152 alg %r15,__LC_SYSTEM_TIMER 1153 stg %r15,__LC_SYSTEM_TIMER 11540: # update accounting time stamp 1155 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 1156 # set up saved register r11 1157 lg %r15,__LC_KERNEL_STACK 1158 la %r9,STACK_FRAME_OVERHEAD(%r15) 1159 stg %r9,24(%r11) # r11 pt_regs pointer 1160 # fill pt_regs 1161 mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC 1162 stmg %r0,%r7,__PT_R0(%r9) 1163 mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW 1164 mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC 1165 xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9) 1166 mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL 1167 # setup saved register r15 1168 stg %r15,56(%r11) # r15 stack pointer 1169 # set new psw address and exit 1170 larl %r9,.Lsysc_do_svc 1171 br %r14 1172.Lcleanup_system_call_insn: 1173 .quad system_call 1174 .quad .Lsysc_stmg 1175 .quad .Lsysc_per 1176 .quad .Lsysc_vtime+36 1177 .quad .Lsysc_vtime+42 1178.Lcleanup_system_call_const: 1179 .quad __TASK_thread 1180 1181.Lcleanup_sysc_tif: 1182 larl %r9,.Lsysc_tif 1183 br %r14 1184 1185.Lcleanup_sysc_restore: 1186 # check if stpt has been executed 1187 clg %r9,BASED(.Lcleanup_sysc_restore_insn) 1188 jh 0f 1189 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 1190 cghi %r11,__LC_SAVE_AREA_ASYNC 1191 je 0f 1192 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER 11930: clg %r9,BASED(.Lcleanup_sysc_restore_insn+8) 1194 je 1f 1195 lg %r9,24(%r11) # get saved pointer to pt_regs 1196 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) 1197 mvc 0(64,%r11),__PT_R8(%r9) 1198 lmg %r0,%r7,__PT_R0(%r9) 11991: lmg %r8,%r9,__LC_RETURN_PSW 1200 br %r14 1201.Lcleanup_sysc_restore_insn: 1202 .quad .Lsysc_exit_timer 1203 .quad .Lsysc_done - 4 1204 1205.Lcleanup_io_tif: 1206 larl %r9,.Lio_tif 1207 br %r14 1208 1209.Lcleanup_io_restore: 1210 # check if stpt has been executed 1211 clg %r9,BASED(.Lcleanup_io_restore_insn) 1212 jh 0f 1213 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER 12140: clg %r9,BASED(.Lcleanup_io_restore_insn+8) 1215 je 1f 1216 lg %r9,24(%r11) # get saved r11 pointer to pt_regs 1217 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) 1218 mvc 0(64,%r11),__PT_R8(%r9) 1219 lmg %r0,%r7,__PT_R0(%r9) 12201: lmg %r8,%r9,__LC_RETURN_PSW 1221 br %r14 1222.Lcleanup_io_restore_insn: 1223 .quad .Lio_exit_timer 1224 .quad .Lio_done - 4 1225 1226.Lcleanup_idle: 1227 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT 1228 # copy interrupt clock & cpu timer 1229 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK 1230 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER 1231 cghi %r11,__LC_SAVE_AREA_ASYNC 1232 je 0f 1233 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK 1234 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER 12350: # check if stck & stpt have been executed 1236 clg %r9,BASED(.Lcleanup_idle_insn) 1237 jhe 1f 1238 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2) 1239 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2) 12401: # calculate idle cycles 1241#ifdef CONFIG_SMP 1242 clg %r9,BASED(.Lcleanup_idle_insn) 1243 jl 3f 1244 larl %r1,smp_cpu_mtid 1245 llgf %r1,0(%r1) 1246 ltgr %r1,%r1 1247 jz 3f 1248 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15) 1249 larl %r3,mt_cycles 1250 ag %r3,__LC_PERCPU_OFFSET 1251 la %r4,__SF_EMPTY+16(%r15) 12522: lg %r0,0(%r3) 1253 slg %r0,0(%r4) 1254 alg %r0,64(%r4) 1255 stg %r0,0(%r3) 1256 la %r3,8(%r3) 1257 la %r4,8(%r4) 1258 brct %r1,2b 1259#endif 12603: # account system time going idle 1261 lg %r9,__LC_STEAL_TIMER 1262 alg %r9,__CLOCK_IDLE_ENTER(%r2) 1263 slg %r9,__LC_LAST_UPDATE_CLOCK 1264 stg %r9,__LC_STEAL_TIMER 1265 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2) 1266 lg %r9,__LC_SYSTEM_TIMER 1267 alg %r9,__LC_LAST_UPDATE_TIMER 1268 slg %r9,__TIMER_IDLE_ENTER(%r2) 1269 stg %r9,__LC_SYSTEM_TIMER 1270 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2) 1271 # prepare return psw 1272 nihh %r8,0xfcfd # clear irq & wait state bits 1273 lg %r9,48(%r11) # return from psw_idle 1274 br %r14 1275.Lcleanup_idle_insn: 1276 .quad .Lpsw_idle_lpsw 1277 1278.Lcleanup_save_fpu_regs: 1279 larl %r9,save_fpu_regs 1280 br %r14 1281 1282.Lcleanup_load_fpu_regs: 1283 larl %r9,load_fpu_regs 1284 br %r14 1285 1286/* 1287 * Integer constants 1288 */ 1289 .align 8 1290.Lcritical_start: 1291 .quad .L__critical_start 1292.Lcritical_length: 1293 .quad .L__critical_end - .L__critical_start 1294#if IS_ENABLED(CONFIG_KVM) 1295.Lsie_critical_start: 1296 .quad .Lsie_gmap 1297.Lsie_critical_length: 1298 .quad .Lsie_done - .Lsie_gmap 1299#endif 1300 1301 .section .rodata, "a" 1302#define SYSCALL(esame,emu) .long esame 1303 .globl sys_call_table 1304sys_call_table: 1305#include "syscalls.S" 1306#undef SYSCALL 1307 1308#ifdef CONFIG_COMPAT 1309 1310#define SYSCALL(esame,emu) .long emu 1311 .globl sys_call_table_emu 1312sys_call_table_emu: 1313#include "syscalls.S" 1314#undef SYSCALL 1315#endif 1316