1 #ifndef _ASM_S390_PERF_REGS_H 2 #define _ASM_S390_PERF_REGS_H 3 4 enum perf_event_s390_regs { 5 PERF_REG_S390_R0, 6 PERF_REG_S390_R1, 7 PERF_REG_S390_R2, 8 PERF_REG_S390_R3, 9 PERF_REG_S390_R4, 10 PERF_REG_S390_R5, 11 PERF_REG_S390_R6, 12 PERF_REG_S390_R7, 13 PERF_REG_S390_R8, 14 PERF_REG_S390_R9, 15 PERF_REG_S390_R10, 16 PERF_REG_S390_R11, 17 PERF_REG_S390_R12, 18 PERF_REG_S390_R13, 19 PERF_REG_S390_R14, 20 PERF_REG_S390_R15, 21 PERF_REG_S390_FP0, 22 PERF_REG_S390_FP1, 23 PERF_REG_S390_FP2, 24 PERF_REG_S390_FP3, 25 PERF_REG_S390_FP4, 26 PERF_REG_S390_FP5, 27 PERF_REG_S390_FP6, 28 PERF_REG_S390_FP7, 29 PERF_REG_S390_FP8, 30 PERF_REG_S390_FP9, 31 PERF_REG_S390_FP10, 32 PERF_REG_S390_FP11, 33 PERF_REG_S390_FP12, 34 PERF_REG_S390_FP13, 35 PERF_REG_S390_FP14, 36 PERF_REG_S390_FP15, 37 PERF_REG_S390_MASK, 38 PERF_REG_S390_PC, 39 40 PERF_REG_S390_MAX 41 }; 42 43 #endif /* _ASM_S390_PERF_REGS_H */ 44