xref: /linux/arch/s390/include/asm/qdio.h (revision d655e5b4e1c8ce207f0a1868aa334c4ecdcbddfb)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright IBM Corp. 2000, 2008
4  * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
5  *	      Jan Glauber <jang@linux.vnet.ibm.com>
6  *
7  */
8 #ifndef __QDIO_H__
9 #define __QDIO_H__
10 
11 #include <linux/interrupt.h>
12 #include <asm/cio.h>
13 #include <asm/ccwdev.h>
14 
15 /* only use 4 queues to save some cachelines */
16 #define QDIO_MAX_QUEUES_PER_IRQ		4
17 #define QDIO_MAX_BUFFERS_PER_Q		128
18 #define QDIO_MAX_BUFFERS_MASK		(QDIO_MAX_BUFFERS_PER_Q - 1)
19 #define QDIO_MAX_ELEMENTS_PER_BUFFER	16
20 #define QDIO_SBAL_SIZE			256
21 
22 #define QDIO_QETH_QFMT			0
23 #define QDIO_ZFCP_QFMT			1
24 #define QDIO_IQDIO_QFMT			2
25 
26 /**
27  * struct qdesfmt0 - queue descriptor, format 0
28  * @sliba: storage list information block address
29  * @sla: storage list address
30  * @slsba: storage list state block address
31  * @akey: access key for SLIB
32  * @bkey: access key for SL
33  * @ckey: access key for SBALs
34  * @dkey: access key for SLSB
35  */
36 struct qdesfmt0 {
37 	u64 sliba;
38 	u64 sla;
39 	u64 slsba;
40 	u32	 : 32;
41 	u32 akey : 4;
42 	u32 bkey : 4;
43 	u32 ckey : 4;
44 	u32 dkey : 4;
45 	u32	 : 16;
46 } __attribute__ ((packed));
47 
48 #define QDR_AC_MULTI_BUFFER_ENABLE 0x01
49 
50 /**
51  * struct qdr - queue description record (QDR)
52  * @qfmt: queue format
53  * @ac: adapter characteristics
54  * @iqdcnt: input queue descriptor count
55  * @oqdcnt: output queue descriptor count
56  * @iqdsz: input queue descriptor size
57  * @oqdsz: output queue descriptor size
58  * @qiba: queue information block address
59  * @qkey: queue information block key
60  * @qdf0: queue descriptions
61  */
62 struct qdr {
63 	u32 qfmt   : 8;
64 	u32	   : 16;
65 	u32 ac	   : 8;
66 	u32	   : 8;
67 	u32 iqdcnt : 8;
68 	u32	   : 8;
69 	u32 oqdcnt : 8;
70 	u32	   : 8;
71 	u32 iqdsz  : 8;
72 	u32	   : 8;
73 	u32 oqdsz  : 8;
74 	/* private: */
75 	u32 res[9];
76 	/* public: */
77 	u64 qiba;
78 	u32	   : 32;
79 	u32 qkey   : 4;
80 	u32	   : 28;
81 	struct qdesfmt0 qdf0[126];
82 } __packed __aligned(PAGE_SIZE);
83 
84 #define QIB_AC_OUTBOUND_PCI_SUPPORTED	0x40
85 #define QIB_RFLAGS_ENABLE_QEBSM		0x80
86 #define QIB_RFLAGS_ENABLE_DATA_DIV	0x02
87 
88 /**
89  * struct qib - queue information block (QIB)
90  * @qfmt: queue format
91  * @pfmt: implementation dependent parameter format
92  * @rflags: QEBSM
93  * @ac: adapter characteristics
94  * @isliba: absolute address of first input SLIB
95  * @osliba: absolute address of first output SLIB
96  * @ebcnam: adapter identifier in EBCDIC
97  * @parm: implementation dependent parameters
98  */
99 struct qib {
100 	u32 qfmt   : 8;
101 	u32 pfmt   : 8;
102 	u32 rflags : 8;
103 	u32 ac	   : 8;
104 	u32	   : 32;
105 	u64 isliba;
106 	u64 osliba;
107 	u32	   : 32;
108 	u32	   : 32;
109 	u8 ebcnam[8];
110 	/* private: */
111 	u8 res[88];
112 	/* public: */
113 	u8 parm[QDIO_MAX_BUFFERS_PER_Q];
114 } __attribute__ ((packed, aligned(256)));
115 
116 /**
117  * struct slibe - storage list information block element (SLIBE)
118  * @parms: implementation dependent parameters
119  */
120 struct slibe {
121 	u64 parms;
122 };
123 
124 /**
125  * struct qaob - queue asynchronous operation block
126  * @res0: reserved parameters
127  * @res1: reserved parameter
128  * @res2: reserved parameter
129  * @res3: reserved parameter
130  * @aorc: asynchronous operation return code
131  * @flags: internal flags
132  * @cbtbs: control block type
133  * @sb_count: number of storage blocks
134  * @sba: storage block element addresses
135  * @dcount: size of storage block elements
136  * @user0: user defineable value
137  * @res4: reserved paramater
138  * @user1: user defineable value
139  * @user2: user defineable value
140  */
141 struct qaob {
142 	u64 res0[6];
143 	u8 res1;
144 	u8 res2;
145 	u8 res3;
146 	u8 aorc;
147 	u8 flags;
148 	u16 cbtbs;
149 	u8 sb_count;
150 	u64 sba[QDIO_MAX_ELEMENTS_PER_BUFFER];
151 	u16 dcount[QDIO_MAX_ELEMENTS_PER_BUFFER];
152 	u64 user0;
153 	u64 res4[2];
154 	u64 user1;
155 	u64 user2;
156 } __attribute__ ((packed, aligned(256)));
157 
158 /**
159  * struct slib - storage list information block (SLIB)
160  * @nsliba: next SLIB address (if any)
161  * @sla: SL address
162  * @slsba: SLSB address
163  * @slibe: SLIB elements
164  */
165 struct slib {
166 	u64 nsliba;
167 	u64 sla;
168 	u64 slsba;
169 	/* private: */
170 	u8 res[1000];
171 	/* public: */
172 	struct slibe slibe[QDIO_MAX_BUFFERS_PER_Q];
173 } __attribute__ ((packed, aligned(2048)));
174 
175 #define SBAL_EFLAGS_LAST_ENTRY		0x40
176 #define SBAL_EFLAGS_CONTIGUOUS		0x20
177 #define SBAL_EFLAGS_FIRST_FRAG		0x04
178 #define SBAL_EFLAGS_MIDDLE_FRAG		0x08
179 #define SBAL_EFLAGS_LAST_FRAG		0x0c
180 #define SBAL_EFLAGS_MASK		0x6f
181 
182 #define SBAL_SFLAGS0_PCI_REQ		0x40
183 #define SBAL_SFLAGS0_DATA_CONTINUATION	0x20
184 
185 /* Awesome OpenFCP extensions */
186 #define SBAL_SFLAGS0_TYPE_STATUS	0x00
187 #define SBAL_SFLAGS0_TYPE_WRITE		0x08
188 #define SBAL_SFLAGS0_TYPE_READ		0x10
189 #define SBAL_SFLAGS0_TYPE_WRITE_READ	0x18
190 #define SBAL_SFLAGS0_MORE_SBALS		0x04
191 #define SBAL_SFLAGS0_COMMAND		0x02
192 #define SBAL_SFLAGS0_LAST_SBAL		0x00
193 #define SBAL_SFLAGS0_ONLY_SBAL		SBAL_SFLAGS0_COMMAND
194 #define SBAL_SFLAGS0_MIDDLE_SBAL	SBAL_SFLAGS0_MORE_SBALS
195 #define SBAL_SFLAGS0_FIRST_SBAL (SBAL_SFLAGS0_MORE_SBALS | SBAL_SFLAGS0_COMMAND)
196 
197 /**
198  * struct qdio_buffer_element - SBAL entry
199  * @eflags: SBAL entry flags
200  * @scount: SBAL count
201  * @sflags: whole SBAL flags
202  * @length: length
203  * @addr: address
204 */
205 struct qdio_buffer_element {
206 	u8 eflags;
207 	/* private: */
208 	u8 res1;
209 	/* public: */
210 	u8 scount;
211 	u8 sflags;
212 	u32 length;
213 	void *addr;
214 } __attribute__ ((packed, aligned(16)));
215 
216 /**
217  * struct qdio_buffer - storage block address list (SBAL)
218  * @element: SBAL entries
219  */
220 struct qdio_buffer {
221 	struct qdio_buffer_element element[QDIO_MAX_ELEMENTS_PER_BUFFER];
222 } __attribute__ ((packed, aligned(256)));
223 
224 /**
225  * struct sl_element - storage list entry
226  * @sbal: absolute SBAL address
227  */
228 struct sl_element {
229 	unsigned long sbal;
230 } __attribute__ ((packed));
231 
232 /**
233  * struct sl - storage list (SL)
234  * @element: SL entries
235  */
236 struct sl {
237 	struct sl_element element[QDIO_MAX_BUFFERS_PER_Q];
238 } __attribute__ ((packed, aligned(1024)));
239 
240 /**
241  * struct slsb - storage list state block (SLSB)
242  * @val: state per buffer
243  */
244 struct slsb {
245 	u8 val[QDIO_MAX_BUFFERS_PER_Q];
246 } __attribute__ ((packed, aligned(256)));
247 
248 /**
249  * struct qdio_outbuf_state - SBAL related asynchronous operation information
250  *   (for communication with upper layer programs)
251  *   (only required for use with completion queues)
252  * @flags: flags indicating state of buffer
253  * @user: pointer to upper layer program's state information related to SBAL
254  *        (stored in user1 data of QAOB)
255  */
256 struct qdio_outbuf_state {
257 	u8 flags;
258 	void *user;
259 };
260 
261 #define QDIO_OUTBUF_STATE_FLAG_PENDING	0x01
262 
263 #define CHSC_AC1_INITIATE_INPUTQ	0x80
264 
265 
266 /* qdio adapter-characteristics-1 flag */
267 #define AC1_SIGA_INPUT_NEEDED		0x40	/* process input queues */
268 #define AC1_SIGA_OUTPUT_NEEDED		0x20	/* process output queues */
269 #define AC1_SIGA_SYNC_NEEDED		0x10	/* ask hypervisor to sync */
270 #define AC1_AUTOMATIC_SYNC_ON_THININT	0x08	/* set by hypervisor */
271 #define AC1_AUTOMATIC_SYNC_ON_OUT_PCI	0x04	/* set by hypervisor */
272 #define AC1_SC_QEBSM_AVAILABLE		0x02	/* available for subchannel */
273 #define AC1_SC_QEBSM_ENABLED		0x01	/* enabled for subchannel */
274 
275 #define CHSC_AC2_MULTI_BUFFER_AVAILABLE	0x0080
276 #define CHSC_AC2_MULTI_BUFFER_ENABLED	0x0040
277 #define CHSC_AC2_DATA_DIV_AVAILABLE	0x0010
278 #define CHSC_AC2_DATA_DIV_ENABLED	0x0002
279 
280 #define CHSC_AC3_FORMAT2_CQ_AVAILABLE	0x8000
281 
282 struct qdio_ssqd_desc {
283 	u8 flags;
284 	u8:8;
285 	u16 sch;
286 	u8 qfmt;
287 	u8 parm;
288 	u8 qdioac1;
289 	u8 sch_class;
290 	u8 pcnt;
291 	u8 icnt;
292 	u8:8;
293 	u8 ocnt;
294 	u8:8;
295 	u8 mbccnt;
296 	u16 qdioac2;
297 	u64 sch_token;
298 	u8 mro;
299 	u8 mri;
300 	u16 qdioac3;
301 	u16:16;
302 	u8:8;
303 	u8 mmwc;
304 } __attribute__ ((packed));
305 
306 /* params are: ccw_device, qdio_error, queue_number,
307    first element processed, number of elements processed, int_parm */
308 typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
309 			    int, int, unsigned long);
310 
311 /* qdio errors reported to the upper-layer program */
312 #define QDIO_ERROR_ACTIVATE			0x0001
313 #define QDIO_ERROR_GET_BUF_STATE		0x0002
314 #define QDIO_ERROR_SET_BUF_STATE		0x0004
315 #define QDIO_ERROR_SLSB_STATE			0x0100
316 
317 #define QDIO_ERROR_FATAL			0x00ff
318 #define QDIO_ERROR_TEMPORARY			0xff00
319 
320 /* for qdio_cleanup */
321 #define QDIO_FLAG_CLEANUP_USING_CLEAR		0x01
322 #define QDIO_FLAG_CLEANUP_USING_HALT		0x02
323 
324 /**
325  * struct qdio_initialize - qdio initialization data
326  * @cdev: associated ccw device
327  * @q_format: queue format
328  * @qdr_ac: feature flags to set
329  * @adapter_name: name for the adapter
330  * @qib_param_field_format: format for qib_parm_field
331  * @qib_param_field: pointer to 128 bytes or NULL, if no param field
332  * @qib_rflags: rflags to set
333  * @input_slib_elements: pointer to no_input_qs * 128 words of data or NULL
334  * @output_slib_elements: pointer to no_output_qs * 128 words of data or NULL
335  * @no_input_qs: number of input queues
336  * @no_output_qs: number of output queues
337  * @input_handler: handler to be called for input queues
338  * @output_handler: handler to be called for output queues
339  * @queue_start_poll_array: polling handlers (one per input queue or NULL)
340  * @scan_threshold: # of in-use buffers that triggers scan on output queue
341  * @int_parm: interruption parameter
342  * @input_sbal_addr_array:  address of no_input_qs * 128 pointers
343  * @output_sbal_addr_array: address of no_output_qs * 128 pointers
344  * @output_sbal_state_array: no_output_qs * 128 state info (for CQ or NULL)
345  */
346 struct qdio_initialize {
347 	struct ccw_device *cdev;
348 	unsigned char q_format;
349 	unsigned char qdr_ac;
350 	unsigned char adapter_name[8];
351 	unsigned int qib_param_field_format;
352 	unsigned char *qib_param_field;
353 	unsigned char qib_rflags;
354 	unsigned long *input_slib_elements;
355 	unsigned long *output_slib_elements;
356 	unsigned int no_input_qs;
357 	unsigned int no_output_qs;
358 	qdio_handler_t *input_handler;
359 	qdio_handler_t *output_handler;
360 	void (**queue_start_poll_array) (struct ccw_device *, int,
361 					  unsigned long);
362 	int scan_threshold;
363 	unsigned long int_parm;
364 	struct qdio_buffer **input_sbal_addr_array;
365 	struct qdio_buffer **output_sbal_addr_array;
366 	struct qdio_outbuf_state *output_sbal_state_array;
367 };
368 
369 /**
370  * enum qdio_brinfo_entry_type - type of address entry for qdio_brinfo_desc()
371  * @l3_ipv6_addr: entry contains IPv6 address
372  * @l3_ipv4_addr: entry contains IPv4 address
373  * @l2_addr_lnid: entry contains MAC address and VLAN ID
374  */
375 enum qdio_brinfo_entry_type {l3_ipv6_addr, l3_ipv4_addr, l2_addr_lnid};
376 
377 /**
378  * struct qdio_brinfo_entry_XXX - Address entry for qdio_brinfo_desc()
379  * @nit:  Network interface token
380  * @addr: Address of one of the three types
381  *
382  * The struct is passed to the callback function by qdio_brinfo_desc()
383  */
384 struct qdio_brinfo_entry_l3_ipv6 {
385 	u64 nit;
386 	struct { unsigned char _s6_addr[16]; } addr;
387 } __packed;
388 struct qdio_brinfo_entry_l3_ipv4 {
389 	u64 nit;
390 	struct { uint32_t _s_addr; } addr;
391 } __packed;
392 struct qdio_brinfo_entry_l2 {
393 	u64 nit;
394 	struct { u8 mac[6]; u16 lnid; } addr_lnid;
395 } __packed;
396 
397 #define QDIO_STATE_INACTIVE		0x00000002 /* after qdio_cleanup */
398 #define QDIO_STATE_ESTABLISHED		0x00000004 /* after qdio_establish */
399 #define QDIO_STATE_ACTIVE		0x00000008 /* after qdio_activate */
400 #define QDIO_STATE_STOPPED		0x00000010 /* after queues went down */
401 
402 #define QDIO_FLAG_SYNC_INPUT		0x01
403 #define QDIO_FLAG_SYNC_OUTPUT		0x02
404 #define QDIO_FLAG_PCI_OUT		0x10
405 
406 int qdio_alloc_buffers(struct qdio_buffer **buf, unsigned int count);
407 void qdio_free_buffers(struct qdio_buffer **buf, unsigned int count);
408 void qdio_reset_buffers(struct qdio_buffer **buf, unsigned int count);
409 
410 extern int qdio_allocate(struct qdio_initialize *);
411 extern int qdio_establish(struct qdio_initialize *);
412 extern int qdio_activate(struct ccw_device *);
413 extern void qdio_release_aob(struct qaob *);
414 extern int do_QDIO(struct ccw_device *, unsigned int, int, unsigned int,
415 		   unsigned int);
416 extern int qdio_start_irq(struct ccw_device *, int);
417 extern int qdio_stop_irq(struct ccw_device *, int);
418 extern int qdio_get_next_buffers(struct ccw_device *, int, int *, int *);
419 extern int qdio_shutdown(struct ccw_device *, int);
420 extern int qdio_free(struct ccw_device *);
421 extern int qdio_get_ssqd_desc(struct ccw_device *, struct qdio_ssqd_desc *);
422 extern int qdio_pnso_brinfo(struct subchannel_id schid,
423 		int cnc, u16 *response,
424 		void (*cb)(void *priv, enum qdio_brinfo_entry_type type,
425 				void *entry),
426 		void *priv);
427 
428 #endif /* __QDIO_H__ */
429