1 /* 2 * S390 version 3 * Copyright IBM Corp. 1999, 2000 4 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) 5 */ 6 #ifndef _S390_PTRACE_H 7 #define _S390_PTRACE_H 8 9 #include <uapi/asm/ptrace.h> 10 11 #define PIF_SYSCALL 0 /* inside a system call */ 12 #define PIF_PER_TRAP 1 /* deliver sigtrap on return to user */ 13 14 #define _PIF_SYSCALL (1<<PIF_SYSCALL) 15 #define _PIF_PER_TRAP (1<<PIF_PER_TRAP) 16 17 #ifndef __ASSEMBLY__ 18 19 #define PSW_KERNEL_BITS (PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_ASC_HOME | \ 20 PSW_MASK_EA | PSW_MASK_BA) 21 #define PSW_USER_BITS (PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \ 22 PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_MCHECK | \ 23 PSW_MASK_PSTATE | PSW_ASC_PRIMARY) 24 25 struct psw_bits { 26 unsigned long long : 1; 27 unsigned long long r : 1; /* PER-Mask */ 28 unsigned long long : 3; 29 unsigned long long t : 1; /* DAT Mode */ 30 unsigned long long i : 1; /* Input/Output Mask */ 31 unsigned long long e : 1; /* External Mask */ 32 unsigned long long key : 4; /* PSW Key */ 33 unsigned long long : 1; 34 unsigned long long m : 1; /* Machine-Check Mask */ 35 unsigned long long w : 1; /* Wait State */ 36 unsigned long long p : 1; /* Problem State */ 37 unsigned long long as : 2; /* Address Space Control */ 38 unsigned long long cc : 2; /* Condition Code */ 39 unsigned long long pm : 4; /* Program Mask */ 40 unsigned long long ri : 1; /* Runtime Instrumentation */ 41 unsigned long long : 6; 42 unsigned long long eaba : 2; /* Addressing Mode */ 43 unsigned long long : 31; 44 unsigned long long ia : 64;/* Instruction Address */ 45 }; 46 47 enum { 48 PSW_AMODE_24BIT = 0, 49 PSW_AMODE_31BIT = 1, 50 PSW_AMODE_64BIT = 3 51 }; 52 53 enum { 54 PSW_AS_PRIMARY = 0, 55 PSW_AS_ACCREG = 1, 56 PSW_AS_SECONDARY = 2, 57 PSW_AS_HOME = 3 58 }; 59 60 #define psw_bits(__psw) (*({ \ 61 typecheck(psw_t, __psw); \ 62 &(*(struct psw_bits *)(&(__psw))); \ 63 })) 64 65 /* 66 * The pt_regs struct defines the way the registers are stored on 67 * the stack during a system call. 68 */ 69 struct pt_regs 70 { 71 unsigned long args[1]; 72 psw_t psw; 73 unsigned long gprs[NUM_GPRS]; 74 unsigned long orig_gpr2; 75 unsigned int int_code; 76 unsigned int int_parm; 77 unsigned long int_parm_long; 78 unsigned long flags; 79 }; 80 81 /* 82 * Program event recording (PER) register set. 83 */ 84 struct per_regs { 85 unsigned long control; /* PER control bits */ 86 unsigned long start; /* PER starting address */ 87 unsigned long end; /* PER ending address */ 88 }; 89 90 /* 91 * PER event contains information about the cause of the last PER exception. 92 */ 93 struct per_event { 94 unsigned short cause; /* PER code, ATMID and AI */ 95 unsigned long address; /* PER address */ 96 unsigned char paid; /* PER access identification */ 97 }; 98 99 /* 100 * Simplified per_info structure used to decode the ptrace user space ABI. 101 */ 102 struct per_struct_kernel { 103 unsigned long cr9; /* PER control bits */ 104 unsigned long cr10; /* PER starting address */ 105 unsigned long cr11; /* PER ending address */ 106 unsigned long bits; /* Obsolete software bits */ 107 unsigned long starting_addr; /* User specified start address */ 108 unsigned long ending_addr; /* User specified end address */ 109 unsigned short perc_atmid; /* PER trap ATMID */ 110 unsigned long address; /* PER trap instruction address */ 111 unsigned char access_id; /* PER trap access identification */ 112 }; 113 114 #define PER_EVENT_MASK 0xEB000000UL 115 116 #define PER_EVENT_BRANCH 0x80000000UL 117 #define PER_EVENT_IFETCH 0x40000000UL 118 #define PER_EVENT_STORE 0x20000000UL 119 #define PER_EVENT_STORE_REAL 0x08000000UL 120 #define PER_EVENT_TRANSACTION_END 0x02000000UL 121 #define PER_EVENT_NULLIFICATION 0x01000000UL 122 123 #define PER_CONTROL_MASK 0x00e00000UL 124 125 #define PER_CONTROL_BRANCH_ADDRESS 0x00800000UL 126 #define PER_CONTROL_SUSPENSION 0x00400000UL 127 #define PER_CONTROL_ALTERATION 0x00200000UL 128 129 static inline void set_pt_regs_flag(struct pt_regs *regs, int flag) 130 { 131 regs->flags |= (1U << flag); 132 } 133 134 static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag) 135 { 136 regs->flags &= ~(1U << flag); 137 } 138 139 static inline int test_pt_regs_flag(struct pt_regs *regs, int flag) 140 { 141 return !!(regs->flags & (1U << flag)); 142 } 143 144 /* 145 * These are defined as per linux/ptrace.h, which see. 146 */ 147 #define arch_has_single_step() (1) 148 #define arch_has_block_step() (1) 149 150 #define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0) 151 #define instruction_pointer(regs) ((regs)->psw.addr & PSW_ADDR_INSN) 152 #define user_stack_pointer(regs)((regs)->gprs[15]) 153 #define profile_pc(regs) instruction_pointer(regs) 154 155 static inline long regs_return_value(struct pt_regs *regs) 156 { 157 return regs->gprs[2]; 158 } 159 160 static inline void instruction_pointer_set(struct pt_regs *regs, 161 unsigned long val) 162 { 163 regs->psw.addr = val | PSW_ADDR_AMODE; 164 } 165 166 int regs_query_register_offset(const char *name); 167 const char *regs_query_register_name(unsigned int offset); 168 unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset); 169 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n); 170 171 static inline unsigned long kernel_stack_pointer(struct pt_regs *regs) 172 { 173 return regs->gprs[15] & PSW_ADDR_INSN; 174 } 175 176 #endif /* __ASSEMBLY__ */ 177 #endif /* _S390_PTRACE_H */ 178