1 /* 2 * S390 version 3 * Copyright IBM Corp. 1999 4 * Author(s): Hartmut Penner (hp@de.ibm.com), 5 * Martin Schwidefsky (schwidefsky@de.ibm.com) 6 * 7 * Derived from "include/asm-i386/processor.h" 8 * Copyright (C) 1994, Linus Torvalds 9 */ 10 11 #ifndef __ASM_S390_PROCESSOR_H 12 #define __ASM_S390_PROCESSOR_H 13 14 #include <linux/const.h> 15 16 #define CIF_MCCK_PENDING 0 /* machine check handling is pending */ 17 #define CIF_ASCE_PRIMARY 1 /* primary asce needs fixup / uaccess */ 18 #define CIF_ASCE_SECONDARY 2 /* secondary asce needs fixup / uaccess */ 19 #define CIF_NOHZ_DELAY 3 /* delay HZ disable for a tick */ 20 #define CIF_FPU 4 /* restore FPU registers */ 21 #define CIF_IGNORE_IRQ 5 /* ignore interrupt (for udelay) */ 22 #define CIF_ENABLED_WAIT 6 /* in enabled wait state */ 23 24 #define _CIF_MCCK_PENDING _BITUL(CIF_MCCK_PENDING) 25 #define _CIF_ASCE_PRIMARY _BITUL(CIF_ASCE_PRIMARY) 26 #define _CIF_ASCE_SECONDARY _BITUL(CIF_ASCE_SECONDARY) 27 #define _CIF_NOHZ_DELAY _BITUL(CIF_NOHZ_DELAY) 28 #define _CIF_FPU _BITUL(CIF_FPU) 29 #define _CIF_IGNORE_IRQ _BITUL(CIF_IGNORE_IRQ) 30 #define _CIF_ENABLED_WAIT _BITUL(CIF_ENABLED_WAIT) 31 32 #ifndef __ASSEMBLY__ 33 34 #include <linux/linkage.h> 35 #include <linux/irqflags.h> 36 #include <asm/cpu.h> 37 #include <asm/page.h> 38 #include <asm/ptrace.h> 39 #include <asm/setup.h> 40 #include <asm/runtime_instr.h> 41 #include <asm/fpu/types.h> 42 #include <asm/fpu/internal.h> 43 44 static inline void set_cpu_flag(int flag) 45 { 46 S390_lowcore.cpu_flags |= (1UL << flag); 47 } 48 49 static inline void clear_cpu_flag(int flag) 50 { 51 S390_lowcore.cpu_flags &= ~(1UL << flag); 52 } 53 54 static inline int test_cpu_flag(int flag) 55 { 56 return !!(S390_lowcore.cpu_flags & (1UL << flag)); 57 } 58 59 /* 60 * Test CIF flag of another CPU. The caller needs to ensure that 61 * CPU hotplug can not happen, e.g. by disabling preemption. 62 */ 63 static inline int test_cpu_flag_of(int flag, int cpu) 64 { 65 struct lowcore *lc = lowcore_ptr[cpu]; 66 return !!(lc->cpu_flags & (1UL << flag)); 67 } 68 69 #define arch_needs_cpu() test_cpu_flag(CIF_NOHZ_DELAY) 70 71 /* 72 * Default implementation of macro that returns current 73 * instruction pointer ("program counter"). 74 */ 75 #define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; }) 76 77 static inline void get_cpu_id(struct cpuid *ptr) 78 { 79 asm volatile("stidp %0" : "=Q" (*ptr)); 80 } 81 82 void s390_adjust_jiffies(void); 83 void s390_update_cpu_mhz(void); 84 void cpu_detect_mhz_feature(void); 85 86 extern const struct seq_operations cpuinfo_op; 87 extern int sysctl_ieee_emulation_warnings; 88 extern void execve_tail(void); 89 90 /* 91 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit. 92 */ 93 94 #define TASK_SIZE_OF(tsk) ((tsk)->mm ? \ 95 (tsk)->mm->context.asce_limit : TASK_MAX_SIZE) 96 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \ 97 (1UL << 30) : (1UL << 41)) 98 #define TASK_SIZE TASK_SIZE_OF(current) 99 #define TASK_MAX_SIZE (1UL << 53) 100 101 #define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42)) 102 #define STACK_TOP_MAX (1UL << 42) 103 104 #define HAVE_ARCH_PICK_MMAP_LAYOUT 105 106 typedef struct { 107 __u32 ar4; 108 } mm_segment_t; 109 110 /* 111 * Thread structure 112 */ 113 struct thread_struct { 114 unsigned int acrs[NUM_ACRS]; 115 unsigned long ksp; /* kernel stack pointer */ 116 unsigned long user_timer; /* task cputime in user space */ 117 unsigned long guest_timer; /* task cputime in kvm guest */ 118 unsigned long system_timer; /* task cputime in kernel space */ 119 unsigned long hardirq_timer; /* task cputime in hardirq context */ 120 unsigned long softirq_timer; /* task cputime in softirq context */ 121 unsigned long sys_call_table; /* system call table address */ 122 mm_segment_t mm_segment; 123 unsigned long gmap_addr; /* address of last gmap fault. */ 124 unsigned int gmap_write_flag; /* gmap fault write indication */ 125 unsigned int gmap_int_code; /* int code of last gmap fault */ 126 unsigned int gmap_pfault; /* signal of a pending guest pfault */ 127 /* Per-thread information related to debugging */ 128 struct per_regs per_user; /* User specified PER registers */ 129 struct per_event per_event; /* Cause of the last PER trap */ 130 unsigned long per_flags; /* Flags to control debug behavior */ 131 unsigned int system_call; /* system call number in signal */ 132 unsigned long last_break; /* last breaking-event-address. */ 133 /* pfault_wait is used to block the process on a pfault event */ 134 unsigned long pfault_wait; 135 struct list_head list; 136 /* cpu runtime instrumentation */ 137 struct runtime_instr_cb *ri_cb; 138 unsigned char trap_tdb[256]; /* Transaction abort diagnose block */ 139 /* 140 * Warning: 'fpu' is dynamically-sized. It *MUST* be at 141 * the end. 142 */ 143 struct fpu fpu; /* FP and VX register save area */ 144 }; 145 146 /* Flag to disable transactions. */ 147 #define PER_FLAG_NO_TE 1UL 148 /* Flag to enable random transaction aborts. */ 149 #define PER_FLAG_TE_ABORT_RAND 2UL 150 /* Flag to specify random transaction abort mode: 151 * - abort each transaction at a random instruction before TEND if set. 152 * - abort random transactions at a random instruction if cleared. 153 */ 154 #define PER_FLAG_TE_ABORT_RAND_TEND 4UL 155 156 typedef struct thread_struct thread_struct; 157 158 /* 159 * Stack layout of a C stack frame. 160 */ 161 #ifndef __PACK_STACK 162 struct stack_frame { 163 unsigned long back_chain; 164 unsigned long empty1[5]; 165 unsigned long gprs[10]; 166 unsigned int empty2[8]; 167 }; 168 #else 169 struct stack_frame { 170 unsigned long empty1[5]; 171 unsigned int empty2[8]; 172 unsigned long gprs[10]; 173 unsigned long back_chain; 174 }; 175 #endif 176 177 #define ARCH_MIN_TASKALIGN 8 178 179 #define INIT_THREAD { \ 180 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \ 181 .fpu.regs = (void *) init_task.thread.fpu.fprs, \ 182 } 183 184 /* 185 * Do necessary setup to start up a new thread. 186 */ 187 #define start_thread(regs, new_psw, new_stackp) do { \ 188 regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \ 189 regs->psw.addr = new_psw; \ 190 regs->gprs[15] = new_stackp; \ 191 execve_tail(); \ 192 } while (0) 193 194 #define start_thread31(regs, new_psw, new_stackp) do { \ 195 regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \ 196 regs->psw.addr = new_psw; \ 197 regs->gprs[15] = new_stackp; \ 198 crst_table_downgrade(current->mm); \ 199 execve_tail(); \ 200 } while (0) 201 202 /* Forward declaration, a strange C thing */ 203 struct task_struct; 204 struct mm_struct; 205 struct seq_file; 206 struct pt_regs; 207 208 typedef int (*dump_trace_func_t)(void *data, unsigned long address, int reliable); 209 void dump_trace(dump_trace_func_t func, void *data, 210 struct task_struct *task, unsigned long sp); 211 void show_registers(struct pt_regs *regs); 212 213 void show_cacheinfo(struct seq_file *m); 214 215 /* Free all resources held by a thread. */ 216 extern void release_thread(struct task_struct *); 217 218 /* 219 * Return saved PC of a blocked thread. 220 */ 221 extern unsigned long thread_saved_pc(struct task_struct *t); 222 223 unsigned long get_wchan(struct task_struct *p); 224 #define task_pt_regs(tsk) ((struct pt_regs *) \ 225 (task_stack_page(tsk) + THREAD_SIZE) - 1) 226 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr) 227 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15]) 228 229 /* Has task runtime instrumentation enabled ? */ 230 #define is_ri_task(tsk) (!!(tsk)->thread.ri_cb) 231 232 static inline unsigned long current_stack_pointer(void) 233 { 234 unsigned long sp; 235 236 asm volatile("la %0,0(15)" : "=a" (sp)); 237 return sp; 238 } 239 240 static inline unsigned short stap(void) 241 { 242 unsigned short cpu_address; 243 244 asm volatile("stap %0" : "=m" (cpu_address)); 245 return cpu_address; 246 } 247 248 /* 249 * Give up the time slice of the virtual PU. 250 */ 251 #define cpu_relax_yield cpu_relax_yield 252 void cpu_relax_yield(void); 253 254 #define cpu_relax() barrier() 255 256 #define ECAG_CACHE_ATTRIBUTE 0 257 #define ECAG_CPU_ATTRIBUTE 1 258 259 static inline unsigned long __ecag(unsigned int asi, unsigned char parm) 260 { 261 unsigned long val; 262 263 asm volatile(".insn rsy,0xeb000000004c,%0,0,0(%1)" /* ecag */ 264 : "=d" (val) : "a" (asi << 8 | parm)); 265 return val; 266 } 267 268 static inline void psw_set_key(unsigned int key) 269 { 270 asm volatile("spka 0(%0)" : : "d" (key)); 271 } 272 273 /* 274 * Set PSW to specified value. 275 */ 276 static inline void __load_psw(psw_t psw) 277 { 278 asm volatile("lpswe %0" : : "Q" (psw) : "cc"); 279 } 280 281 /* 282 * Set PSW mask to specified value, while leaving the 283 * PSW addr pointing to the next instruction. 284 */ 285 static inline void __load_psw_mask(unsigned long mask) 286 { 287 unsigned long addr; 288 psw_t psw; 289 290 psw.mask = mask; 291 292 asm volatile( 293 " larl %0,1f\n" 294 " stg %0,%O1+8(%R1)\n" 295 " lpswe %1\n" 296 "1:" 297 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc"); 298 } 299 300 /* 301 * Extract current PSW mask 302 */ 303 static inline unsigned long __extract_psw(void) 304 { 305 unsigned int reg1, reg2; 306 307 asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2)); 308 return (((unsigned long) reg1) << 32) | ((unsigned long) reg2); 309 } 310 311 static inline void local_mcck_enable(void) 312 { 313 __load_psw_mask(__extract_psw() | PSW_MASK_MCHECK); 314 } 315 316 static inline void local_mcck_disable(void) 317 { 318 __load_psw_mask(__extract_psw() & ~PSW_MASK_MCHECK); 319 } 320 321 /* 322 * Rewind PSW instruction address by specified number of bytes. 323 */ 324 static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc) 325 { 326 unsigned long mask; 327 328 mask = (psw.mask & PSW_MASK_EA) ? -1UL : 329 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 : 330 (1UL << 24) - 1; 331 return (psw.addr - ilc) & mask; 332 } 333 334 /* 335 * Function to stop a processor until the next interrupt occurs 336 */ 337 void enabled_wait(void); 338 339 /* 340 * Function to drop a processor into disabled wait state 341 */ 342 static inline void __noreturn disabled_wait(unsigned long code) 343 { 344 psw_t psw; 345 346 psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA; 347 psw.addr = code; 348 __load_psw(psw); 349 while (1); 350 } 351 352 /* 353 * Basic Machine Check/Program Check Handler. 354 */ 355 356 extern void s390_base_mcck_handler(void); 357 extern void s390_base_pgm_handler(void); 358 extern void s390_base_ext_handler(void); 359 360 extern void (*s390_base_mcck_handler_fn)(void); 361 extern void (*s390_base_pgm_handler_fn)(void); 362 extern void (*s390_base_ext_handler_fn)(void); 363 364 #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL 365 366 extern int memcpy_real(void *, void *, size_t); 367 extern void memcpy_absolute(void *, void *, size_t); 368 369 #define mem_assign_absolute(dest, val) do { \ 370 __typeof__(dest) __tmp = (val); \ 371 \ 372 BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \ 373 memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \ 374 } while (0) 375 376 #endif /* __ASSEMBLY__ */ 377 378 #endif /* __ASM_S390_PROCESSOR_H */ 379