1 /* 2 * S390 version 3 * Copyright IBM Corp. 1999 4 * Author(s): Hartmut Penner (hp@de.ibm.com), 5 * Martin Schwidefsky (schwidefsky@de.ibm.com) 6 * 7 * Derived from "include/asm-i386/processor.h" 8 * Copyright (C) 1994, Linus Torvalds 9 */ 10 11 #ifndef __ASM_S390_PROCESSOR_H 12 #define __ASM_S390_PROCESSOR_H 13 14 #include <linux/linkage.h> 15 #include <linux/irqflags.h> 16 #include <asm/cpu.h> 17 #include <asm/page.h> 18 #include <asm/ptrace.h> 19 #include <asm/setup.h> 20 21 /* 22 * Default implementation of macro that returns current 23 * instruction pointer ("program counter"). 24 */ 25 #define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; }) 26 27 static inline void get_cpu_id(struct cpuid *ptr) 28 { 29 asm volatile("stidp %0" : "=Q" (*ptr)); 30 } 31 32 extern void s390_adjust_jiffies(void); 33 extern const struct seq_operations cpuinfo_op; 34 extern int sysctl_ieee_emulation_warnings; 35 36 /* 37 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit. 38 */ 39 #ifndef CONFIG_64BIT 40 41 #define TASK_SIZE (1UL << 31) 42 #define TASK_UNMAPPED_BASE (1UL << 30) 43 44 #else /* CONFIG_64BIT */ 45 46 #define TASK_SIZE_OF(tsk) ((tsk)->mm->context.asce_limit) 47 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \ 48 (1UL << 30) : (1UL << 41)) 49 #define TASK_SIZE TASK_SIZE_OF(current) 50 51 #endif /* CONFIG_64BIT */ 52 53 #ifndef CONFIG_64BIT 54 #define STACK_TOP (1UL << 31) 55 #define STACK_TOP_MAX (1UL << 31) 56 #else /* CONFIG_64BIT */ 57 #define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42)) 58 #define STACK_TOP_MAX (1UL << 42) 59 #endif /* CONFIG_64BIT */ 60 61 #define HAVE_ARCH_PICK_MMAP_LAYOUT 62 63 typedef struct { 64 __u32 ar4; 65 } mm_segment_t; 66 67 /* 68 * Thread structure 69 */ 70 struct thread_struct { 71 s390_fp_regs fp_regs; 72 unsigned int acrs[NUM_ACRS]; 73 unsigned long ksp; /* kernel stack pointer */ 74 mm_segment_t mm_segment; 75 unsigned long gmap_addr; /* address of last gmap fault. */ 76 struct per_regs per_user; /* User specified PER registers */ 77 struct per_event per_event; /* Cause of the last PER trap */ 78 /* pfault_wait is used to block the process on a pfault event */ 79 unsigned long pfault_wait; 80 struct list_head list; 81 }; 82 83 typedef struct thread_struct thread_struct; 84 85 /* 86 * Stack layout of a C stack frame. 87 */ 88 #ifndef __PACK_STACK 89 struct stack_frame { 90 unsigned long back_chain; 91 unsigned long empty1[5]; 92 unsigned long gprs[10]; 93 unsigned int empty2[8]; 94 }; 95 #else 96 struct stack_frame { 97 unsigned long empty1[5]; 98 unsigned int empty2[8]; 99 unsigned long gprs[10]; 100 unsigned long back_chain; 101 }; 102 #endif 103 104 #define ARCH_MIN_TASKALIGN 8 105 106 #define INIT_THREAD { \ 107 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \ 108 } 109 110 /* 111 * Do necessary setup to start up a new thread. 112 */ 113 #define start_thread(regs, new_psw, new_stackp) do { \ 114 regs->psw.mask = psw_user_bits | PSW_MASK_EA | PSW_MASK_BA; \ 115 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \ 116 regs->gprs[15] = new_stackp; \ 117 } while (0) 118 119 #define start_thread31(regs, new_psw, new_stackp) do { \ 120 regs->psw.mask = psw_user_bits | PSW_MASK_BA; \ 121 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \ 122 regs->gprs[15] = new_stackp; \ 123 crst_table_downgrade(current->mm, 1UL << 31); \ 124 } while (0) 125 126 /* Forward declaration, a strange C thing */ 127 struct task_struct; 128 struct mm_struct; 129 struct seq_file; 130 131 /* Free all resources held by a thread. */ 132 extern void release_thread(struct task_struct *); 133 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); 134 135 /* 136 * Return saved PC of a blocked thread. 137 */ 138 extern unsigned long thread_saved_pc(struct task_struct *t); 139 140 extern void show_code(struct pt_regs *regs); 141 142 unsigned long get_wchan(struct task_struct *p); 143 #define task_pt_regs(tsk) ((struct pt_regs *) \ 144 (task_stack_page(tsk) + THREAD_SIZE) - 1) 145 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr) 146 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15]) 147 148 static inline unsigned short stap(void) 149 { 150 unsigned short cpu_address; 151 152 asm volatile("stap %0" : "=m" (cpu_address)); 153 return cpu_address; 154 } 155 156 /* 157 * Give up the time slice of the virtual PU. 158 */ 159 static inline void cpu_relax(void) 160 { 161 if (MACHINE_HAS_DIAG44) 162 asm volatile("diag 0,0,68"); 163 barrier(); 164 } 165 166 static inline void psw_set_key(unsigned int key) 167 { 168 asm volatile("spka 0(%0)" : : "d" (key)); 169 } 170 171 /* 172 * Set PSW to specified value. 173 */ 174 static inline void __load_psw(psw_t psw) 175 { 176 #ifndef CONFIG_64BIT 177 asm volatile("lpsw %0" : : "Q" (psw) : "cc"); 178 #else 179 asm volatile("lpswe %0" : : "Q" (psw) : "cc"); 180 #endif 181 } 182 183 /* 184 * Set PSW mask to specified value, while leaving the 185 * PSW addr pointing to the next instruction. 186 */ 187 static inline void __load_psw_mask (unsigned long mask) 188 { 189 unsigned long addr; 190 psw_t psw; 191 192 psw.mask = mask; 193 194 #ifndef CONFIG_64BIT 195 asm volatile( 196 " basr %0,0\n" 197 "0: ahi %0,1f-0b\n" 198 " st %0,%O1+4(%R1)\n" 199 " lpsw %1\n" 200 "1:" 201 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc"); 202 #else /* CONFIG_64BIT */ 203 asm volatile( 204 " larl %0,1f\n" 205 " stg %0,%O1+8(%R1)\n" 206 " lpswe %1\n" 207 "1:" 208 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc"); 209 #endif /* CONFIG_64BIT */ 210 } 211 212 /* 213 * Rewind PSW instruction address by specified number of bytes. 214 */ 215 static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc) 216 { 217 #ifndef CONFIG_64BIT 218 if (psw.addr & PSW_ADDR_AMODE) 219 /* 31 bit mode */ 220 return (psw.addr - ilc) | PSW_ADDR_AMODE; 221 /* 24 bit mode */ 222 return (psw.addr - ilc) & ((1UL << 24) - 1); 223 #else 224 unsigned long mask; 225 226 mask = (psw.mask & PSW_MASK_EA) ? -1UL : 227 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 : 228 (1UL << 24) - 1; 229 return (psw.addr - ilc) & mask; 230 #endif 231 } 232 233 /* 234 * Function to drop a processor into disabled wait state 235 */ 236 static inline void __noreturn disabled_wait(unsigned long code) 237 { 238 unsigned long ctl_buf; 239 psw_t dw_psw; 240 241 dw_psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA; 242 dw_psw.addr = code; 243 /* 244 * Store status and then load disabled wait psw, 245 * the processor is dead afterwards 246 */ 247 #ifndef CONFIG_64BIT 248 asm volatile( 249 " stctl 0,0,0(%2)\n" 250 " ni 0(%2),0xef\n" /* switch off protection */ 251 " lctl 0,0,0(%2)\n" 252 " stpt 0xd8\n" /* store timer */ 253 " stckc 0xe0\n" /* store clock comparator */ 254 " stpx 0x108\n" /* store prefix register */ 255 " stam 0,15,0x120\n" /* store access registers */ 256 " std 0,0x160\n" /* store f0 */ 257 " std 2,0x168\n" /* store f2 */ 258 " std 4,0x170\n" /* store f4 */ 259 " std 6,0x178\n" /* store f6 */ 260 " stm 0,15,0x180\n" /* store general registers */ 261 " stctl 0,15,0x1c0\n" /* store control registers */ 262 " oi 0x1c0,0x10\n" /* fake protection bit */ 263 " lpsw 0(%1)" 264 : "=m" (ctl_buf) 265 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc"); 266 #else /* CONFIG_64BIT */ 267 asm volatile( 268 " stctg 0,0,0(%2)\n" 269 " ni 4(%2),0xef\n" /* switch off protection */ 270 " lctlg 0,0,0(%2)\n" 271 " lghi 1,0x1000\n" 272 " stpt 0x328(1)\n" /* store timer */ 273 " stckc 0x330(1)\n" /* store clock comparator */ 274 " stpx 0x318(1)\n" /* store prefix register */ 275 " stam 0,15,0x340(1)\n"/* store access registers */ 276 " stfpc 0x31c(1)\n" /* store fpu control */ 277 " std 0,0x200(1)\n" /* store f0 */ 278 " std 1,0x208(1)\n" /* store f1 */ 279 " std 2,0x210(1)\n" /* store f2 */ 280 " std 3,0x218(1)\n" /* store f3 */ 281 " std 4,0x220(1)\n" /* store f4 */ 282 " std 5,0x228(1)\n" /* store f5 */ 283 " std 6,0x230(1)\n" /* store f6 */ 284 " std 7,0x238(1)\n" /* store f7 */ 285 " std 8,0x240(1)\n" /* store f8 */ 286 " std 9,0x248(1)\n" /* store f9 */ 287 " std 10,0x250(1)\n" /* store f10 */ 288 " std 11,0x258(1)\n" /* store f11 */ 289 " std 12,0x260(1)\n" /* store f12 */ 290 " std 13,0x268(1)\n" /* store f13 */ 291 " std 14,0x270(1)\n" /* store f14 */ 292 " std 15,0x278(1)\n" /* store f15 */ 293 " stmg 0,15,0x280(1)\n"/* store general registers */ 294 " stctg 0,15,0x380(1)\n"/* store control registers */ 295 " oi 0x384(1),0x10\n"/* fake protection bit */ 296 " lpswe 0(%1)" 297 : "=m" (ctl_buf) 298 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0", "1"); 299 #endif /* CONFIG_64BIT */ 300 while (1); 301 } 302 303 /* 304 * Use to set psw mask except for the first byte which 305 * won't be changed by this function. 306 */ 307 static inline void 308 __set_psw_mask(unsigned long mask) 309 { 310 __load_psw_mask(mask | (arch_local_save_flags() & ~(-1UL >> 8))); 311 } 312 313 #define local_mcck_enable() \ 314 __set_psw_mask(psw_kernel_bits | PSW_MASK_DAT | PSW_MASK_MCHECK) 315 #define local_mcck_disable() \ 316 __set_psw_mask(psw_kernel_bits | PSW_MASK_DAT) 317 318 /* 319 * Basic Machine Check/Program Check Handler. 320 */ 321 322 extern void s390_base_mcck_handler(void); 323 extern void s390_base_pgm_handler(void); 324 extern void s390_base_ext_handler(void); 325 326 extern void (*s390_base_mcck_handler_fn)(void); 327 extern void (*s390_base_pgm_handler_fn)(void); 328 extern void (*s390_base_ext_handler_fn)(void); 329 330 #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL 331 332 /* 333 * Helper macro for exception table entries 334 */ 335 #ifndef CONFIG_64BIT 336 #define EX_TABLE(_fault,_target) \ 337 ".section __ex_table,\"a\"\n" \ 338 " .align 4\n" \ 339 " .long " #_fault "," #_target "\n" \ 340 ".previous\n" 341 #else 342 #define EX_TABLE(_fault,_target) \ 343 ".section __ex_table,\"a\"\n" \ 344 " .align 8\n" \ 345 " .quad " #_fault "," #_target "\n" \ 346 ".previous\n" 347 #endif 348 349 extern int memcpy_real(void *, void *, size_t); 350 extern void memcpy_absolute(void *, void *, size_t); 351 352 #define mem_assign_absolute(dest, val) { \ 353 __typeof__(dest) __tmp = (val); \ 354 \ 355 BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \ 356 memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \ 357 } 358 359 #endif /* __ASM_S390_PROCESSOR_H */ 360