1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * S390 version 4 * Copyright IBM Corp. 1999 5 * Author(s): Hartmut Penner (hp@de.ibm.com), 6 * Martin Schwidefsky (schwidefsky@de.ibm.com) 7 * 8 * Derived from "include/asm-i386/processor.h" 9 * Copyright (C) 1994, Linus Torvalds 10 */ 11 12 #ifndef __ASM_S390_PROCESSOR_H 13 #define __ASM_S390_PROCESSOR_H 14 15 #include <linux/bits.h> 16 17 #define CIF_ASCE_PRIMARY 0 /* primary asce needs fixup / uaccess */ 18 #define CIF_ASCE_SECONDARY 1 /* secondary asce needs fixup / uaccess */ 19 #define CIF_NOHZ_DELAY 2 /* delay HZ disable for a tick */ 20 #define CIF_FPU 3 /* restore FPU registers */ 21 #define CIF_IGNORE_IRQ 4 /* ignore interrupt (for udelay) */ 22 #define CIF_ENABLED_WAIT 5 /* in enabled wait state */ 23 #define CIF_MCCK_GUEST 6 /* machine check happening in guest */ 24 #define CIF_DEDICATED_CPU 7 /* this CPU is dedicated */ 25 26 #define _CIF_ASCE_PRIMARY BIT(CIF_ASCE_PRIMARY) 27 #define _CIF_ASCE_SECONDARY BIT(CIF_ASCE_SECONDARY) 28 #define _CIF_NOHZ_DELAY BIT(CIF_NOHZ_DELAY) 29 #define _CIF_FPU BIT(CIF_FPU) 30 #define _CIF_IGNORE_IRQ BIT(CIF_IGNORE_IRQ) 31 #define _CIF_ENABLED_WAIT BIT(CIF_ENABLED_WAIT) 32 #define _CIF_MCCK_GUEST BIT(CIF_MCCK_GUEST) 33 #define _CIF_DEDICATED_CPU BIT(CIF_DEDICATED_CPU) 34 35 #ifndef __ASSEMBLY__ 36 37 #include <linux/cpumask.h> 38 #include <linux/linkage.h> 39 #include <linux/irqflags.h> 40 #include <asm/cpu.h> 41 #include <asm/page.h> 42 #include <asm/ptrace.h> 43 #include <asm/setup.h> 44 #include <asm/runtime_instr.h> 45 #include <asm/fpu/types.h> 46 #include <asm/fpu/internal.h> 47 48 static inline void set_cpu_flag(int flag) 49 { 50 S390_lowcore.cpu_flags |= (1UL << flag); 51 } 52 53 static inline void clear_cpu_flag(int flag) 54 { 55 S390_lowcore.cpu_flags &= ~(1UL << flag); 56 } 57 58 static inline int test_cpu_flag(int flag) 59 { 60 return !!(S390_lowcore.cpu_flags & (1UL << flag)); 61 } 62 63 /* 64 * Test CIF flag of another CPU. The caller needs to ensure that 65 * CPU hotplug can not happen, e.g. by disabling preemption. 66 */ 67 static inline int test_cpu_flag_of(int flag, int cpu) 68 { 69 struct lowcore *lc = lowcore_ptr[cpu]; 70 return !!(lc->cpu_flags & (1UL << flag)); 71 } 72 73 #define arch_needs_cpu() test_cpu_flag(CIF_NOHZ_DELAY) 74 75 static inline void get_cpu_id(struct cpuid *ptr) 76 { 77 asm volatile("stidp %0" : "=Q" (*ptr)); 78 } 79 80 void s390_adjust_jiffies(void); 81 void s390_update_cpu_mhz(void); 82 void cpu_detect_mhz_feature(void); 83 84 extern const struct seq_operations cpuinfo_op; 85 extern void execve_tail(void); 86 extern void __bpon(void); 87 88 /* 89 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit. 90 */ 91 92 #define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_31BIT) ? \ 93 _REGION3_SIZE : TASK_SIZE_MAX) 94 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \ 95 (_REGION3_SIZE >> 1) : (_REGION2_SIZE >> 1)) 96 #define TASK_SIZE TASK_SIZE_OF(current) 97 #define TASK_SIZE_MAX (-PAGE_SIZE) 98 99 #define STACK_TOP (test_thread_flag(TIF_31BIT) ? \ 100 _REGION3_SIZE : _REGION2_SIZE) 101 #define STACK_TOP_MAX _REGION2_SIZE 102 103 #define HAVE_ARCH_PICK_MMAP_LAYOUT 104 105 typedef unsigned int mm_segment_t; 106 107 /* 108 * Thread structure 109 */ 110 struct thread_struct { 111 unsigned int acrs[NUM_ACRS]; 112 unsigned long ksp; /* kernel stack pointer */ 113 unsigned long user_timer; /* task cputime in user space */ 114 unsigned long guest_timer; /* task cputime in kvm guest */ 115 unsigned long system_timer; /* task cputime in kernel space */ 116 unsigned long hardirq_timer; /* task cputime in hardirq context */ 117 unsigned long softirq_timer; /* task cputime in softirq context */ 118 unsigned long sys_call_table; /* system call table address */ 119 mm_segment_t mm_segment; 120 unsigned long gmap_addr; /* address of last gmap fault. */ 121 unsigned int gmap_write_flag; /* gmap fault write indication */ 122 unsigned int gmap_int_code; /* int code of last gmap fault */ 123 unsigned int gmap_pfault; /* signal of a pending guest pfault */ 124 /* Per-thread information related to debugging */ 125 struct per_regs per_user; /* User specified PER registers */ 126 struct per_event per_event; /* Cause of the last PER trap */ 127 unsigned long per_flags; /* Flags to control debug behavior */ 128 unsigned int system_call; /* system call number in signal */ 129 unsigned long last_break; /* last breaking-event-address. */ 130 /* pfault_wait is used to block the process on a pfault event */ 131 unsigned long pfault_wait; 132 struct list_head list; 133 /* cpu runtime instrumentation */ 134 struct runtime_instr_cb *ri_cb; 135 struct gs_cb *gs_cb; /* Current guarded storage cb */ 136 struct gs_cb *gs_bc_cb; /* Broadcast guarded storage cb */ 137 unsigned char trap_tdb[256]; /* Transaction abort diagnose block */ 138 /* 139 * Warning: 'fpu' is dynamically-sized. It *MUST* be at 140 * the end. 141 */ 142 struct fpu fpu; /* FP and VX register save area */ 143 }; 144 145 /* Flag to disable transactions. */ 146 #define PER_FLAG_NO_TE 1UL 147 /* Flag to enable random transaction aborts. */ 148 #define PER_FLAG_TE_ABORT_RAND 2UL 149 /* Flag to specify random transaction abort mode: 150 * - abort each transaction at a random instruction before TEND if set. 151 * - abort random transactions at a random instruction if cleared. 152 */ 153 #define PER_FLAG_TE_ABORT_RAND_TEND 4UL 154 155 typedef struct thread_struct thread_struct; 156 157 #define ARCH_MIN_TASKALIGN 8 158 159 #define INIT_THREAD { \ 160 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \ 161 .fpu.regs = (void *) init_task.thread.fpu.fprs, \ 162 .last_break = 1, \ 163 } 164 165 /* 166 * Do necessary setup to start up a new thread. 167 */ 168 #define start_thread(regs, new_psw, new_stackp) do { \ 169 regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \ 170 regs->psw.addr = new_psw; \ 171 regs->gprs[15] = new_stackp; \ 172 execve_tail(); \ 173 } while (0) 174 175 #define start_thread31(regs, new_psw, new_stackp) do { \ 176 regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \ 177 regs->psw.addr = new_psw; \ 178 regs->gprs[15] = new_stackp; \ 179 execve_tail(); \ 180 } while (0) 181 182 /* Forward declaration, a strange C thing */ 183 struct task_struct; 184 struct mm_struct; 185 struct seq_file; 186 struct pt_regs; 187 188 void show_registers(struct pt_regs *regs); 189 void show_cacheinfo(struct seq_file *m); 190 191 /* Free all resources held by a thread. */ 192 static inline void release_thread(struct task_struct *tsk) { } 193 194 /* Free guarded storage control block */ 195 void guarded_storage_release(struct task_struct *tsk); 196 197 unsigned long get_wchan(struct task_struct *p); 198 #define task_pt_regs(tsk) ((struct pt_regs *) \ 199 (task_stack_page(tsk) + THREAD_SIZE) - 1) 200 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr) 201 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15]) 202 203 /* Has task runtime instrumentation enabled ? */ 204 #define is_ri_task(tsk) (!!(tsk)->thread.ri_cb) 205 206 static __always_inline unsigned long current_stack_pointer(void) 207 { 208 unsigned long sp; 209 210 asm volatile("la %0,0(15)" : "=a" (sp)); 211 return sp; 212 } 213 214 static __no_kasan_or_inline unsigned short stap(void) 215 { 216 unsigned short cpu_address; 217 218 asm volatile("stap %0" : "=Q" (cpu_address)); 219 return cpu_address; 220 } 221 222 #define cpu_relax() barrier() 223 224 #define ECAG_CACHE_ATTRIBUTE 0 225 #define ECAG_CPU_ATTRIBUTE 1 226 227 static inline unsigned long __ecag(unsigned int asi, unsigned char parm) 228 { 229 unsigned long val; 230 231 asm volatile(".insn rsy,0xeb000000004c,%0,0,0(%1)" /* ecag */ 232 : "=d" (val) : "a" (asi << 8 | parm)); 233 return val; 234 } 235 236 static inline void psw_set_key(unsigned int key) 237 { 238 asm volatile("spka 0(%0)" : : "d" (key)); 239 } 240 241 /* 242 * Set PSW to specified value. 243 */ 244 static inline void __load_psw(psw_t psw) 245 { 246 asm volatile("lpswe %0" : : "Q" (psw) : "cc"); 247 } 248 249 /* 250 * Set PSW mask to specified value, while leaving the 251 * PSW addr pointing to the next instruction. 252 */ 253 static __no_kasan_or_inline void __load_psw_mask(unsigned long mask) 254 { 255 unsigned long addr; 256 psw_t psw; 257 258 psw.mask = mask; 259 260 asm volatile( 261 " larl %0,1f\n" 262 " stg %0,%1\n" 263 " lpswe %2\n" 264 "1:" 265 : "=&d" (addr), "=Q" (psw.addr) : "Q" (psw) : "memory", "cc"); 266 } 267 268 /* 269 * Extract current PSW mask 270 */ 271 static inline unsigned long __extract_psw(void) 272 { 273 unsigned int reg1, reg2; 274 275 asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2)); 276 return (((unsigned long) reg1) << 32) | ((unsigned long) reg2); 277 } 278 279 static inline void local_mcck_enable(void) 280 { 281 __load_psw_mask(__extract_psw() | PSW_MASK_MCHECK); 282 } 283 284 static inline void local_mcck_disable(void) 285 { 286 __load_psw_mask(__extract_psw() & ~PSW_MASK_MCHECK); 287 } 288 289 /* 290 * Rewind PSW instruction address by specified number of bytes. 291 */ 292 static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc) 293 { 294 unsigned long mask; 295 296 mask = (psw.mask & PSW_MASK_EA) ? -1UL : 297 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 : 298 (1UL << 24) - 1; 299 return (psw.addr - ilc) & mask; 300 } 301 302 /* 303 * Function to stop a processor until the next interrupt occurs 304 */ 305 void enabled_wait(void); 306 307 /* 308 * Function to drop a processor into disabled wait state 309 */ 310 static __always_inline void __noreturn disabled_wait(void) 311 { 312 psw_t psw; 313 314 psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA; 315 psw.addr = _THIS_IP_; 316 __load_psw(psw); 317 while (1); 318 } 319 320 /* 321 * Basic Machine Check/Program Check Handler. 322 */ 323 324 extern void s390_base_pgm_handler(void); 325 extern void s390_base_ext_handler(void); 326 327 extern void (*s390_base_pgm_handler_fn)(void); 328 extern void (*s390_base_ext_handler_fn)(void); 329 330 #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL 331 332 extern int memcpy_real(void *, void *, size_t); 333 extern void memcpy_absolute(void *, void *, size_t); 334 335 #define mem_assign_absolute(dest, val) do { \ 336 __typeof__(dest) __tmp = (val); \ 337 \ 338 BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \ 339 memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \ 340 } while (0) 341 342 extern int s390_isolate_bp(void); 343 extern int s390_isolate_bp_guest(void); 344 345 #endif /* __ASSEMBLY__ */ 346 347 #endif /* __ASM_S390_PROCESSOR_H */ 348