1 /* 2 * S390 version 3 * Copyright IBM Corp. 1999 4 * Author(s): Hartmut Penner (hp@de.ibm.com), 5 * Martin Schwidefsky (schwidefsky@de.ibm.com) 6 * 7 * Derived from "include/asm-i386/processor.h" 8 * Copyright (C) 1994, Linus Torvalds 9 */ 10 11 #ifndef __ASM_S390_PROCESSOR_H 12 #define __ASM_S390_PROCESSOR_H 13 14 #define CIF_MCCK_PENDING 0 /* machine check handling is pending */ 15 #define CIF_ASCE 1 /* user asce needs fixup / uaccess */ 16 #define CIF_NOHZ_DELAY 2 /* delay HZ disable for a tick */ 17 #define CIF_FPU 3 /* restore vector registers */ 18 19 #define _CIF_MCCK_PENDING (1<<CIF_MCCK_PENDING) 20 #define _CIF_ASCE (1<<CIF_ASCE) 21 #define _CIF_NOHZ_DELAY (1<<CIF_NOHZ_DELAY) 22 #define _CIF_FPU (1<<CIF_FPU) 23 24 #ifndef __ASSEMBLY__ 25 26 #include <linux/linkage.h> 27 #include <linux/irqflags.h> 28 #include <asm/cpu.h> 29 #include <asm/page.h> 30 #include <asm/ptrace.h> 31 #include <asm/setup.h> 32 #include <asm/runtime_instr.h> 33 #include <asm/fpu-internal.h> 34 35 static inline void set_cpu_flag(int flag) 36 { 37 S390_lowcore.cpu_flags |= (1U << flag); 38 } 39 40 static inline void clear_cpu_flag(int flag) 41 { 42 S390_lowcore.cpu_flags &= ~(1U << flag); 43 } 44 45 static inline int test_cpu_flag(int flag) 46 { 47 return !!(S390_lowcore.cpu_flags & (1U << flag)); 48 } 49 50 #define arch_needs_cpu() test_cpu_flag(CIF_NOHZ_DELAY) 51 52 /* 53 * Default implementation of macro that returns current 54 * instruction pointer ("program counter"). 55 */ 56 #define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; }) 57 58 static inline void get_cpu_id(struct cpuid *ptr) 59 { 60 asm volatile("stidp %0" : "=Q" (*ptr)); 61 } 62 63 extern void s390_adjust_jiffies(void); 64 extern const struct seq_operations cpuinfo_op; 65 extern int sysctl_ieee_emulation_warnings; 66 extern void execve_tail(void); 67 68 /* 69 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit. 70 */ 71 72 #define TASK_SIZE_OF(tsk) ((tsk)->mm->context.asce_limit) 73 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \ 74 (1UL << 30) : (1UL << 41)) 75 #define TASK_SIZE TASK_SIZE_OF(current) 76 #define TASK_MAX_SIZE (1UL << 53) 77 78 #define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42)) 79 #define STACK_TOP_MAX (1UL << 42) 80 81 #define HAVE_ARCH_PICK_MMAP_LAYOUT 82 83 typedef struct { 84 __u32 ar4; 85 } mm_segment_t; 86 87 /* 88 * Thread structure 89 */ 90 struct thread_struct { 91 struct fpu fpu; /* FP and VX register save area */ 92 unsigned int acrs[NUM_ACRS]; 93 unsigned long ksp; /* kernel stack pointer */ 94 mm_segment_t mm_segment; 95 unsigned long gmap_addr; /* address of last gmap fault. */ 96 unsigned int gmap_pfault; /* signal of a pending guest pfault */ 97 struct per_regs per_user; /* User specified PER registers */ 98 struct per_event per_event; /* Cause of the last PER trap */ 99 unsigned long per_flags; /* Flags to control debug behavior */ 100 /* pfault_wait is used to block the process on a pfault event */ 101 unsigned long pfault_wait; 102 struct list_head list; 103 /* cpu runtime instrumentation */ 104 struct runtime_instr_cb *ri_cb; 105 int ri_signum; 106 unsigned char trap_tdb[256]; /* Transaction abort diagnose block */ 107 }; 108 109 /* Flag to disable transactions. */ 110 #define PER_FLAG_NO_TE 1UL 111 /* Flag to enable random transaction aborts. */ 112 #define PER_FLAG_TE_ABORT_RAND 2UL 113 /* Flag to specify random transaction abort mode: 114 * - abort each transaction at a random instruction before TEND if set. 115 * - abort random transactions at a random instruction if cleared. 116 */ 117 #define PER_FLAG_TE_ABORT_RAND_TEND 4UL 118 119 typedef struct thread_struct thread_struct; 120 121 /* 122 * Stack layout of a C stack frame. 123 */ 124 #ifndef __PACK_STACK 125 struct stack_frame { 126 unsigned long back_chain; 127 unsigned long empty1[5]; 128 unsigned long gprs[10]; 129 unsigned int empty2[8]; 130 }; 131 #else 132 struct stack_frame { 133 unsigned long empty1[5]; 134 unsigned int empty2[8]; 135 unsigned long gprs[10]; 136 unsigned long back_chain; 137 }; 138 #endif 139 140 #define ARCH_MIN_TASKALIGN 8 141 142 #define INIT_THREAD { \ 143 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \ 144 } 145 146 /* 147 * Do necessary setup to start up a new thread. 148 */ 149 #define start_thread(regs, new_psw, new_stackp) do { \ 150 regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \ 151 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \ 152 regs->gprs[15] = new_stackp; \ 153 execve_tail(); \ 154 } while (0) 155 156 #define start_thread31(regs, new_psw, new_stackp) do { \ 157 regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \ 158 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \ 159 regs->gprs[15] = new_stackp; \ 160 crst_table_downgrade(current->mm, 1UL << 31); \ 161 execve_tail(); \ 162 } while (0) 163 164 /* Forward declaration, a strange C thing */ 165 struct task_struct; 166 struct mm_struct; 167 struct seq_file; 168 169 void show_cacheinfo(struct seq_file *m); 170 171 /* Free all resources held by a thread. */ 172 extern void release_thread(struct task_struct *); 173 174 /* 175 * Return saved PC of a blocked thread. 176 */ 177 extern unsigned long thread_saved_pc(struct task_struct *t); 178 179 unsigned long get_wchan(struct task_struct *p); 180 #define task_pt_regs(tsk) ((struct pt_regs *) \ 181 (task_stack_page(tsk) + THREAD_SIZE) - 1) 182 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr) 183 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15]) 184 185 /* Has task runtime instrumentation enabled ? */ 186 #define is_ri_task(tsk) (!!(tsk)->thread.ri_cb) 187 188 static inline unsigned short stap(void) 189 { 190 unsigned short cpu_address; 191 192 asm volatile("stap %0" : "=m" (cpu_address)); 193 return cpu_address; 194 } 195 196 /* 197 * Give up the time slice of the virtual PU. 198 */ 199 void cpu_relax(void); 200 201 #define cpu_relax_lowlatency() barrier() 202 203 static inline void psw_set_key(unsigned int key) 204 { 205 asm volatile("spka 0(%0)" : : "d" (key)); 206 } 207 208 /* 209 * Set PSW to specified value. 210 */ 211 static inline void __load_psw(psw_t psw) 212 { 213 asm volatile("lpswe %0" : : "Q" (psw) : "cc"); 214 } 215 216 /* 217 * Set PSW mask to specified value, while leaving the 218 * PSW addr pointing to the next instruction. 219 */ 220 static inline void __load_psw_mask (unsigned long mask) 221 { 222 unsigned long addr; 223 psw_t psw; 224 225 psw.mask = mask; 226 227 asm volatile( 228 " larl %0,1f\n" 229 " stg %0,%O1+8(%R1)\n" 230 " lpswe %1\n" 231 "1:" 232 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc"); 233 } 234 235 /* 236 * Extract current PSW mask 237 */ 238 static inline unsigned long __extract_psw(void) 239 { 240 unsigned int reg1, reg2; 241 242 asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2)); 243 return (((unsigned long) reg1) << 32) | ((unsigned long) reg2); 244 } 245 246 /* 247 * Rewind PSW instruction address by specified number of bytes. 248 */ 249 static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc) 250 { 251 unsigned long mask; 252 253 mask = (psw.mask & PSW_MASK_EA) ? -1UL : 254 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 : 255 (1UL << 24) - 1; 256 return (psw.addr - ilc) & mask; 257 } 258 259 /* 260 * Function to stop a processor until the next interrupt occurs 261 */ 262 void enabled_wait(void); 263 264 /* 265 * Function to drop a processor into disabled wait state 266 */ 267 static inline void __noreturn disabled_wait(unsigned long code) 268 { 269 unsigned long ctl_buf; 270 psw_t dw_psw; 271 272 dw_psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA; 273 dw_psw.addr = code; 274 /* 275 * Store status and then load disabled wait psw, 276 * the processor is dead afterwards 277 */ 278 asm volatile( 279 " stctg 0,0,0(%2)\n" 280 " ni 4(%2),0xef\n" /* switch off protection */ 281 " lctlg 0,0,0(%2)\n" 282 " lghi 1,0x1000\n" 283 " stpt 0x328(1)\n" /* store timer */ 284 " stckc 0x330(1)\n" /* store clock comparator */ 285 " stpx 0x318(1)\n" /* store prefix register */ 286 " stam 0,15,0x340(1)\n"/* store access registers */ 287 " stfpc 0x31c(1)\n" /* store fpu control */ 288 " std 0,0x200(1)\n" /* store f0 */ 289 " std 1,0x208(1)\n" /* store f1 */ 290 " std 2,0x210(1)\n" /* store f2 */ 291 " std 3,0x218(1)\n" /* store f3 */ 292 " std 4,0x220(1)\n" /* store f4 */ 293 " std 5,0x228(1)\n" /* store f5 */ 294 " std 6,0x230(1)\n" /* store f6 */ 295 " std 7,0x238(1)\n" /* store f7 */ 296 " std 8,0x240(1)\n" /* store f8 */ 297 " std 9,0x248(1)\n" /* store f9 */ 298 " std 10,0x250(1)\n" /* store f10 */ 299 " std 11,0x258(1)\n" /* store f11 */ 300 " std 12,0x260(1)\n" /* store f12 */ 301 " std 13,0x268(1)\n" /* store f13 */ 302 " std 14,0x270(1)\n" /* store f14 */ 303 " std 15,0x278(1)\n" /* store f15 */ 304 " stmg 0,15,0x280(1)\n"/* store general registers */ 305 " stctg 0,15,0x380(1)\n"/* store control registers */ 306 " oi 0x384(1),0x10\n"/* fake protection bit */ 307 " lpswe 0(%1)" 308 : "=m" (ctl_buf) 309 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0", "1"); 310 while (1); 311 } 312 313 /* 314 * Use to set psw mask except for the first byte which 315 * won't be changed by this function. 316 */ 317 static inline void 318 __set_psw_mask(unsigned long mask) 319 { 320 __load_psw_mask(mask | (arch_local_save_flags() & ~(-1UL >> 8))); 321 } 322 323 #define local_mcck_enable() \ 324 __set_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT | PSW_MASK_MCHECK) 325 #define local_mcck_disable() \ 326 __set_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT) 327 328 /* 329 * Basic Machine Check/Program Check Handler. 330 */ 331 332 extern void s390_base_mcck_handler(void); 333 extern void s390_base_pgm_handler(void); 334 extern void s390_base_ext_handler(void); 335 336 extern void (*s390_base_mcck_handler_fn)(void); 337 extern void (*s390_base_pgm_handler_fn)(void); 338 extern void (*s390_base_ext_handler_fn)(void); 339 340 #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL 341 342 extern int memcpy_real(void *, void *, size_t); 343 extern void memcpy_absolute(void *, void *, size_t); 344 345 #define mem_assign_absolute(dest, val) { \ 346 __typeof__(dest) __tmp = (val); \ 347 \ 348 BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \ 349 memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \ 350 } 351 352 #endif /* __ASSEMBLY__ */ 353 354 #endif /* __ASM_S390_PROCESSOR_H */ 355