1 /* 2 * include/asm-s390/processor.h 3 * 4 * S390 version 5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation 6 * Author(s): Hartmut Penner (hp@de.ibm.com), 7 * Martin Schwidefsky (schwidefsky@de.ibm.com) 8 * 9 * Derived from "include/asm-i386/processor.h" 10 * Copyright (C) 1994, Linus Torvalds 11 */ 12 13 #ifndef __ASM_S390_PROCESSOR_H 14 #define __ASM_S390_PROCESSOR_H 15 16 #include <linux/linkage.h> 17 #include <asm/ptrace.h> 18 19 #ifdef __KERNEL__ 20 /* 21 * Default implementation of macro that returns current 22 * instruction pointer ("program counter"). 23 */ 24 #define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; }) 25 26 /* 27 * CPU type and hardware bug flags. Kept separately for each CPU. 28 * Members of this structure are referenced in head.S, so think twice 29 * before touching them. [mj] 30 */ 31 32 typedef struct 33 { 34 unsigned int version : 8; 35 unsigned int ident : 24; 36 unsigned int machine : 16; 37 unsigned int unused : 16; 38 } __attribute__ ((packed)) cpuid_t; 39 40 static inline void get_cpu_id(cpuid_t *ptr) 41 { 42 asm volatile("stidp 0(%1)" : "=m" (*ptr) : "a" (ptr)); 43 } 44 45 struct cpuinfo_S390 46 { 47 cpuid_t cpu_id; 48 __u16 cpu_addr; 49 __u16 cpu_nr; 50 unsigned long loops_per_jiffy; 51 unsigned long *pgd_quick; 52 #ifdef __s390x__ 53 unsigned long *pmd_quick; 54 #endif /* __s390x__ */ 55 unsigned long *pte_quick; 56 unsigned long pgtable_cache_sz; 57 }; 58 59 extern void s390_adjust_jiffies(void); 60 extern void print_cpu_info(struct cpuinfo_S390 *); 61 extern int get_cpu_capability(unsigned int *); 62 63 /* 64 * User space process size: 2GB for 31 bit, 4TB for 64 bit. 65 */ 66 #ifndef __s390x__ 67 68 #define TASK_SIZE (1UL << 31) 69 #define TASK_UNMAPPED_BASE (1UL << 30) 70 71 #else /* __s390x__ */ 72 73 #define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk,TIF_31BIT) ? \ 74 (1UL << 31) : (1UL << 53)) 75 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \ 76 (1UL << 30) : (1UL << 41)) 77 #define TASK_SIZE TASK_SIZE_OF(current) 78 79 #endif /* __s390x__ */ 80 81 #ifdef __KERNEL__ 82 83 #ifndef __s390x__ 84 #define STACK_TOP (1UL << 31) 85 #define STACK_TOP_MAX (1UL << 31) 86 #else /* __s390x__ */ 87 #define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42)) 88 #define STACK_TOP_MAX (1UL << 42) 89 #endif /* __s390x__ */ 90 91 92 #endif 93 94 #define HAVE_ARCH_PICK_MMAP_LAYOUT 95 96 typedef struct { 97 __u32 ar4; 98 } mm_segment_t; 99 100 /* 101 * Thread structure 102 */ 103 struct thread_struct { 104 s390_fp_regs fp_regs; 105 unsigned int acrs[NUM_ACRS]; 106 unsigned long ksp; /* kernel stack pointer */ 107 mm_segment_t mm_segment; 108 unsigned long prot_addr; /* address of protection-excep. */ 109 unsigned int trap_no; 110 per_struct per_info; 111 /* Used to give failing instruction back to user for ieee exceptions */ 112 unsigned long ieee_instruction_pointer; 113 /* pfault_wait is used to block the process on a pfault event */ 114 unsigned long pfault_wait; 115 }; 116 117 typedef struct thread_struct thread_struct; 118 119 /* 120 * Stack layout of a C stack frame. 121 */ 122 #ifndef __PACK_STACK 123 struct stack_frame { 124 unsigned long back_chain; 125 unsigned long empty1[5]; 126 unsigned long gprs[10]; 127 unsigned int empty2[8]; 128 }; 129 #else 130 struct stack_frame { 131 unsigned long empty1[5]; 132 unsigned int empty2[8]; 133 unsigned long gprs[10]; 134 unsigned long back_chain; 135 }; 136 #endif 137 138 #define ARCH_MIN_TASKALIGN 8 139 140 #define INIT_THREAD { \ 141 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \ 142 } 143 144 /* 145 * Do necessary setup to start up a new thread. 146 */ 147 #define start_thread(regs, new_psw, new_stackp) do { \ 148 set_fs(USER_DS); \ 149 regs->psw.mask = psw_user_bits; \ 150 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \ 151 regs->gprs[15] = new_stackp; \ 152 } while (0) 153 154 #define start_thread31(regs, new_psw, new_stackp) do { \ 155 set_fs(USER_DS); \ 156 regs->psw.mask = psw_user32_bits; \ 157 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \ 158 regs->gprs[15] = new_stackp; \ 159 crst_table_downgrade(current->mm, 1UL << 31); \ 160 } while (0) 161 162 /* Forward declaration, a strange C thing */ 163 struct task_struct; 164 struct mm_struct; 165 struct seq_file; 166 167 /* Free all resources held by a thread. */ 168 extern void release_thread(struct task_struct *); 169 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); 170 171 /* Prepare to copy thread state - unlazy all lazy status */ 172 #define prepare_to_copy(tsk) do { } while (0) 173 174 /* 175 * Return saved PC of a blocked thread. 176 */ 177 extern unsigned long thread_saved_pc(struct task_struct *t); 178 179 /* 180 * Print register of task into buffer. Used in fs/proc/array.c. 181 */ 182 extern void task_show_regs(struct seq_file *m, struct task_struct *task); 183 184 extern void show_code(struct pt_regs *regs); 185 186 unsigned long get_wchan(struct task_struct *p); 187 #define task_pt_regs(tsk) ((struct pt_regs *) \ 188 (task_stack_page(tsk) + THREAD_SIZE) - 1) 189 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr) 190 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15]) 191 192 /* 193 * Give up the time slice of the virtual PU. 194 */ 195 static inline void cpu_relax(void) 196 { 197 if (MACHINE_HAS_DIAG44) 198 asm volatile("diag 0,0,68"); 199 barrier(); 200 } 201 202 static inline void psw_set_key(unsigned int key) 203 { 204 asm volatile("spka 0(%0)" : : "d" (key)); 205 } 206 207 /* 208 * Set PSW to specified value. 209 */ 210 static inline void __load_psw(psw_t psw) 211 { 212 #ifndef __s390x__ 213 asm volatile("lpsw 0(%0)" : : "a" (&psw), "m" (psw) : "cc"); 214 #else 215 asm volatile("lpswe 0(%0)" : : "a" (&psw), "m" (psw) : "cc"); 216 #endif 217 } 218 219 /* 220 * Set PSW mask to specified value, while leaving the 221 * PSW addr pointing to the next instruction. 222 */ 223 224 static inline void __load_psw_mask (unsigned long mask) 225 { 226 unsigned long addr; 227 psw_t psw; 228 229 psw.mask = mask; 230 231 #ifndef __s390x__ 232 asm volatile( 233 " basr %0,0\n" 234 "0: ahi %0,1f-0b\n" 235 " st %0,4(%1)\n" 236 " lpsw 0(%1)\n" 237 "1:" 238 : "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc"); 239 #else /* __s390x__ */ 240 asm volatile( 241 " larl %0,1f\n" 242 " stg %0,8(%1)\n" 243 " lpswe 0(%1)\n" 244 "1:" 245 : "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc"); 246 #endif /* __s390x__ */ 247 } 248 249 /* 250 * Function to stop a processor until an interruption occurred 251 */ 252 static inline void enabled_wait(void) 253 { 254 __load_psw_mask(PSW_BASE_BITS | PSW_MASK_IO | PSW_MASK_EXT | 255 PSW_MASK_MCHECK | PSW_MASK_WAIT | PSW_DEFAULT_KEY); 256 } 257 258 /* 259 * Function to drop a processor into disabled wait state 260 */ 261 262 static inline void ATTRIB_NORET disabled_wait(unsigned long code) 263 { 264 unsigned long ctl_buf; 265 psw_t dw_psw; 266 267 dw_psw.mask = PSW_BASE_BITS | PSW_MASK_WAIT; 268 dw_psw.addr = code; 269 /* 270 * Store status and then load disabled wait psw, 271 * the processor is dead afterwards 272 */ 273 #ifndef __s390x__ 274 asm volatile( 275 " stctl 0,0,0(%2)\n" 276 " ni 0(%2),0xef\n" /* switch off protection */ 277 " lctl 0,0,0(%2)\n" 278 " stpt 0xd8\n" /* store timer */ 279 " stckc 0xe0\n" /* store clock comparator */ 280 " stpx 0x108\n" /* store prefix register */ 281 " stam 0,15,0x120\n" /* store access registers */ 282 " std 0,0x160\n" /* store f0 */ 283 " std 2,0x168\n" /* store f2 */ 284 " std 4,0x170\n" /* store f4 */ 285 " std 6,0x178\n" /* store f6 */ 286 " stm 0,15,0x180\n" /* store general registers */ 287 " stctl 0,15,0x1c0\n" /* store control registers */ 288 " oi 0x1c0,0x10\n" /* fake protection bit */ 289 " lpsw 0(%1)" 290 : "=m" (ctl_buf) 291 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc"); 292 #else /* __s390x__ */ 293 asm volatile( 294 " stctg 0,0,0(%2)\n" 295 " ni 4(%2),0xef\n" /* switch off protection */ 296 " lctlg 0,0,0(%2)\n" 297 " lghi 1,0x1000\n" 298 " stpt 0x328(1)\n" /* store timer */ 299 " stckc 0x330(1)\n" /* store clock comparator */ 300 " stpx 0x318(1)\n" /* store prefix register */ 301 " stam 0,15,0x340(1)\n"/* store access registers */ 302 " stfpc 0x31c(1)\n" /* store fpu control */ 303 " std 0,0x200(1)\n" /* store f0 */ 304 " std 1,0x208(1)\n" /* store f1 */ 305 " std 2,0x210(1)\n" /* store f2 */ 306 " std 3,0x218(1)\n" /* store f3 */ 307 " std 4,0x220(1)\n" /* store f4 */ 308 " std 5,0x228(1)\n" /* store f5 */ 309 " std 6,0x230(1)\n" /* store f6 */ 310 " std 7,0x238(1)\n" /* store f7 */ 311 " std 8,0x240(1)\n" /* store f8 */ 312 " std 9,0x248(1)\n" /* store f9 */ 313 " std 10,0x250(1)\n" /* store f10 */ 314 " std 11,0x258(1)\n" /* store f11 */ 315 " std 12,0x260(1)\n" /* store f12 */ 316 " std 13,0x268(1)\n" /* store f13 */ 317 " std 14,0x270(1)\n" /* store f14 */ 318 " std 15,0x278(1)\n" /* store f15 */ 319 " stmg 0,15,0x280(1)\n"/* store general registers */ 320 " stctg 0,15,0x380(1)\n"/* store control registers */ 321 " oi 0x384(1),0x10\n"/* fake protection bit */ 322 " lpswe 0(%1)" 323 : "=m" (ctl_buf) 324 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0"); 325 #endif /* __s390x__ */ 326 while (1); 327 } 328 329 /* 330 * Basic Machine Check/Program Check Handler. 331 */ 332 333 extern void s390_base_mcck_handler(void); 334 extern void s390_base_pgm_handler(void); 335 extern void s390_base_ext_handler(void); 336 337 extern void (*s390_base_mcck_handler_fn)(void); 338 extern void (*s390_base_pgm_handler_fn)(void); 339 extern void (*s390_base_ext_handler_fn)(void); 340 341 #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL 342 343 #endif 344 345 /* 346 * Helper macro for exception table entries 347 */ 348 #ifndef __s390x__ 349 #define EX_TABLE(_fault,_target) \ 350 ".section __ex_table,\"a\"\n" \ 351 " .align 4\n" \ 352 " .long " #_fault "," #_target "\n" \ 353 ".previous\n" 354 #else 355 #define EX_TABLE(_fault,_target) \ 356 ".section __ex_table,\"a\"\n" \ 357 " .align 8\n" \ 358 " .quad " #_fault "," #_target "\n" \ 359 ".previous\n" 360 #endif 361 362 #endif /* __ASM_S390_PROCESSOR_H */ 363