1 /* 2 * S390 version 3 * Copyright IBM Corp. 1999 4 * Author(s): Hartmut Penner (hp@de.ibm.com), 5 * Martin Schwidefsky (schwidefsky@de.ibm.com) 6 * 7 * Derived from "include/asm-i386/processor.h" 8 * Copyright (C) 1994, Linus Torvalds 9 */ 10 11 #ifndef __ASM_S390_PROCESSOR_H 12 #define __ASM_S390_PROCESSOR_H 13 14 #include <linux/const.h> 15 16 #define CIF_MCCK_PENDING 0 /* machine check handling is pending */ 17 #define CIF_ASCE_PRIMARY 1 /* primary asce needs fixup / uaccess */ 18 #define CIF_ASCE_SECONDARY 2 /* secondary asce needs fixup / uaccess */ 19 #define CIF_NOHZ_DELAY 3 /* delay HZ disable for a tick */ 20 #define CIF_FPU 4 /* restore FPU registers */ 21 #define CIF_IGNORE_IRQ 5 /* ignore interrupt (for udelay) */ 22 #define CIF_ENABLED_WAIT 6 /* in enabled wait state */ 23 24 #define _CIF_MCCK_PENDING _BITUL(CIF_MCCK_PENDING) 25 #define _CIF_ASCE_PRIMARY _BITUL(CIF_ASCE_PRIMARY) 26 #define _CIF_ASCE_SECONDARY _BITUL(CIF_ASCE_SECONDARY) 27 #define _CIF_NOHZ_DELAY _BITUL(CIF_NOHZ_DELAY) 28 #define _CIF_FPU _BITUL(CIF_FPU) 29 #define _CIF_IGNORE_IRQ _BITUL(CIF_IGNORE_IRQ) 30 #define _CIF_ENABLED_WAIT _BITUL(CIF_ENABLED_WAIT) 31 32 #ifndef __ASSEMBLY__ 33 34 #include <linux/linkage.h> 35 #include <linux/irqflags.h> 36 #include <asm/cpu.h> 37 #include <asm/page.h> 38 #include <asm/ptrace.h> 39 #include <asm/setup.h> 40 #include <asm/runtime_instr.h> 41 #include <asm/fpu/types.h> 42 #include <asm/fpu/internal.h> 43 44 static inline void set_cpu_flag(int flag) 45 { 46 S390_lowcore.cpu_flags |= (1UL << flag); 47 } 48 49 static inline void clear_cpu_flag(int flag) 50 { 51 S390_lowcore.cpu_flags &= ~(1UL << flag); 52 } 53 54 static inline int test_cpu_flag(int flag) 55 { 56 return !!(S390_lowcore.cpu_flags & (1UL << flag)); 57 } 58 59 /* 60 * Test CIF flag of another CPU. The caller needs to ensure that 61 * CPU hotplug can not happen, e.g. by disabling preemption. 62 */ 63 static inline int test_cpu_flag_of(int flag, int cpu) 64 { 65 struct lowcore *lc = lowcore_ptr[cpu]; 66 return !!(lc->cpu_flags & (1UL << flag)); 67 } 68 69 #define arch_needs_cpu() test_cpu_flag(CIF_NOHZ_DELAY) 70 71 /* 72 * Default implementation of macro that returns current 73 * instruction pointer ("program counter"). 74 */ 75 #define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; }) 76 77 static inline void get_cpu_id(struct cpuid *ptr) 78 { 79 asm volatile("stidp %0" : "=Q" (*ptr)); 80 } 81 82 void s390_adjust_jiffies(void); 83 void s390_update_cpu_mhz(void); 84 void cpu_detect_mhz_feature(void); 85 86 extern const struct seq_operations cpuinfo_op; 87 extern int sysctl_ieee_emulation_warnings; 88 extern void execve_tail(void); 89 90 /* 91 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit. 92 */ 93 94 #define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_31BIT) ? \ 95 (1UL << 31) : (1UL << 53)) 96 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \ 97 (1UL << 30) : (1UL << 41)) 98 #define TASK_SIZE TASK_SIZE_OF(current) 99 #define TASK_SIZE_MAX (1UL << 53) 100 101 #define STACK_TOP (test_thread_flag(TIF_31BIT) ? \ 102 (1UL << 31) : (1UL << 42)) 103 #define STACK_TOP_MAX (1UL << 42) 104 105 #define HAVE_ARCH_PICK_MMAP_LAYOUT 106 107 typedef struct { 108 __u32 ar4; 109 } mm_segment_t; 110 111 /* 112 * Thread structure 113 */ 114 struct thread_struct { 115 unsigned int acrs[NUM_ACRS]; 116 unsigned long ksp; /* kernel stack pointer */ 117 unsigned long user_timer; /* task cputime in user space */ 118 unsigned long guest_timer; /* task cputime in kvm guest */ 119 unsigned long system_timer; /* task cputime in kernel space */ 120 unsigned long hardirq_timer; /* task cputime in hardirq context */ 121 unsigned long softirq_timer; /* task cputime in softirq context */ 122 unsigned long sys_call_table; /* system call table address */ 123 mm_segment_t mm_segment; 124 unsigned long gmap_addr; /* address of last gmap fault. */ 125 unsigned int gmap_write_flag; /* gmap fault write indication */ 126 unsigned int gmap_int_code; /* int code of last gmap fault */ 127 unsigned int gmap_pfault; /* signal of a pending guest pfault */ 128 /* Per-thread information related to debugging */ 129 struct per_regs per_user; /* User specified PER registers */ 130 struct per_event per_event; /* Cause of the last PER trap */ 131 unsigned long per_flags; /* Flags to control debug behavior */ 132 unsigned int system_call; /* system call number in signal */ 133 unsigned long last_break; /* last breaking-event-address. */ 134 /* pfault_wait is used to block the process on a pfault event */ 135 unsigned long pfault_wait; 136 struct list_head list; 137 /* cpu runtime instrumentation */ 138 struct runtime_instr_cb *ri_cb; 139 struct gs_cb *gs_cb; /* Current guarded storage cb */ 140 struct gs_cb *gs_bc_cb; /* Broadcast guarded storage cb */ 141 unsigned char trap_tdb[256]; /* Transaction abort diagnose block */ 142 /* 143 * Warning: 'fpu' is dynamically-sized. It *MUST* be at 144 * the end. 145 */ 146 struct fpu fpu; /* FP and VX register save area */ 147 }; 148 149 /* Flag to disable transactions. */ 150 #define PER_FLAG_NO_TE 1UL 151 /* Flag to enable random transaction aborts. */ 152 #define PER_FLAG_TE_ABORT_RAND 2UL 153 /* Flag to specify random transaction abort mode: 154 * - abort each transaction at a random instruction before TEND if set. 155 * - abort random transactions at a random instruction if cleared. 156 */ 157 #define PER_FLAG_TE_ABORT_RAND_TEND 4UL 158 159 typedef struct thread_struct thread_struct; 160 161 /* 162 * Stack layout of a C stack frame. 163 */ 164 #ifndef __PACK_STACK 165 struct stack_frame { 166 unsigned long back_chain; 167 unsigned long empty1[5]; 168 unsigned long gprs[10]; 169 unsigned int empty2[8]; 170 }; 171 #else 172 struct stack_frame { 173 unsigned long empty1[5]; 174 unsigned int empty2[8]; 175 unsigned long gprs[10]; 176 unsigned long back_chain; 177 }; 178 #endif 179 180 #define ARCH_MIN_TASKALIGN 8 181 182 #define INIT_THREAD { \ 183 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \ 184 .fpu.regs = (void *) init_task.thread.fpu.fprs, \ 185 } 186 187 /* 188 * Do necessary setup to start up a new thread. 189 */ 190 #define start_thread(regs, new_psw, new_stackp) do { \ 191 regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \ 192 regs->psw.addr = new_psw; \ 193 regs->gprs[15] = new_stackp; \ 194 execve_tail(); \ 195 } while (0) 196 197 #define start_thread31(regs, new_psw, new_stackp) do { \ 198 regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \ 199 regs->psw.addr = new_psw; \ 200 regs->gprs[15] = new_stackp; \ 201 crst_table_downgrade(current->mm); \ 202 execve_tail(); \ 203 } while (0) 204 205 /* Forward declaration, a strange C thing */ 206 struct task_struct; 207 struct mm_struct; 208 struct seq_file; 209 struct pt_regs; 210 211 typedef int (*dump_trace_func_t)(void *data, unsigned long address, int reliable); 212 void dump_trace(dump_trace_func_t func, void *data, 213 struct task_struct *task, unsigned long sp); 214 void show_registers(struct pt_regs *regs); 215 216 void show_cacheinfo(struct seq_file *m); 217 218 /* Free all resources held by a thread. */ 219 extern void release_thread(struct task_struct *); 220 221 /* Free guarded storage control block for current */ 222 void exit_thread_gs(void); 223 224 unsigned long get_wchan(struct task_struct *p); 225 #define task_pt_regs(tsk) ((struct pt_regs *) \ 226 (task_stack_page(tsk) + THREAD_SIZE) - 1) 227 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr) 228 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15]) 229 230 /* Has task runtime instrumentation enabled ? */ 231 #define is_ri_task(tsk) (!!(tsk)->thread.ri_cb) 232 233 static inline unsigned long current_stack_pointer(void) 234 { 235 unsigned long sp; 236 237 asm volatile("la %0,0(15)" : "=a" (sp)); 238 return sp; 239 } 240 241 static inline unsigned short stap(void) 242 { 243 unsigned short cpu_address; 244 245 asm volatile("stap %0" : "=m" (cpu_address)); 246 return cpu_address; 247 } 248 249 /* 250 * Give up the time slice of the virtual PU. 251 */ 252 #define cpu_relax_yield cpu_relax_yield 253 void cpu_relax_yield(void); 254 255 #define cpu_relax() barrier() 256 257 #define ECAG_CACHE_ATTRIBUTE 0 258 #define ECAG_CPU_ATTRIBUTE 1 259 260 static inline unsigned long __ecag(unsigned int asi, unsigned char parm) 261 { 262 unsigned long val; 263 264 asm volatile(".insn rsy,0xeb000000004c,%0,0,0(%1)" /* ecag */ 265 : "=d" (val) : "a" (asi << 8 | parm)); 266 return val; 267 } 268 269 static inline void psw_set_key(unsigned int key) 270 { 271 asm volatile("spka 0(%0)" : : "d" (key)); 272 } 273 274 /* 275 * Set PSW to specified value. 276 */ 277 static inline void __load_psw(psw_t psw) 278 { 279 asm volatile("lpswe %0" : : "Q" (psw) : "cc"); 280 } 281 282 /* 283 * Set PSW mask to specified value, while leaving the 284 * PSW addr pointing to the next instruction. 285 */ 286 static inline void __load_psw_mask(unsigned long mask) 287 { 288 unsigned long addr; 289 psw_t psw; 290 291 psw.mask = mask; 292 293 asm volatile( 294 " larl %0,1f\n" 295 " stg %0,%O1+8(%R1)\n" 296 " lpswe %1\n" 297 "1:" 298 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc"); 299 } 300 301 /* 302 * Extract current PSW mask 303 */ 304 static inline unsigned long __extract_psw(void) 305 { 306 unsigned int reg1, reg2; 307 308 asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2)); 309 return (((unsigned long) reg1) << 32) | ((unsigned long) reg2); 310 } 311 312 static inline void local_mcck_enable(void) 313 { 314 __load_psw_mask(__extract_psw() | PSW_MASK_MCHECK); 315 } 316 317 static inline void local_mcck_disable(void) 318 { 319 __load_psw_mask(__extract_psw() & ~PSW_MASK_MCHECK); 320 } 321 322 /* 323 * Rewind PSW instruction address by specified number of bytes. 324 */ 325 static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc) 326 { 327 unsigned long mask; 328 329 mask = (psw.mask & PSW_MASK_EA) ? -1UL : 330 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 : 331 (1UL << 24) - 1; 332 return (psw.addr - ilc) & mask; 333 } 334 335 /* 336 * Function to stop a processor until the next interrupt occurs 337 */ 338 void enabled_wait(void); 339 340 /* 341 * Function to drop a processor into disabled wait state 342 */ 343 static inline void __noreturn disabled_wait(unsigned long code) 344 { 345 psw_t psw; 346 347 psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA; 348 psw.addr = code; 349 __load_psw(psw); 350 while (1); 351 } 352 353 /* 354 * Basic Machine Check/Program Check Handler. 355 */ 356 357 extern void s390_base_mcck_handler(void); 358 extern void s390_base_pgm_handler(void); 359 extern void s390_base_ext_handler(void); 360 361 extern void (*s390_base_mcck_handler_fn)(void); 362 extern void (*s390_base_pgm_handler_fn)(void); 363 extern void (*s390_base_ext_handler_fn)(void); 364 365 #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL 366 367 extern int memcpy_real(void *, void *, size_t); 368 extern void memcpy_absolute(void *, void *, size_t); 369 370 #define mem_assign_absolute(dest, val) do { \ 371 __typeof__(dest) __tmp = (val); \ 372 \ 373 BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \ 374 memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \ 375 } while (0) 376 377 #endif /* __ASSEMBLY__ */ 378 379 #endif /* __ASM_S390_PROCESSOR_H */ 380