1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __ASM_PREEMPT_H 3 #define __ASM_PREEMPT_H 4 5 #include <asm/current.h> 6 #include <linux/thread_info.h> 7 #include <asm/atomic_ops.h> 8 #include <asm/cmpxchg.h> 9 #include <asm/march.h> 10 11 /* Use MSB for PREEMPT_NEED_RESCHED mostly because it is available. */ 12 #define PREEMPT_NEED_RESCHED 0x8000000000000000UL 13 14 /* 15 * We use the PREEMPT_NEED_RESCHED bit as an inverted NEED_RESCHED such 16 * that a decrement hitting 0 means we can and should reschedule. 17 */ 18 #define PREEMPT_ENABLED (0 + PREEMPT_NEED_RESCHED) 19 20 /* 21 * We mask the PREEMPT_NEED_RESCHED bit so as not to confuse all current users 22 * that think a non-zero value indicates we cannot preempt. 23 */ 24 static __always_inline int preempt_count(void) 25 { 26 unsigned long lc_preempt; 27 int count; 28 29 lc_preempt = offsetof(struct lowcore, preempt.count); 30 /* READ_ONCE(get_lowcore()->preempt.count) (without PREEMPT_NEED_RESCHED) */ 31 asm_inline( 32 ALTERNATIVE("ly %[count],%[offzero](%%r0)\n", 33 "ly %[count],%[offalt](%%r0)\n", 34 ALT_FEATURE(MFEATURE_LOWCORE)) 35 : [count] "=d" (count) 36 : [offzero] "i" (lc_preempt), 37 [offalt] "i" (lc_preempt + LOWCORE_ALT_ADDRESS), 38 "m" (((struct lowcore *)0)->preempt.count)); 39 return count; 40 } 41 42 static __always_inline void preempt_count_set(unsigned long pc) 43 { 44 unsigned long old, new; 45 46 old = READ_ONCE(get_lowcore()->preempt_count); 47 do { 48 new = (old & PREEMPT_NEED_RESCHED) | (pc & ~PREEMPT_NEED_RESCHED); 49 } while (!arch_try_cmpxchg(&get_lowcore()->preempt_count, &old, new)); 50 } 51 52 /* 53 * We fold the NEED_RESCHED bit into the preempt count such that 54 * preempt_enable() can decrement and test for needing to reschedule with a 55 * short instruction sequence. 56 * 57 * We invert the actual bit, so that when the decrement hits 0 we know we both 58 * need to resched (the bit is cleared) and can resched (no preempt count). 59 */ 60 61 static __always_inline void set_preempt_need_resched(void) 62 { 63 __atomic64_and(~PREEMPT_NEED_RESCHED, (long *)&get_lowcore()->preempt_count); 64 } 65 66 static __always_inline void clear_preempt_need_resched(void) 67 { 68 __atomic64_or(PREEMPT_NEED_RESCHED, (long *)&get_lowcore()->preempt_count); 69 } 70 71 static __always_inline bool test_preempt_need_resched(void) 72 { 73 return !(READ_ONCE(get_lowcore()->preempt_count) & PREEMPT_NEED_RESCHED); 74 } 75 76 static __always_inline void __preempt_count_add(int val) 77 { 78 /* 79 * With some obscure config options and CONFIG_PROFILE_ALL_BRANCHES 80 * enabled, gcc 12 fails to handle __builtin_constant_p(). 81 */ 82 if (!IS_ENABLED(CONFIG_PROFILE_ALL_BRANCHES)) { 83 if (__builtin_constant_p(val) && (val >= -128) && (val <= 127)) { 84 unsigned long lc_preempt; 85 86 lc_preempt = offsetof(struct lowcore, preempt_count); 87 asm_inline( 88 ALTERNATIVE("agsi %[offzero](%%r0),%[val]\n", 89 "agsi %[offalt](%%r0),%[val]\n", 90 ALT_FEATURE(MFEATURE_LOWCORE)) 91 : "+m" (((struct lowcore *)0)->preempt_count) 92 : [offzero] "i" (lc_preempt), [val] "i" (val), 93 [offalt] "i" (lc_preempt + LOWCORE_ALT_ADDRESS) 94 : "cc"); 95 return; 96 } 97 } 98 __atomic64_add(val, (long *)&get_lowcore()->preempt_count); 99 } 100 101 static __always_inline void __preempt_count_sub(int val) 102 { 103 __preempt_count_add(-val); 104 } 105 106 /* 107 * Because we keep PREEMPT_NEED_RESCHED set when we do _not_ need to reschedule 108 * a decrement which hits zero means we have no preempt_count and should 109 * reschedule. 110 */ 111 static __always_inline bool __preempt_count_dec_and_test(void) 112 { 113 #ifdef __HAVE_ASM_FLAG_OUTPUTS__ 114 unsigned long lc_preempt; 115 int cc; 116 117 lc_preempt = offsetof(struct lowcore, preempt_count); 118 asm_inline( 119 ALTERNATIVE("algsi %[offzero](%%r0),%[val]\n", 120 "algsi %[offalt](%%r0),%[val]\n", 121 ALT_FEATURE(MFEATURE_LOWCORE)) 122 : "=@cc" (cc), "+m" (((struct lowcore *)0)->preempt_count) 123 : [offzero] "i" (lc_preempt), [val] "i" (-1), 124 [offalt] "i" (lc_preempt + LOWCORE_ALT_ADDRESS)); 125 return (cc == 0) || (cc == 2); 126 #else 127 return __atomic64_add_const_and_test(-1, (long *)&get_lowcore()->preempt_count); 128 #endif 129 } 130 131 /* 132 * Returns true when we need to resched and can (barring IRQ state). 133 */ 134 static __always_inline bool should_resched(int preempt_offset) 135 { 136 return unlikely(READ_ONCE(get_lowcore()->preempt_count) == preempt_offset); 137 } 138 139 static __always_inline int __preempt_count_add_return(int val) 140 { 141 return val + __atomic64_add(val, (long *)&get_lowcore()->preempt_count); 142 } 143 144 static __always_inline int __preempt_count_sub_return(int val) 145 { 146 return __preempt_count_add_return(-val); 147 } 148 149 #define init_task_preempt_count(p) do { } while (0) 150 /* Deferred to CPU bringup time */ 151 #define init_idle_preempt_count(p, cpu) do { } while (0) 152 153 #ifdef CONFIG_PREEMPTION 154 155 void preempt_schedule(void); 156 void preempt_schedule_notrace(void); 157 158 #ifdef CONFIG_PREEMPT_DYNAMIC 159 160 void dynamic_preempt_schedule(void); 161 void dynamic_preempt_schedule_notrace(void); 162 #define __preempt_schedule() dynamic_preempt_schedule() 163 #define __preempt_schedule_notrace() dynamic_preempt_schedule_notrace() 164 165 #else /* CONFIG_PREEMPT_DYNAMIC */ 166 167 #define __preempt_schedule() preempt_schedule() 168 #define __preempt_schedule_notrace() preempt_schedule_notrace() 169 170 #endif /* CONFIG_PREEMPT_DYNAMIC */ 171 172 #endif /* CONFIG_PREEMPTION */ 173 174 #endif /* __ASM_PREEMPT_H */ 175