xref: /linux/arch/s390/include/asm/preempt.h (revision 6f7e6393d1ce636bb7ec77a7fe7b77458fddf701)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ASM_PREEMPT_H
3 #define __ASM_PREEMPT_H
4 
5 #include <asm/current.h>
6 #include <linux/thread_info.h>
7 #include <asm/atomic_ops.h>
8 #include <asm/cmpxchg.h>
9 #include <asm/march.h>
10 
11 /*
12  * Use MSB so it is possible to read preempt_count with LLGT which
13  * reads the least significant 31 bits with a single instruction.
14  */
15 #define PREEMPT_NEED_RESCHED	0x80000000
16 
17 /*
18  * We use the PREEMPT_NEED_RESCHED bit as an inverted NEED_RESCHED such
19  * that a decrement hitting 0 means we can and should reschedule.
20  */
21 #define PREEMPT_ENABLED	(0 + PREEMPT_NEED_RESCHED)
22 
23 /*
24  * We mask the PREEMPT_NEED_RESCHED bit so as not to confuse all current users
25  * that think a non-zero value indicates we cannot preempt.
26  */
27 static __always_inline int preempt_count(void)
28 {
29 	unsigned long lc_preempt, count;
30 
31 	BUILD_BUG_ON(sizeof_field(struct lowcore, preempt_count) != sizeof(int));
32 	lc_preempt = offsetof(struct lowcore, preempt_count);
33 	/* READ_ONCE(get_lowcore()->preempt_count) & ~PREEMPT_NEED_RESCHED */
34 	asm_inline(
35 		ALTERNATIVE("llgt	%[count],%[offzero](%%r0)\n",
36 			    "llgt	%[count],%[offalt](%%r0)\n",
37 			    ALT_FEATURE(MFEATURE_LOWCORE))
38 		: [count] "=d" (count)
39 		: [offzero] "i" (lc_preempt),
40 		  [offalt] "i" (lc_preempt + LOWCORE_ALT_ADDRESS),
41 		  "m" (((struct lowcore *)0)->preempt_count));
42 	return count;
43 }
44 
45 static __always_inline void preempt_count_set(int pc)
46 {
47 	int old, new;
48 
49 	old = READ_ONCE(get_lowcore()->preempt_count);
50 	do {
51 		new = (old & PREEMPT_NEED_RESCHED) | (pc & ~PREEMPT_NEED_RESCHED);
52 	} while (!arch_try_cmpxchg(&get_lowcore()->preempt_count, &old, new));
53 }
54 
55 /*
56  * We fold the NEED_RESCHED bit into the preempt count such that
57  * preempt_enable() can decrement and test for needing to reschedule with a
58  * short instruction sequence.
59  *
60  * We invert the actual bit, so that when the decrement hits 0 we know we both
61  * need to resched (the bit is cleared) and can resched (no preempt count).
62  */
63 
64 static __always_inline void set_preempt_need_resched(void)
65 {
66 	__atomic_and(~PREEMPT_NEED_RESCHED, &get_lowcore()->preempt_count);
67 }
68 
69 static __always_inline void clear_preempt_need_resched(void)
70 {
71 	__atomic_or(PREEMPT_NEED_RESCHED, &get_lowcore()->preempt_count);
72 }
73 
74 static __always_inline bool test_preempt_need_resched(void)
75 {
76 	return !(READ_ONCE(get_lowcore()->preempt_count) & PREEMPT_NEED_RESCHED);
77 }
78 
79 static __always_inline void __preempt_count_add(int val)
80 {
81 	/*
82 	 * With some obscure config options and CONFIG_PROFILE_ALL_BRANCHES
83 	 * enabled, gcc 12 fails to handle __builtin_constant_p().
84 	 */
85 	if (!IS_ENABLED(CONFIG_PROFILE_ALL_BRANCHES)) {
86 		if (__builtin_constant_p(val) && (val >= -128) && (val <= 127)) {
87 			unsigned long lc_preempt;
88 
89 			lc_preempt = offsetof(struct lowcore, preempt_count);
90 			asm_inline(
91 				ALTERNATIVE("asi	%[offzero](%%r0),%[val]\n",
92 					    "asi	%[offalt](%%r0),%[val]\n",
93 					    ALT_FEATURE(MFEATURE_LOWCORE))
94 				: "+m" (((struct lowcore *)0)->preempt_count)
95 				: [offzero] "i" (lc_preempt), [val] "i" (val),
96 				  [offalt] "i" (lc_preempt + LOWCORE_ALT_ADDRESS)
97 				: "cc");
98 			return;
99 		}
100 	}
101 	__atomic_add(val, &get_lowcore()->preempt_count);
102 }
103 
104 static __always_inline void __preempt_count_sub(int val)
105 {
106 	__preempt_count_add(-val);
107 }
108 
109 /*
110  * Because we keep PREEMPT_NEED_RESCHED set when we do _not_ need to reschedule
111  * a decrement which hits zero means we have no preempt_count and should
112  * reschedule.
113  */
114 static __always_inline bool __preempt_count_dec_and_test(void)
115 {
116 #ifdef __HAVE_ASM_FLAG_OUTPUTS__
117 	unsigned long lc_preempt;
118 	int cc;
119 
120 	lc_preempt = offsetof(struct lowcore, preempt_count);
121 	asm_inline(
122 		ALTERNATIVE("alsi	%[offzero](%%r0),%[val]\n",
123 			    "alsi	%[offalt](%%r0),%[val]\n",
124 			    ALT_FEATURE(MFEATURE_LOWCORE))
125 		: "=@cc" (cc), "+m" (((struct lowcore *)0)->preempt_count)
126 		: [offzero] "i" (lc_preempt), [val] "i" (-1),
127 		[offalt] "i" (lc_preempt + LOWCORE_ALT_ADDRESS));
128 	return (cc == 0) || (cc == 2);
129 #else
130 	return __atomic_add_const_and_test(-1, &get_lowcore()->preempt_count);
131 #endif
132 }
133 
134 /*
135  * Returns true when we need to resched and can (barring IRQ state).
136  */
137 static __always_inline bool should_resched(int preempt_offset)
138 {
139 	return unlikely(READ_ONCE(get_lowcore()->preempt_count) == preempt_offset);
140 }
141 
142 #define init_task_preempt_count(p)	do { } while (0)
143 /* Deferred to CPU bringup time */
144 #define init_idle_preempt_count(p, cpu)	do { } while (0)
145 
146 #ifdef CONFIG_PREEMPTION
147 
148 void preempt_schedule(void);
149 void preempt_schedule_notrace(void);
150 
151 #ifdef CONFIG_PREEMPT_DYNAMIC
152 
153 void dynamic_preempt_schedule(void);
154 void dynamic_preempt_schedule_notrace(void);
155 #define __preempt_schedule()		dynamic_preempt_schedule()
156 #define __preempt_schedule_notrace()	dynamic_preempt_schedule_notrace()
157 
158 #else /* CONFIG_PREEMPT_DYNAMIC */
159 
160 #define __preempt_schedule()		preempt_schedule()
161 #define __preempt_schedule_notrace()	preempt_schedule_notrace()
162 
163 #endif /* CONFIG_PREEMPT_DYNAMIC */
164 
165 #endif /* CONFIG_PREEMPTION */
166 
167 #endif /* __ASM_PREEMPT_H */
168