1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __ASM_S390_PCI_H 3 #define __ASM_S390_PCI_H 4 5 #include <linux/pci.h> 6 #include <linux/mutex.h> 7 #include <linux/iommu.h> 8 #include <linux/pci_hotplug.h> 9 #include <asm/pci_clp.h> 10 #include <asm/pci_debug.h> 11 #include <asm/pci_insn.h> 12 #include <asm/sclp.h> 13 14 #define PCIBIOS_MIN_IO 0x1000 15 #define PCIBIOS_MIN_MEM 0x10000000 16 17 #define pcibios_assign_all_busses() (0) 18 19 void __iomem *pci_iomap(struct pci_dev *, int, unsigned long); 20 void pci_iounmap(struct pci_dev *, void __iomem *); 21 int pci_domain_nr(struct pci_bus *); 22 int pci_proc_domain(struct pci_bus *); 23 24 #define ZPCI_BUS_NR 0 /* default bus number */ 25 26 #define ZPCI_NR_DMA_SPACES 1 27 #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS 28 #define ZPCI_DOMAIN_BITMAP_SIZE (1 << 16) 29 30 #ifdef PCI 31 #if (ZPCI_NR_DEVICES > ZPCI_DOMAIN_BITMAP_SIZE) 32 # error ZPCI_NR_DEVICES can not be bigger than ZPCI_DOMAIN_BITMAP_SIZE 33 #endif 34 #endif /* PCI */ 35 36 /* PCI Function Controls */ 37 #define ZPCI_FC_FN_ENABLED 0x80 38 #define ZPCI_FC_ERROR 0x40 39 #define ZPCI_FC_BLOCKED 0x20 40 #define ZPCI_FC_DMA_ENABLED 0x10 41 42 #define ZPCI_FMB_DMA_COUNTER_VALID (1 << 23) 43 44 struct zpci_fmb_fmt0 { 45 u64 dma_rbytes; 46 u64 dma_wbytes; 47 }; 48 49 struct zpci_fmb_fmt1 { 50 u64 rx_bytes; 51 u64 rx_packets; 52 u64 tx_bytes; 53 u64 tx_packets; 54 }; 55 56 struct zpci_fmb_fmt2 { 57 u64 consumed_work_units; 58 u64 max_work_units; 59 }; 60 61 struct zpci_fmb_fmt3 { 62 u64 tx_bytes; 63 }; 64 65 struct zpci_fmb { 66 u32 format : 8; 67 u32 fmt_ind : 24; 68 u32 samples; 69 u64 last_update; 70 /* common counters */ 71 u64 ld_ops; 72 u64 st_ops; 73 u64 stb_ops; 74 u64 rpcit_ops; 75 /* format specific counters */ 76 union { 77 struct zpci_fmb_fmt0 fmt0; 78 struct zpci_fmb_fmt1 fmt1; 79 struct zpci_fmb_fmt2 fmt2; 80 struct zpci_fmb_fmt3 fmt3; 81 }; 82 } __packed __aligned(128); 83 84 enum zpci_state { 85 ZPCI_FN_STATE_STANDBY = 0, 86 ZPCI_FN_STATE_CONFIGURED = 1, 87 ZPCI_FN_STATE_RESERVED = 2, 88 }; 89 90 struct zpci_bar_struct { 91 struct resource *res; /* bus resource */ 92 void __iomem *mio_wb; 93 void __iomem *mio_wt; 94 u32 val; /* bar start & 3 flag bits */ 95 u16 map_idx; /* index into bar mapping array */ 96 u8 size; /* order 2 exponent */ 97 }; 98 99 struct s390_domain; 100 struct kvm_zdev; 101 102 #define ZPCI_FUNCTIONS_PER_BUS 256 103 struct zpci_bus { 104 struct kref kref; 105 struct pci_bus *bus; 106 struct zpci_dev *function[ZPCI_FUNCTIONS_PER_BUS]; 107 struct list_head resources; 108 struct list_head bus_next; 109 struct resource bus_resource; 110 int pchid; 111 int domain_nr; 112 bool multifunction; 113 enum pci_bus_speed max_bus_speed; 114 }; 115 116 /* Private data per function */ 117 struct zpci_dev { 118 struct zpci_bus *zbus; 119 struct list_head entry; /* list of all zpci_devices, needed for hotplug, etc. */ 120 struct list_head iommu_list; 121 struct kref kref; 122 struct rcu_head rcu; 123 struct hotplug_slot hotplug_slot; 124 125 struct mutex state_lock; /* protect state changes */ 126 enum zpci_state state; 127 u32 fid; /* function ID, used by sclp */ 128 u32 fh; /* function handle, used by insn's */ 129 u32 gisa; /* GISA designation for passthrough */ 130 u16 vfn; /* virtual function number */ 131 u16 pchid; /* physical channel ID */ 132 u16 maxstbl; /* Maximum store block size */ 133 u8 pfgid; /* function group ID */ 134 u8 pft; /* pci function type */ 135 u8 port; 136 u8 dtsm; /* Supported DT mask */ 137 u8 rid_available : 1; 138 u8 has_hp_slot : 1; 139 u8 has_resources : 1; 140 u8 is_physfn : 1; 141 u8 util_str_avail : 1; 142 u8 irqs_registered : 1; 143 u8 reserved : 2; 144 unsigned int devfn; /* DEVFN part of the RID*/ 145 146 u8 pfip[CLP_PFIP_NR_SEGMENTS]; /* pci function internal path */ 147 u32 uid; /* user defined id */ 148 u8 util_str[CLP_UTIL_STR_LEN]; /* utility string */ 149 150 /* IRQ stuff */ 151 u64 msi_addr; /* MSI address */ 152 unsigned int max_msi; /* maximum number of MSI's */ 153 unsigned int msi_first_bit; 154 unsigned int msi_nr_irqs; 155 struct airq_iv *aibv; /* adapter interrupt bit vector */ 156 unsigned long aisb; /* number of the summary bit */ 157 158 /* DMA stuff */ 159 unsigned long *dma_table; 160 int tlb_refresh; 161 162 struct iommu_device iommu_dev; /* IOMMU core handle */ 163 164 char res_name[16]; 165 bool mio_capable; 166 struct zpci_bar_struct bars[PCI_STD_NUM_BARS]; 167 168 u64 start_dma; /* Start of available DMA addresses */ 169 u64 end_dma; /* End of available DMA addresses */ 170 u64 dma_mask; /* DMA address space mask */ 171 172 /* Function measurement block */ 173 struct mutex fmb_lock; 174 struct zpci_fmb *fmb; 175 u16 fmb_update; /* update interval */ 176 u16 fmb_length; 177 178 u8 version; 179 enum pci_bus_speed max_bus_speed; 180 181 struct dentry *debugfs_dev; 182 183 /* IOMMU and passthrough */ 184 struct s390_domain *s390_domain; /* s390 IOMMU domain data */ 185 struct kvm_zdev *kzdev; 186 struct mutex kzdev_lock; 187 }; 188 189 static inline bool zdev_enabled(struct zpci_dev *zdev) 190 { 191 return (zdev->fh & (1UL << 31)) ? true : false; 192 } 193 194 extern const struct attribute_group zpci_attr_group; 195 extern const struct attribute_group pfip_attr_group; 196 extern const struct attribute_group zpci_ident_attr_group; 197 198 #define ARCH_PCI_DEV_GROUPS &zpci_attr_group, \ 199 &pfip_attr_group, \ 200 &zpci_ident_attr_group, 201 202 extern unsigned int s390_pci_force_floating __initdata; 203 extern unsigned int s390_pci_no_rid; 204 205 extern union zpci_sic_iib *zpci_aipb; 206 extern struct airq_iv *zpci_aif_sbv; 207 208 /* ----------------------------------------------------------------------------- 209 Prototypes 210 ----------------------------------------------------------------------------- */ 211 /* Base stuff */ 212 struct zpci_dev *zpci_create_device(u32 fid, u32 fh, enum zpci_state state); 213 int zpci_enable_device(struct zpci_dev *); 214 int zpci_disable_device(struct zpci_dev *); 215 int zpci_scan_configured_device(struct zpci_dev *zdev, u32 fh); 216 int zpci_deconfigure_device(struct zpci_dev *zdev); 217 void zpci_device_reserved(struct zpci_dev *zdev); 218 bool zpci_is_device_configured(struct zpci_dev *zdev); 219 220 int zpci_hot_reset_device(struct zpci_dev *zdev); 221 int zpci_register_ioat(struct zpci_dev *, u8, u64, u64, u64, u8 *); 222 int zpci_unregister_ioat(struct zpci_dev *, u8); 223 void zpci_remove_reserved_devices(void); 224 void zpci_update_fh(struct zpci_dev *zdev, u32 fh); 225 226 /* CLP */ 227 int clp_setup_writeback_mio(void); 228 int clp_scan_pci_devices(void); 229 int clp_query_pci_fn(struct zpci_dev *zdev); 230 int clp_enable_fh(struct zpci_dev *zdev, u32 *fh, u8 nr_dma_as); 231 int clp_disable_fh(struct zpci_dev *zdev, u32 *fh); 232 int clp_get_state(u32 fid, enum zpci_state *state); 233 int clp_refresh_fh(u32 fid, u32 *fh); 234 235 /* UID */ 236 void update_uid_checking(bool new); 237 238 /* IOMMU Interface */ 239 int zpci_init_iommu(struct zpci_dev *zdev); 240 void zpci_destroy_iommu(struct zpci_dev *zdev); 241 242 #ifdef CONFIG_PCI 243 static inline bool zpci_use_mio(struct zpci_dev *zdev) 244 { 245 return static_branch_likely(&have_mio) && zdev->mio_capable; 246 } 247 248 /* Error handling and recovery */ 249 void zpci_event_error(void *); 250 void zpci_event_availability(void *); 251 bool zpci_is_enabled(void); 252 #else /* CONFIG_PCI */ 253 static inline void zpci_event_error(void *e) {} 254 static inline void zpci_event_availability(void *e) {} 255 #endif /* CONFIG_PCI */ 256 257 #ifdef CONFIG_HOTPLUG_PCI_S390 258 int zpci_init_slot(struct zpci_dev *); 259 void zpci_exit_slot(struct zpci_dev *); 260 #else /* CONFIG_HOTPLUG_PCI_S390 */ 261 static inline int zpci_init_slot(struct zpci_dev *zdev) 262 { 263 return 0; 264 } 265 static inline void zpci_exit_slot(struct zpci_dev *zdev) {} 266 #endif /* CONFIG_HOTPLUG_PCI_S390 */ 267 268 /* Helpers */ 269 static inline struct zpci_dev *to_zpci(struct pci_dev *pdev) 270 { 271 struct zpci_bus *zbus = pdev->sysdata; 272 273 return zbus->function[pdev->devfn]; 274 } 275 276 static inline struct zpci_dev *to_zpci_dev(struct device *dev) 277 { 278 return to_zpci(to_pci_dev(dev)); 279 } 280 281 struct zpci_dev *get_zdev_by_fid(u32); 282 283 /* DMA */ 284 int zpci_dma_init(void); 285 void zpci_dma_exit(void); 286 int zpci_dma_init_device(struct zpci_dev *zdev); 287 int zpci_dma_exit_device(struct zpci_dev *zdev); 288 289 /* IRQ */ 290 int __init zpci_irq_init(void); 291 void __init zpci_irq_exit(void); 292 293 /* FMB */ 294 int zpci_fmb_enable_device(struct zpci_dev *); 295 int zpci_fmb_disable_device(struct zpci_dev *); 296 297 /* Debug */ 298 int zpci_debug_init(void); 299 void zpci_debug_exit(void); 300 void zpci_debug_init_device(struct zpci_dev *, const char *); 301 void zpci_debug_exit_device(struct zpci_dev *); 302 303 /* Error handling */ 304 int zpci_report_error(struct pci_dev *, struct zpci_report_error_header *); 305 int zpci_clear_error_state(struct zpci_dev *zdev); 306 int zpci_reset_load_store_blocked(struct zpci_dev *zdev); 307 308 #ifdef CONFIG_NUMA 309 310 /* Returns the node based on PCI bus */ 311 static inline int __pcibus_to_node(const struct pci_bus *bus) 312 { 313 return NUMA_NO_NODE; 314 } 315 316 static inline const struct cpumask * 317 cpumask_of_pcibus(const struct pci_bus *bus) 318 { 319 return cpu_online_mask; 320 } 321 322 #endif /* CONFIG_NUMA */ 323 324 #endif 325