1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __ASM_S390_PCI_H 3 #define __ASM_S390_PCI_H 4 5 #include <linux/pci.h> 6 #include <linux/mutex.h> 7 #include <linux/iommu.h> 8 #include <linux/pci_hotplug.h> 9 #include <asm/pci_clp.h> 10 #include <asm/pci_debug.h> 11 #include <asm/pci_insn.h> 12 #include <asm/sclp.h> 13 14 #define PCIBIOS_MIN_IO 0x1000 15 #define PCIBIOS_MIN_MEM 0x10000000 16 17 #define pcibios_assign_all_busses() (0) 18 19 void __iomem *pci_iomap(struct pci_dev *, int, unsigned long); 20 void pci_iounmap(struct pci_dev *, void __iomem *); 21 int pci_domain_nr(struct pci_bus *); 22 int pci_proc_domain(struct pci_bus *); 23 24 #define ZPCI_BUS_NR 0 /* default bus number */ 25 26 #define ZPCI_NR_DMA_SPACES 1 27 #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS 28 #define ZPCI_DOMAIN_BITMAP_SIZE (1 << 16) 29 30 #ifdef PCI 31 #if (ZPCI_NR_DEVICES > ZPCI_DOMAIN_BITMAP_SIZE) 32 # error ZPCI_NR_DEVICES can not be bigger than ZPCI_DOMAIN_BITMAP_SIZE 33 #endif 34 #endif /* PCI */ 35 36 /* PCI Function Controls */ 37 #define ZPCI_FC_FN_ENABLED 0x80 38 #define ZPCI_FC_ERROR 0x40 39 #define ZPCI_FC_BLOCKED 0x20 40 #define ZPCI_FC_DMA_ENABLED 0x10 41 42 #define ZPCI_FMB_DMA_COUNTER_VALID (1 << 23) 43 44 struct zpci_fmb_fmt0 { 45 u64 dma_rbytes; 46 u64 dma_wbytes; 47 }; 48 49 struct zpci_fmb_fmt1 { 50 u64 rx_bytes; 51 u64 rx_packets; 52 u64 tx_bytes; 53 u64 tx_packets; 54 }; 55 56 struct zpci_fmb_fmt2 { 57 u64 consumed_work_units; 58 u64 max_work_units; 59 }; 60 61 struct zpci_fmb_fmt3 { 62 u64 tx_bytes; 63 }; 64 65 struct zpci_fmb { 66 u32 format : 8; 67 u32 fmt_ind : 24; 68 u32 samples; 69 u64 last_update; 70 /* common counters */ 71 u64 ld_ops; 72 u64 st_ops; 73 u64 stb_ops; 74 u64 rpcit_ops; 75 /* format specific counters */ 76 union { 77 struct zpci_fmb_fmt0 fmt0; 78 struct zpci_fmb_fmt1 fmt1; 79 struct zpci_fmb_fmt2 fmt2; 80 struct zpci_fmb_fmt3 fmt3; 81 }; 82 } __packed __aligned(128); 83 84 enum zpci_state { 85 ZPCI_FN_STATE_STANDBY = 0, 86 ZPCI_FN_STATE_CONFIGURED = 1, 87 ZPCI_FN_STATE_RESERVED = 2, 88 }; 89 90 struct zpci_bar_struct { 91 struct resource *res; /* bus resource */ 92 void __iomem *mio_wb; 93 void __iomem *mio_wt; 94 u32 val; /* bar start & 3 flag bits */ 95 u16 map_idx; /* index into bar mapping array */ 96 u8 size; /* order 2 exponent */ 97 }; 98 99 struct kvm_zdev; 100 101 #define ZPCI_FUNCTIONS_PER_BUS 256 102 struct zpci_bus { 103 struct kref kref; 104 struct pci_bus *bus; 105 struct zpci_dev *function[ZPCI_FUNCTIONS_PER_BUS]; 106 struct list_head resources; 107 struct list_head bus_next; 108 struct resource bus_resource; 109 int topo; /* TID if topo_is_tid, PCHID otherwise */ 110 int domain_nr; 111 u8 multifunction : 1; 112 u8 topo_is_tid : 1; 113 enum pci_bus_speed max_bus_speed; 114 }; 115 116 /* Private data per function */ 117 struct zpci_dev { 118 struct zpci_bus *zbus; 119 struct list_head entry; /* list of all zpci_devices, needed for hotplug, etc. */ 120 struct list_head iommu_list; 121 struct kref kref; 122 struct rcu_head rcu; 123 struct hotplug_slot hotplug_slot; 124 125 struct mutex state_lock; /* protect state changes */ 126 enum zpci_state state; 127 u32 fid; /* function ID, used by sclp */ 128 u32 fh; /* function handle, used by insn's */ 129 u32 gisa; /* GISA designation for passthrough */ 130 u16 vfn; /* virtual function number */ 131 u16 pchid; /* physical channel ID */ 132 u16 maxstbl; /* Maximum store block size */ 133 u16 rid; /* RID as supplied by firmware */ 134 u16 tid; /* Topology for which RID is valid */ 135 u8 pfgid; /* function group ID */ 136 u8 pft; /* pci function type */ 137 u8 port; 138 u8 fidparm; 139 u8 dtsm; /* Supported DT mask */ 140 u8 rid_available : 1; 141 u8 has_hp_slot : 1; 142 u8 has_resources : 1; 143 u8 is_physfn : 1; 144 u8 util_str_avail : 1; 145 u8 irqs_registered : 1; 146 u8 tid_avail : 1; 147 u8 reserved : 1; 148 unsigned int devfn; /* DEVFN part of the RID*/ 149 150 u8 pfip[CLP_PFIP_NR_SEGMENTS]; /* pci function internal path */ 151 u32 uid; /* user defined id */ 152 u8 util_str[CLP_UTIL_STR_LEN]; /* utility string */ 153 154 /* IRQ stuff */ 155 u64 msi_addr; /* MSI address */ 156 unsigned int max_msi; /* maximum number of MSI's */ 157 unsigned int msi_first_bit; 158 unsigned int msi_nr_irqs; 159 struct airq_iv *aibv; /* adapter interrupt bit vector */ 160 unsigned long aisb; /* number of the summary bit */ 161 162 /* DMA stuff */ 163 unsigned long *dma_table; 164 int tlb_refresh; 165 166 struct iommu_device iommu_dev; /* IOMMU core handle */ 167 168 char res_name[16]; 169 bool mio_capable; 170 struct zpci_bar_struct bars[PCI_STD_NUM_BARS]; 171 172 u64 start_dma; /* Start of available DMA addresses */ 173 u64 end_dma; /* End of available DMA addresses */ 174 u64 dma_mask; /* DMA address space mask */ 175 176 /* Function measurement block */ 177 struct mutex fmb_lock; 178 struct zpci_fmb *fmb; 179 u16 fmb_update; /* update interval */ 180 u16 fmb_length; 181 182 u8 version; 183 enum pci_bus_speed max_bus_speed; 184 185 struct dentry *debugfs_dev; 186 187 /* IOMMU and passthrough */ 188 struct iommu_domain *s390_domain; /* attached IOMMU domain */ 189 struct kvm_zdev *kzdev; 190 struct mutex kzdev_lock; 191 spinlock_t dom_lock; /* protect s390_domain change */ 192 }; 193 194 static inline bool zdev_enabled(struct zpci_dev *zdev) 195 { 196 return (zdev->fh & (1UL << 31)) ? true : false; 197 } 198 199 extern const struct attribute_group zpci_attr_group; 200 extern const struct attribute_group pfip_attr_group; 201 extern const struct attribute_group zpci_ident_attr_group; 202 203 #define ARCH_PCI_DEV_GROUPS &zpci_attr_group, \ 204 &pfip_attr_group, \ 205 &zpci_ident_attr_group, 206 207 extern unsigned int s390_pci_force_floating __initdata; 208 extern unsigned int s390_pci_no_rid; 209 210 extern union zpci_sic_iib *zpci_aipb; 211 extern struct airq_iv *zpci_aif_sbv; 212 213 /* ----------------------------------------------------------------------------- 214 Prototypes 215 ----------------------------------------------------------------------------- */ 216 /* Base stuff */ 217 struct zpci_dev *zpci_create_device(u32 fid, u32 fh, enum zpci_state state); 218 int zpci_add_device(struct zpci_dev *zdev); 219 int zpci_enable_device(struct zpci_dev *); 220 int zpci_disable_device(struct zpci_dev *); 221 int zpci_scan_configured_device(struct zpci_dev *zdev, u32 fh); 222 int zpci_deconfigure_device(struct zpci_dev *zdev); 223 void zpci_device_reserved(struct zpci_dev *zdev); 224 bool zpci_is_device_configured(struct zpci_dev *zdev); 225 int zpci_scan_devices(void); 226 227 int zpci_hot_reset_device(struct zpci_dev *zdev); 228 int zpci_register_ioat(struct zpci_dev *, u8, u64, u64, u64, u8 *); 229 int zpci_unregister_ioat(struct zpci_dev *, u8); 230 void zpci_remove_reserved_devices(void); 231 void zpci_update_fh(struct zpci_dev *zdev, u32 fh); 232 233 /* CLP */ 234 int clp_setup_writeback_mio(void); 235 int clp_scan_pci_devices(struct list_head *scan_list); 236 int clp_query_pci_fn(struct zpci_dev *zdev); 237 int clp_enable_fh(struct zpci_dev *zdev, u32 *fh, u8 nr_dma_as); 238 int clp_disable_fh(struct zpci_dev *zdev, u32 *fh); 239 int clp_get_state(u32 fid, enum zpci_state *state); 240 int clp_refresh_fh(u32 fid, u32 *fh); 241 242 /* UID */ 243 void update_uid_checking(bool new); 244 245 /* IOMMU Interface */ 246 int zpci_init_iommu(struct zpci_dev *zdev); 247 void zpci_destroy_iommu(struct zpci_dev *zdev); 248 249 #ifdef CONFIG_PCI 250 static inline bool zpci_use_mio(struct zpci_dev *zdev) 251 { 252 return static_branch_likely(&have_mio) && zdev->mio_capable; 253 } 254 255 /* Error handling and recovery */ 256 void zpci_event_error(void *); 257 void zpci_event_availability(void *); 258 bool zpci_is_enabled(void); 259 #else /* CONFIG_PCI */ 260 static inline void zpci_event_error(void *e) {} 261 static inline void zpci_event_availability(void *e) {} 262 #endif /* CONFIG_PCI */ 263 264 #ifdef CONFIG_HOTPLUG_PCI_S390 265 int zpci_init_slot(struct zpci_dev *); 266 void zpci_exit_slot(struct zpci_dev *); 267 #else /* CONFIG_HOTPLUG_PCI_S390 */ 268 static inline int zpci_init_slot(struct zpci_dev *zdev) 269 { 270 return 0; 271 } 272 static inline void zpci_exit_slot(struct zpci_dev *zdev) {} 273 #endif /* CONFIG_HOTPLUG_PCI_S390 */ 274 275 /* Helpers */ 276 static inline struct zpci_dev *to_zpci(struct pci_dev *pdev) 277 { 278 struct zpci_bus *zbus = pdev->sysdata; 279 280 return zbus->function[pdev->devfn]; 281 } 282 283 static inline struct zpci_dev *to_zpci_dev(struct device *dev) 284 { 285 return to_zpci(to_pci_dev(dev)); 286 } 287 288 struct zpci_dev *get_zdev_by_fid(u32); 289 290 /* DMA */ 291 int zpci_dma_init(void); 292 void zpci_dma_exit(void); 293 int zpci_dma_init_device(struct zpci_dev *zdev); 294 int zpci_dma_exit_device(struct zpci_dev *zdev); 295 296 /* IRQ */ 297 int __init zpci_irq_init(void); 298 void __init zpci_irq_exit(void); 299 300 /* FMB */ 301 int zpci_fmb_enable_device(struct zpci_dev *); 302 int zpci_fmb_disable_device(struct zpci_dev *); 303 304 /* Debug */ 305 int zpci_debug_init(void); 306 void zpci_debug_exit(void); 307 void zpci_debug_init_device(struct zpci_dev *, const char *); 308 void zpci_debug_exit_device(struct zpci_dev *); 309 310 /* Error handling */ 311 int zpci_report_error(struct pci_dev *, struct zpci_report_error_header *); 312 int zpci_clear_error_state(struct zpci_dev *zdev); 313 int zpci_reset_load_store_blocked(struct zpci_dev *zdev); 314 315 #ifdef CONFIG_NUMA 316 317 /* Returns the node based on PCI bus */ 318 static inline int __pcibus_to_node(const struct pci_bus *bus) 319 { 320 return NUMA_NO_NODE; 321 } 322 323 static inline const struct cpumask * 324 cpumask_of_pcibus(const struct pci_bus *bus) 325 { 326 return cpu_online_mask; 327 } 328 329 #endif /* CONFIG_NUMA */ 330 331 #endif 332