1*6ef8ff20SFeng Jiang/* SPDX-License-Identifier: GPL-2.0 */ 2*6ef8ff20SFeng Jiang/* Copyright (c) 2026 Feng Jiang <jiangfeng@kylinos.cn> */ 3*6ef8ff20SFeng Jiang 4*6ef8ff20SFeng Jiang#include <linux/linkage.h> 5*6ef8ff20SFeng Jiang#include <asm/asm.h> 6*6ef8ff20SFeng Jiang 7*6ef8ff20SFeng Jiang/* 8*6ef8ff20SFeng Jiang * Trampoline for the BPF timed may_goto loop bound. Custom calling convention: 9*6ef8ff20SFeng Jiang * - input: stack offset in BPF_REG_AX (t0) 10*6ef8ff20SFeng Jiang * - output: updated count in BPF_REG_AX (t0) 11*6ef8ff20SFeng Jiang * 12*6ef8ff20SFeng Jiang * Calls bpf_check_timed_may_goto(ptr) with the standard RISC-V ABI, where 13*6ef8ff20SFeng Jiang * ptr = BPF_REG_FP (s5) + BPF_REG_AX (t0). BPF R0-R5 (a5, a0-a4) are saved 14*6ef8ff20SFeng Jiang * across the call; BPF_REG_FP (s5) is callee-saved and needs no saving. 15*6ef8ff20SFeng Jiang */ 16*6ef8ff20SFeng Jiang 17*6ef8ff20SFeng JiangSYM_FUNC_START(arch_bpf_timed_may_goto) 18*6ef8ff20SFeng Jiang addi sp, sp, -(8*SZREG) 19*6ef8ff20SFeng Jiang REG_S ra, 7*SZREG(sp) 20*6ef8ff20SFeng Jiang REG_S s0, 6*SZREG(sp) 21*6ef8ff20SFeng Jiang addi s0, sp, 8*SZREG 22*6ef8ff20SFeng Jiang 23*6ef8ff20SFeng Jiang /* Save BPF registers R0-R5 (a5, a0-a4) */ 24*6ef8ff20SFeng Jiang REG_S a5, 5*SZREG(sp) 25*6ef8ff20SFeng Jiang REG_S a0, 4*SZREG(sp) 26*6ef8ff20SFeng Jiang REG_S a1, 3*SZREG(sp) 27*6ef8ff20SFeng Jiang REG_S a2, 2*SZREG(sp) 28*6ef8ff20SFeng Jiang REG_S a3, 1*SZREG(sp) 29*6ef8ff20SFeng Jiang REG_S a4, 0*SZREG(sp) 30*6ef8ff20SFeng Jiang 31*6ef8ff20SFeng Jiang add a0, t0, s5 32*6ef8ff20SFeng Jiang call bpf_check_timed_may_goto 33*6ef8ff20SFeng Jiang mv t0, a0 34*6ef8ff20SFeng Jiang 35*6ef8ff20SFeng Jiang /* Restore BPF registers R0-R5 */ 36*6ef8ff20SFeng Jiang REG_L a4, 0*SZREG(sp) 37*6ef8ff20SFeng Jiang REG_L a3, 1*SZREG(sp) 38*6ef8ff20SFeng Jiang REG_L a2, 2*SZREG(sp) 39*6ef8ff20SFeng Jiang REG_L a1, 3*SZREG(sp) 40*6ef8ff20SFeng Jiang REG_L a0, 4*SZREG(sp) 41*6ef8ff20SFeng Jiang REG_L a5, 5*SZREG(sp) 42*6ef8ff20SFeng Jiang 43*6ef8ff20SFeng Jiang REG_L s0, 6*SZREG(sp) 44*6ef8ff20SFeng Jiang REG_L ra, 7*SZREG(sp) 45*6ef8ff20SFeng Jiang addi sp, sp, 8*SZREG 46*6ef8ff20SFeng Jiang ret 47*6ef8ff20SFeng JiangSYM_FUNC_END(arch_bpf_timed_may_goto) 48