xref: /linux/arch/riscv/mm/init.c (revision b48b89f9c189d24eb5e2b4a0ac067da5a24ee86d)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2012 Regents of the University of California
4  * Copyright (C) 2019 Western Digital Corporation or its affiliates.
5  * Copyright (C) 2020 FORTH-ICS/CARV
6  *  Nick Kossifidis <mick@ics.forth.gr>
7  */
8 
9 #include <linux/init.h>
10 #include <linux/mm.h>
11 #include <linux/memblock.h>
12 #include <linux/initrd.h>
13 #include <linux/swap.h>
14 #include <linux/swiotlb.h>
15 #include <linux/sizes.h>
16 #include <linux/of_fdt.h>
17 #include <linux/of_reserved_mem.h>
18 #include <linux/libfdt.h>
19 #include <linux/set_memory.h>
20 #include <linux/dma-map-ops.h>
21 #include <linux/crash_dump.h>
22 #include <linux/hugetlb.h>
23 
24 #include <asm/fixmap.h>
25 #include <asm/tlbflush.h>
26 #include <asm/sections.h>
27 #include <asm/soc.h>
28 #include <asm/io.h>
29 #include <asm/ptdump.h>
30 #include <asm/numa.h>
31 
32 #include "../kernel/head.h"
33 
34 struct kernel_mapping kernel_map __ro_after_init;
35 EXPORT_SYMBOL(kernel_map);
36 #ifdef CONFIG_XIP_KERNEL
37 #define kernel_map	(*(struct kernel_mapping *)XIP_FIXUP(&kernel_map))
38 #endif
39 
40 #ifdef CONFIG_64BIT
41 u64 satp_mode __ro_after_init = !IS_ENABLED(CONFIG_XIP_KERNEL) ? SATP_MODE_57 : SATP_MODE_39;
42 #else
43 u64 satp_mode __ro_after_init = SATP_MODE_32;
44 #endif
45 EXPORT_SYMBOL(satp_mode);
46 
47 bool pgtable_l4_enabled = IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_XIP_KERNEL);
48 bool pgtable_l5_enabled = IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_XIP_KERNEL);
49 EXPORT_SYMBOL(pgtable_l4_enabled);
50 EXPORT_SYMBOL(pgtable_l5_enabled);
51 
52 phys_addr_t phys_ram_base __ro_after_init;
53 EXPORT_SYMBOL(phys_ram_base);
54 
55 unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
56 							__page_aligned_bss;
57 EXPORT_SYMBOL(empty_zero_page);
58 
59 extern char _start[];
60 #define DTB_EARLY_BASE_VA      PGDIR_SIZE
61 void *_dtb_early_va __initdata;
62 uintptr_t _dtb_early_pa __initdata;
63 
64 static phys_addr_t dma32_phys_limit __initdata;
65 
66 static void __init zone_sizes_init(void)
67 {
68 	unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, };
69 
70 #ifdef CONFIG_ZONE_DMA32
71 	max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit);
72 #endif
73 	max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
74 
75 	free_area_init(max_zone_pfns);
76 }
77 
78 #if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM)
79 
80 #define LOG2_SZ_1K  ilog2(SZ_1K)
81 #define LOG2_SZ_1M  ilog2(SZ_1M)
82 #define LOG2_SZ_1G  ilog2(SZ_1G)
83 #define LOG2_SZ_1T  ilog2(SZ_1T)
84 
85 static inline void print_mlk(char *name, unsigned long b, unsigned long t)
86 {
87 	pr_notice("%12s : 0x%08lx - 0x%08lx   (%4ld kB)\n", name, b, t,
88 		  (((t) - (b)) >> LOG2_SZ_1K));
89 }
90 
91 static inline void print_mlm(char *name, unsigned long b, unsigned long t)
92 {
93 	pr_notice("%12s : 0x%08lx - 0x%08lx   (%4ld MB)\n", name, b, t,
94 		  (((t) - (b)) >> LOG2_SZ_1M));
95 }
96 
97 static inline void print_mlg(char *name, unsigned long b, unsigned long t)
98 {
99 	pr_notice("%12s : 0x%08lx - 0x%08lx   (%4ld GB)\n", name, b, t,
100 		   (((t) - (b)) >> LOG2_SZ_1G));
101 }
102 
103 #ifdef CONFIG_64BIT
104 static inline void print_mlt(char *name, unsigned long b, unsigned long t)
105 {
106 	pr_notice("%12s : 0x%08lx - 0x%08lx   (%4ld TB)\n", name, b, t,
107 		   (((t) - (b)) >> LOG2_SZ_1T));
108 }
109 #else
110 #define print_mlt(n, b, t) do {} while (0)
111 #endif
112 
113 static inline void print_ml(char *name, unsigned long b, unsigned long t)
114 {
115 	unsigned long diff = t - b;
116 
117 	if (IS_ENABLED(CONFIG_64BIT) && (diff >> LOG2_SZ_1T) >= 10)
118 		print_mlt(name, b, t);
119 	else if ((diff >> LOG2_SZ_1G) >= 10)
120 		print_mlg(name, b, t);
121 	else if ((diff >> LOG2_SZ_1M) >= 10)
122 		print_mlm(name, b, t);
123 	else
124 		print_mlk(name, b, t);
125 }
126 
127 static void __init print_vm_layout(void)
128 {
129 	pr_notice("Virtual kernel memory layout:\n");
130 	print_ml("fixmap", (unsigned long)FIXADDR_START,
131 		(unsigned long)FIXADDR_TOP);
132 	print_ml("pci io", (unsigned long)PCI_IO_START,
133 		(unsigned long)PCI_IO_END);
134 	print_ml("vmemmap", (unsigned long)VMEMMAP_START,
135 		(unsigned long)VMEMMAP_END);
136 	print_ml("vmalloc", (unsigned long)VMALLOC_START,
137 		(unsigned long)VMALLOC_END);
138 #ifdef CONFIG_64BIT
139 	print_ml("modules", (unsigned long)MODULES_VADDR,
140 		(unsigned long)MODULES_END);
141 #endif
142 	print_ml("lowmem", (unsigned long)PAGE_OFFSET,
143 		(unsigned long)high_memory);
144 	if (IS_ENABLED(CONFIG_64BIT)) {
145 #ifdef CONFIG_KASAN
146 		print_ml("kasan", KASAN_SHADOW_START, KASAN_SHADOW_END);
147 #endif
148 
149 		print_ml("kernel", (unsigned long)KERNEL_LINK_ADDR,
150 			 (unsigned long)ADDRESS_SPACE_END);
151 	}
152 }
153 #else
154 static void print_vm_layout(void) { }
155 #endif /* CONFIG_DEBUG_VM */
156 
157 void __init mem_init(void)
158 {
159 #ifdef CONFIG_FLATMEM
160 	BUG_ON(!mem_map);
161 #endif /* CONFIG_FLATMEM */
162 
163 	swiotlb_init(max_pfn > PFN_DOWN(dma32_phys_limit), SWIOTLB_VERBOSE);
164 	memblock_free_all();
165 
166 	print_vm_layout();
167 }
168 
169 /* Limit the memory size via mem. */
170 static phys_addr_t memory_limit;
171 
172 static int __init early_mem(char *p)
173 {
174 	u64 size;
175 
176 	if (!p)
177 		return 1;
178 
179 	size = memparse(p, &p) & PAGE_MASK;
180 	memory_limit = min_t(u64, size, memory_limit);
181 
182 	pr_notice("Memory limited to %lldMB\n", (u64)memory_limit >> 20);
183 
184 	return 0;
185 }
186 early_param("mem", early_mem);
187 
188 static void __init setup_bootmem(void)
189 {
190 	phys_addr_t vmlinux_end = __pa_symbol(&_end);
191 	phys_addr_t max_mapped_addr;
192 	phys_addr_t phys_ram_end, vmlinux_start;
193 
194 	if (IS_ENABLED(CONFIG_XIP_KERNEL))
195 		vmlinux_start = __pa_symbol(&_sdata);
196 	else
197 		vmlinux_start = __pa_symbol(&_start);
198 
199 	memblock_enforce_memory_limit(memory_limit);
200 
201 	/*
202 	 * Make sure we align the reservation on PMD_SIZE since we will
203 	 * map the kernel in the linear mapping as read-only: we do not want
204 	 * any allocation to happen between _end and the next pmd aligned page.
205 	 */
206 	if (IS_ENABLED(CONFIG_64BIT) && IS_ENABLED(CONFIG_STRICT_KERNEL_RWX))
207 		vmlinux_end = (vmlinux_end + PMD_SIZE - 1) & PMD_MASK;
208 	/*
209 	 * Reserve from the start of the kernel to the end of the kernel
210 	 */
211 	memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
212 
213 	phys_ram_end = memblock_end_of_DRAM();
214 	if (!IS_ENABLED(CONFIG_XIP_KERNEL))
215 		phys_ram_base = memblock_start_of_DRAM();
216 	/*
217 	 * memblock allocator is not aware of the fact that last 4K bytes of
218 	 * the addressable memory can not be mapped because of IS_ERR_VALUE
219 	 * macro. Make sure that last 4k bytes are not usable by memblock
220 	 * if end of dram is equal to maximum addressable memory.  For 64-bit
221 	 * kernel, this problem can't happen here as the end of the virtual
222 	 * address space is occupied by the kernel mapping then this check must
223 	 * be done as soon as the kernel mapping base address is determined.
224 	 */
225 	if (!IS_ENABLED(CONFIG_64BIT)) {
226 		max_mapped_addr = __pa(~(ulong)0);
227 		if (max_mapped_addr == (phys_ram_end - 1))
228 			memblock_set_current_limit(max_mapped_addr - 4096);
229 	}
230 
231 	min_low_pfn = PFN_UP(phys_ram_base);
232 	max_low_pfn = max_pfn = PFN_DOWN(phys_ram_end);
233 	high_memory = (void *)(__va(PFN_PHYS(max_low_pfn)));
234 
235 	dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn));
236 	set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);
237 
238 	reserve_initrd_mem();
239 	/*
240 	 * If DTB is built in, no need to reserve its memblock.
241 	 * Otherwise, do reserve it but avoid using
242 	 * early_init_fdt_reserve_self() since __pa() does
243 	 * not work for DTB pointers that are fixmap addresses
244 	 */
245 	if (!IS_ENABLED(CONFIG_BUILTIN_DTB)) {
246 		/*
247 		 * In case the DTB is not located in a memory region we won't
248 		 * be able to locate it later on via the linear mapping and
249 		 * get a segfault when accessing it via __va(dtb_early_pa).
250 		 * To avoid this situation copy DTB to a memory region.
251 		 * Note that memblock_phys_alloc will also reserve DTB region.
252 		 */
253 		if (!memblock_is_memory(dtb_early_pa)) {
254 			size_t fdt_size = fdt_totalsize(dtb_early_va);
255 			phys_addr_t new_dtb_early_pa = memblock_phys_alloc(fdt_size, PAGE_SIZE);
256 			void *new_dtb_early_va = early_memremap(new_dtb_early_pa, fdt_size);
257 
258 			memcpy(new_dtb_early_va, dtb_early_va, fdt_size);
259 			early_memunmap(new_dtb_early_va, fdt_size);
260 			_dtb_early_pa = new_dtb_early_pa;
261 		} else
262 			memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
263 	}
264 
265 	early_init_fdt_scan_reserved_mem();
266 	dma_contiguous_reserve(dma32_phys_limit);
267 	if (IS_ENABLED(CONFIG_64BIT))
268 		hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT);
269 	memblock_allow_resize();
270 }
271 
272 #ifdef CONFIG_MMU
273 struct pt_alloc_ops pt_ops __initdata;
274 
275 unsigned long riscv_pfn_base __ro_after_init;
276 EXPORT_SYMBOL(riscv_pfn_base);
277 
278 pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
279 pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
280 static pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
281 
282 pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
283 static p4d_t __maybe_unused early_dtb_p4d[PTRS_PER_P4D] __initdata __aligned(PAGE_SIZE);
284 static pud_t __maybe_unused early_dtb_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE);
285 static pmd_t __maybe_unused early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
286 
287 #ifdef CONFIG_XIP_KERNEL
288 #define pt_ops			(*(struct pt_alloc_ops *)XIP_FIXUP(&pt_ops))
289 #define riscv_pfn_base         (*(unsigned long  *)XIP_FIXUP(&riscv_pfn_base))
290 #define trampoline_pg_dir      ((pgd_t *)XIP_FIXUP(trampoline_pg_dir))
291 #define fixmap_pte             ((pte_t *)XIP_FIXUP(fixmap_pte))
292 #define early_pg_dir           ((pgd_t *)XIP_FIXUP(early_pg_dir))
293 #endif /* CONFIG_XIP_KERNEL */
294 
295 static const pgprot_t protection_map[16] = {
296 	[VM_NONE]					= PAGE_NONE,
297 	[VM_READ]					= PAGE_READ,
298 	[VM_WRITE]					= PAGE_COPY,
299 	[VM_WRITE | VM_READ]				= PAGE_COPY,
300 	[VM_EXEC]					= PAGE_EXEC,
301 	[VM_EXEC | VM_READ]				= PAGE_READ_EXEC,
302 	[VM_EXEC | VM_WRITE]				= PAGE_COPY_EXEC,
303 	[VM_EXEC | VM_WRITE | VM_READ]			= PAGE_COPY_READ_EXEC,
304 	[VM_SHARED]					= PAGE_NONE,
305 	[VM_SHARED | VM_READ]				= PAGE_READ,
306 	[VM_SHARED | VM_WRITE]				= PAGE_SHARED,
307 	[VM_SHARED | VM_WRITE | VM_READ]		= PAGE_SHARED,
308 	[VM_SHARED | VM_EXEC]				= PAGE_EXEC,
309 	[VM_SHARED | VM_EXEC | VM_READ]			= PAGE_READ_EXEC,
310 	[VM_SHARED | VM_EXEC | VM_WRITE]		= PAGE_SHARED_EXEC,
311 	[VM_SHARED | VM_EXEC | VM_WRITE | VM_READ]	= PAGE_SHARED_EXEC
312 };
313 DECLARE_VM_GET_PAGE_PROT
314 
315 void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
316 {
317 	unsigned long addr = __fix_to_virt(idx);
318 	pte_t *ptep;
319 
320 	BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
321 
322 	ptep = &fixmap_pte[pte_index(addr)];
323 
324 	if (pgprot_val(prot))
325 		set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
326 	else
327 		pte_clear(&init_mm, addr, ptep);
328 	local_flush_tlb_page(addr);
329 }
330 
331 static inline pte_t *__init get_pte_virt_early(phys_addr_t pa)
332 {
333 	return (pte_t *)((uintptr_t)pa);
334 }
335 
336 static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa)
337 {
338 	clear_fixmap(FIX_PTE);
339 	return (pte_t *)set_fixmap_offset(FIX_PTE, pa);
340 }
341 
342 static inline pte_t *__init get_pte_virt_late(phys_addr_t pa)
343 {
344 	return (pte_t *) __va(pa);
345 }
346 
347 static inline phys_addr_t __init alloc_pte_early(uintptr_t va)
348 {
349 	/*
350 	 * We only create PMD or PGD early mappings so we
351 	 * should never reach here with MMU disabled.
352 	 */
353 	BUG();
354 }
355 
356 static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va)
357 {
358 	return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
359 }
360 
361 static phys_addr_t __init alloc_pte_late(uintptr_t va)
362 {
363 	unsigned long vaddr;
364 
365 	vaddr = __get_free_page(GFP_KERNEL);
366 	BUG_ON(!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr)));
367 
368 	return __pa(vaddr);
369 }
370 
371 static void __init create_pte_mapping(pte_t *ptep,
372 				      uintptr_t va, phys_addr_t pa,
373 				      phys_addr_t sz, pgprot_t prot)
374 {
375 	uintptr_t pte_idx = pte_index(va);
376 
377 	BUG_ON(sz != PAGE_SIZE);
378 
379 	if (pte_none(ptep[pte_idx]))
380 		ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot);
381 }
382 
383 #ifndef __PAGETABLE_PMD_FOLDED
384 
385 static pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss;
386 static pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss;
387 static pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
388 
389 #ifdef CONFIG_XIP_KERNEL
390 #define trampoline_pmd ((pmd_t *)XIP_FIXUP(trampoline_pmd))
391 #define fixmap_pmd     ((pmd_t *)XIP_FIXUP(fixmap_pmd))
392 #define early_pmd      ((pmd_t *)XIP_FIXUP(early_pmd))
393 #endif /* CONFIG_XIP_KERNEL */
394 
395 static p4d_t trampoline_p4d[PTRS_PER_P4D] __page_aligned_bss;
396 static p4d_t fixmap_p4d[PTRS_PER_P4D] __page_aligned_bss;
397 static p4d_t early_p4d[PTRS_PER_P4D] __initdata __aligned(PAGE_SIZE);
398 
399 #ifdef CONFIG_XIP_KERNEL
400 #define trampoline_p4d ((p4d_t *)XIP_FIXUP(trampoline_p4d))
401 #define fixmap_p4d     ((p4d_t *)XIP_FIXUP(fixmap_p4d))
402 #define early_p4d      ((p4d_t *)XIP_FIXUP(early_p4d))
403 #endif /* CONFIG_XIP_KERNEL */
404 
405 static pud_t trampoline_pud[PTRS_PER_PUD] __page_aligned_bss;
406 static pud_t fixmap_pud[PTRS_PER_PUD] __page_aligned_bss;
407 static pud_t early_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE);
408 
409 #ifdef CONFIG_XIP_KERNEL
410 #define trampoline_pud ((pud_t *)XIP_FIXUP(trampoline_pud))
411 #define fixmap_pud     ((pud_t *)XIP_FIXUP(fixmap_pud))
412 #define early_pud      ((pud_t *)XIP_FIXUP(early_pud))
413 #endif /* CONFIG_XIP_KERNEL */
414 
415 static pmd_t *__init get_pmd_virt_early(phys_addr_t pa)
416 {
417 	/* Before MMU is enabled */
418 	return (pmd_t *)((uintptr_t)pa);
419 }
420 
421 static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa)
422 {
423 	clear_fixmap(FIX_PMD);
424 	return (pmd_t *)set_fixmap_offset(FIX_PMD, pa);
425 }
426 
427 static pmd_t *__init get_pmd_virt_late(phys_addr_t pa)
428 {
429 	return (pmd_t *) __va(pa);
430 }
431 
432 static phys_addr_t __init alloc_pmd_early(uintptr_t va)
433 {
434 	BUG_ON((va - kernel_map.virt_addr) >> PUD_SHIFT);
435 
436 	return (uintptr_t)early_pmd;
437 }
438 
439 static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va)
440 {
441 	return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
442 }
443 
444 static phys_addr_t __init alloc_pmd_late(uintptr_t va)
445 {
446 	unsigned long vaddr;
447 
448 	vaddr = __get_free_page(GFP_KERNEL);
449 	BUG_ON(!vaddr || !pgtable_pmd_page_ctor(virt_to_page(vaddr)));
450 
451 	return __pa(vaddr);
452 }
453 
454 static void __init create_pmd_mapping(pmd_t *pmdp,
455 				      uintptr_t va, phys_addr_t pa,
456 				      phys_addr_t sz, pgprot_t prot)
457 {
458 	pte_t *ptep;
459 	phys_addr_t pte_phys;
460 	uintptr_t pmd_idx = pmd_index(va);
461 
462 	if (sz == PMD_SIZE) {
463 		if (pmd_none(pmdp[pmd_idx]))
464 			pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot);
465 		return;
466 	}
467 
468 	if (pmd_none(pmdp[pmd_idx])) {
469 		pte_phys = pt_ops.alloc_pte(va);
470 		pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE);
471 		ptep = pt_ops.get_pte_virt(pte_phys);
472 		memset(ptep, 0, PAGE_SIZE);
473 	} else {
474 		pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx]));
475 		ptep = pt_ops.get_pte_virt(pte_phys);
476 	}
477 
478 	create_pte_mapping(ptep, va, pa, sz, prot);
479 }
480 
481 static pud_t *__init get_pud_virt_early(phys_addr_t pa)
482 {
483 	return (pud_t *)((uintptr_t)pa);
484 }
485 
486 static pud_t *__init get_pud_virt_fixmap(phys_addr_t pa)
487 {
488 	clear_fixmap(FIX_PUD);
489 	return (pud_t *)set_fixmap_offset(FIX_PUD, pa);
490 }
491 
492 static pud_t *__init get_pud_virt_late(phys_addr_t pa)
493 {
494 	return (pud_t *)__va(pa);
495 }
496 
497 static phys_addr_t __init alloc_pud_early(uintptr_t va)
498 {
499 	/* Only one PUD is available for early mapping */
500 	BUG_ON((va - kernel_map.virt_addr) >> PGDIR_SHIFT);
501 
502 	return (uintptr_t)early_pud;
503 }
504 
505 static phys_addr_t __init alloc_pud_fixmap(uintptr_t va)
506 {
507 	return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
508 }
509 
510 static phys_addr_t alloc_pud_late(uintptr_t va)
511 {
512 	unsigned long vaddr;
513 
514 	vaddr = __get_free_page(GFP_KERNEL);
515 	BUG_ON(!vaddr);
516 	return __pa(vaddr);
517 }
518 
519 static p4d_t *__init get_p4d_virt_early(phys_addr_t pa)
520 {
521 	return (p4d_t *)((uintptr_t)pa);
522 }
523 
524 static p4d_t *__init get_p4d_virt_fixmap(phys_addr_t pa)
525 {
526 	clear_fixmap(FIX_P4D);
527 	return (p4d_t *)set_fixmap_offset(FIX_P4D, pa);
528 }
529 
530 static p4d_t *__init get_p4d_virt_late(phys_addr_t pa)
531 {
532 	return (p4d_t *)__va(pa);
533 }
534 
535 static phys_addr_t __init alloc_p4d_early(uintptr_t va)
536 {
537 	/* Only one P4D is available for early mapping */
538 	BUG_ON((va - kernel_map.virt_addr) >> PGDIR_SHIFT);
539 
540 	return (uintptr_t)early_p4d;
541 }
542 
543 static phys_addr_t __init alloc_p4d_fixmap(uintptr_t va)
544 {
545 	return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
546 }
547 
548 static phys_addr_t alloc_p4d_late(uintptr_t va)
549 {
550 	unsigned long vaddr;
551 
552 	vaddr = __get_free_page(GFP_KERNEL);
553 	BUG_ON(!vaddr);
554 	return __pa(vaddr);
555 }
556 
557 static void __init create_pud_mapping(pud_t *pudp,
558 				      uintptr_t va, phys_addr_t pa,
559 				      phys_addr_t sz, pgprot_t prot)
560 {
561 	pmd_t *nextp;
562 	phys_addr_t next_phys;
563 	uintptr_t pud_index = pud_index(va);
564 
565 	if (sz == PUD_SIZE) {
566 		if (pud_val(pudp[pud_index]) == 0)
567 			pudp[pud_index] = pfn_pud(PFN_DOWN(pa), prot);
568 		return;
569 	}
570 
571 	if (pud_val(pudp[pud_index]) == 0) {
572 		next_phys = pt_ops.alloc_pmd(va);
573 		pudp[pud_index] = pfn_pud(PFN_DOWN(next_phys), PAGE_TABLE);
574 		nextp = pt_ops.get_pmd_virt(next_phys);
575 		memset(nextp, 0, PAGE_SIZE);
576 	} else {
577 		next_phys = PFN_PHYS(_pud_pfn(pudp[pud_index]));
578 		nextp = pt_ops.get_pmd_virt(next_phys);
579 	}
580 
581 	create_pmd_mapping(nextp, va, pa, sz, prot);
582 }
583 
584 static void __init create_p4d_mapping(p4d_t *p4dp,
585 				      uintptr_t va, phys_addr_t pa,
586 				      phys_addr_t sz, pgprot_t prot)
587 {
588 	pud_t *nextp;
589 	phys_addr_t next_phys;
590 	uintptr_t p4d_index = p4d_index(va);
591 
592 	if (sz == P4D_SIZE) {
593 		if (p4d_val(p4dp[p4d_index]) == 0)
594 			p4dp[p4d_index] = pfn_p4d(PFN_DOWN(pa), prot);
595 		return;
596 	}
597 
598 	if (p4d_val(p4dp[p4d_index]) == 0) {
599 		next_phys = pt_ops.alloc_pud(va);
600 		p4dp[p4d_index] = pfn_p4d(PFN_DOWN(next_phys), PAGE_TABLE);
601 		nextp = pt_ops.get_pud_virt(next_phys);
602 		memset(nextp, 0, PAGE_SIZE);
603 	} else {
604 		next_phys = PFN_PHYS(_p4d_pfn(p4dp[p4d_index]));
605 		nextp = pt_ops.get_pud_virt(next_phys);
606 	}
607 
608 	create_pud_mapping(nextp, va, pa, sz, prot);
609 }
610 
611 #define pgd_next_t		p4d_t
612 #define alloc_pgd_next(__va)	(pgtable_l5_enabled ?			\
613 		pt_ops.alloc_p4d(__va) : (pgtable_l4_enabled ?		\
614 		pt_ops.alloc_pud(__va) : pt_ops.alloc_pmd(__va)))
615 #define get_pgd_next_virt(__pa)	(pgtable_l5_enabled ?			\
616 		pt_ops.get_p4d_virt(__pa) : (pgd_next_t *)(pgtable_l4_enabled ?	\
617 		pt_ops.get_pud_virt(__pa) : (pud_t *)pt_ops.get_pmd_virt(__pa)))
618 #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot)	\
619 				(pgtable_l5_enabled ?			\
620 		create_p4d_mapping(__nextp, __va, __pa, __sz, __prot) : \
621 				(pgtable_l4_enabled ?			\
622 		create_pud_mapping((pud_t *)__nextp, __va, __pa, __sz, __prot) :	\
623 		create_pmd_mapping((pmd_t *)__nextp, __va, __pa, __sz, __prot)))
624 #define fixmap_pgd_next		(pgtable_l5_enabled ?			\
625 		(uintptr_t)fixmap_p4d : (pgtable_l4_enabled ?		\
626 		(uintptr_t)fixmap_pud : (uintptr_t)fixmap_pmd))
627 #define trampoline_pgd_next	(pgtable_l5_enabled ?			\
628 		(uintptr_t)trampoline_p4d : (pgtable_l4_enabled ?	\
629 		(uintptr_t)trampoline_pud : (uintptr_t)trampoline_pmd))
630 #define early_dtb_pgd_next	(pgtable_l5_enabled ?			\
631 		(uintptr_t)early_dtb_p4d : (pgtable_l4_enabled ?	\
632 		(uintptr_t)early_dtb_pud : (uintptr_t)early_dtb_pmd))
633 #else
634 #define pgd_next_t		pte_t
635 #define alloc_pgd_next(__va)	pt_ops.alloc_pte(__va)
636 #define get_pgd_next_virt(__pa)	pt_ops.get_pte_virt(__pa)
637 #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot)	\
638 	create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
639 #define fixmap_pgd_next		((uintptr_t)fixmap_pte)
640 #define early_dtb_pgd_next	((uintptr_t)early_dtb_pmd)
641 #define create_p4d_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
642 #define create_pud_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
643 #define create_pmd_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
644 #endif /* __PAGETABLE_PMD_FOLDED */
645 
646 void __init create_pgd_mapping(pgd_t *pgdp,
647 				      uintptr_t va, phys_addr_t pa,
648 				      phys_addr_t sz, pgprot_t prot)
649 {
650 	pgd_next_t *nextp;
651 	phys_addr_t next_phys;
652 	uintptr_t pgd_idx = pgd_index(va);
653 
654 	if (sz == PGDIR_SIZE) {
655 		if (pgd_val(pgdp[pgd_idx]) == 0)
656 			pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot);
657 		return;
658 	}
659 
660 	if (pgd_val(pgdp[pgd_idx]) == 0) {
661 		next_phys = alloc_pgd_next(va);
662 		pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE);
663 		nextp = get_pgd_next_virt(next_phys);
664 		memset(nextp, 0, PAGE_SIZE);
665 	} else {
666 		next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx]));
667 		nextp = get_pgd_next_virt(next_phys);
668 	}
669 
670 	create_pgd_next_mapping(nextp, va, pa, sz, prot);
671 }
672 
673 static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size)
674 {
675 	/* Upgrade to PMD_SIZE mappings whenever possible */
676 	if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1)))
677 		return PAGE_SIZE;
678 
679 	return PMD_SIZE;
680 }
681 
682 #ifdef CONFIG_XIP_KERNEL
683 #define phys_ram_base  (*(phys_addr_t *)XIP_FIXUP(&phys_ram_base))
684 extern char _xiprom[], _exiprom[], __data_loc;
685 
686 /* called from head.S with MMU off */
687 asmlinkage void __init __copy_data(void)
688 {
689 	void *from = (void *)(&__data_loc);
690 	void *to = (void *)CONFIG_PHYS_RAM_BASE;
691 	size_t sz = (size_t)((uintptr_t)(&_end) - (uintptr_t)(&_sdata));
692 
693 	memcpy(to, from, sz);
694 }
695 #endif
696 
697 #ifdef CONFIG_STRICT_KERNEL_RWX
698 static __init pgprot_t pgprot_from_va(uintptr_t va)
699 {
700 	if (is_va_kernel_text(va))
701 		return PAGE_KERNEL_READ_EXEC;
702 
703 	/*
704 	 * In 64-bit kernel, the kernel mapping is outside the linear mapping so
705 	 * we must protect its linear mapping alias from being executed and
706 	 * written.
707 	 * And rodata section is marked readonly in mark_rodata_ro.
708 	 */
709 	if (IS_ENABLED(CONFIG_64BIT) && is_va_kernel_lm_alias_text(va))
710 		return PAGE_KERNEL_READ;
711 
712 	return PAGE_KERNEL;
713 }
714 
715 void mark_rodata_ro(void)
716 {
717 	set_kernel_memory(__start_rodata, _data, set_memory_ro);
718 	if (IS_ENABLED(CONFIG_64BIT))
719 		set_kernel_memory(lm_alias(__start_rodata), lm_alias(_data),
720 				  set_memory_ro);
721 
722 	debug_checkwx();
723 }
724 #else
725 static __init pgprot_t pgprot_from_va(uintptr_t va)
726 {
727 	if (IS_ENABLED(CONFIG_64BIT) && !is_kernel_mapping(va))
728 		return PAGE_KERNEL;
729 
730 	return PAGE_KERNEL_EXEC;
731 }
732 #endif /* CONFIG_STRICT_KERNEL_RWX */
733 
734 #if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL)
735 static void __init disable_pgtable_l5(void)
736 {
737 	pgtable_l5_enabled = false;
738 	kernel_map.page_offset = PAGE_OFFSET_L4;
739 	satp_mode = SATP_MODE_48;
740 }
741 
742 static void __init disable_pgtable_l4(void)
743 {
744 	pgtable_l4_enabled = false;
745 	kernel_map.page_offset = PAGE_OFFSET_L3;
746 	satp_mode = SATP_MODE_39;
747 }
748 
749 /*
750  * There is a simple way to determine if 4-level is supported by the
751  * underlying hardware: establish 1:1 mapping in 4-level page table mode
752  * then read SATP to see if the configuration was taken into account
753  * meaning sv48 is supported.
754  */
755 static __init void set_satp_mode(void)
756 {
757 	u64 identity_satp, hw_satp;
758 	uintptr_t set_satp_mode_pmd = ((unsigned long)set_satp_mode) & PMD_MASK;
759 	bool check_l4 = false;
760 
761 	create_p4d_mapping(early_p4d,
762 			set_satp_mode_pmd, (uintptr_t)early_pud,
763 			P4D_SIZE, PAGE_TABLE);
764 	create_pud_mapping(early_pud,
765 			   set_satp_mode_pmd, (uintptr_t)early_pmd,
766 			   PUD_SIZE, PAGE_TABLE);
767 	/* Handle the case where set_satp_mode straddles 2 PMDs */
768 	create_pmd_mapping(early_pmd,
769 			   set_satp_mode_pmd, set_satp_mode_pmd,
770 			   PMD_SIZE, PAGE_KERNEL_EXEC);
771 	create_pmd_mapping(early_pmd,
772 			   set_satp_mode_pmd + PMD_SIZE,
773 			   set_satp_mode_pmd + PMD_SIZE,
774 			   PMD_SIZE, PAGE_KERNEL_EXEC);
775 retry:
776 	create_pgd_mapping(early_pg_dir,
777 			   set_satp_mode_pmd,
778 			   check_l4 ? (uintptr_t)early_pud : (uintptr_t)early_p4d,
779 			   PGDIR_SIZE, PAGE_TABLE);
780 
781 	identity_satp = PFN_DOWN((uintptr_t)&early_pg_dir) | satp_mode;
782 
783 	local_flush_tlb_all();
784 	csr_write(CSR_SATP, identity_satp);
785 	hw_satp = csr_swap(CSR_SATP, 0ULL);
786 	local_flush_tlb_all();
787 
788 	if (hw_satp != identity_satp) {
789 		if (!check_l4) {
790 			disable_pgtable_l5();
791 			check_l4 = true;
792 			memset(early_pg_dir, 0, PAGE_SIZE);
793 			goto retry;
794 		}
795 		disable_pgtable_l4();
796 	}
797 
798 	memset(early_pg_dir, 0, PAGE_SIZE);
799 	memset(early_p4d, 0, PAGE_SIZE);
800 	memset(early_pud, 0, PAGE_SIZE);
801 	memset(early_pmd, 0, PAGE_SIZE);
802 }
803 #endif
804 
805 /*
806  * setup_vm() is called from head.S with MMU-off.
807  *
808  * Following requirements should be honoured for setup_vm() to work
809  * correctly:
810  * 1) It should use PC-relative addressing for accessing kernel symbols.
811  *    To achieve this we always use GCC cmodel=medany.
812  * 2) The compiler instrumentation for FTRACE will not work for setup_vm()
813  *    so disable compiler instrumentation when FTRACE is enabled.
814  *
815  * Currently, the above requirements are honoured by using custom CFLAGS
816  * for init.o in mm/Makefile.
817  */
818 
819 #ifndef __riscv_cmodel_medany
820 #error "setup_vm() is called from head.S before relocate so it should not use absolute addressing."
821 #endif
822 
823 #ifdef CONFIG_XIP_KERNEL
824 static void __init create_kernel_page_table(pgd_t *pgdir,
825 					    __always_unused bool early)
826 {
827 	uintptr_t va, end_va;
828 
829 	/* Map the flash resident part */
830 	end_va = kernel_map.virt_addr + kernel_map.xiprom_sz;
831 	for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE)
832 		create_pgd_mapping(pgdir, va,
833 				   kernel_map.xiprom + (va - kernel_map.virt_addr),
834 				   PMD_SIZE, PAGE_KERNEL_EXEC);
835 
836 	/* Map the data in RAM */
837 	end_va = kernel_map.virt_addr + XIP_OFFSET + kernel_map.size;
838 	for (va = kernel_map.virt_addr + XIP_OFFSET; va < end_va; va += PMD_SIZE)
839 		create_pgd_mapping(pgdir, va,
840 				   kernel_map.phys_addr + (va - (kernel_map.virt_addr + XIP_OFFSET)),
841 				   PMD_SIZE, PAGE_KERNEL);
842 }
843 #else
844 static void __init create_kernel_page_table(pgd_t *pgdir, bool early)
845 {
846 	uintptr_t va, end_va;
847 
848 	end_va = kernel_map.virt_addr + kernel_map.size;
849 	for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE)
850 		create_pgd_mapping(pgdir, va,
851 				   kernel_map.phys_addr + (va - kernel_map.virt_addr),
852 				   PMD_SIZE,
853 				   early ?
854 					PAGE_KERNEL_EXEC : pgprot_from_va(va));
855 }
856 #endif
857 
858 /*
859  * Setup a 4MB mapping that encompasses the device tree: for 64-bit kernel,
860  * this means 2 PMD entries whereas for 32-bit kernel, this is only 1 PGDIR
861  * entry.
862  */
863 static void __init create_fdt_early_page_table(pgd_t *pgdir, uintptr_t dtb_pa)
864 {
865 #ifndef CONFIG_BUILTIN_DTB
866 	uintptr_t pa = dtb_pa & ~(PMD_SIZE - 1);
867 
868 	create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
869 			   IS_ENABLED(CONFIG_64BIT) ? early_dtb_pgd_next : pa,
870 			   PGDIR_SIZE,
871 			   IS_ENABLED(CONFIG_64BIT) ? PAGE_TABLE : PAGE_KERNEL);
872 
873 	if (pgtable_l5_enabled)
874 		create_p4d_mapping(early_dtb_p4d, DTB_EARLY_BASE_VA,
875 				   (uintptr_t)early_dtb_pud, P4D_SIZE, PAGE_TABLE);
876 
877 	if (pgtable_l4_enabled)
878 		create_pud_mapping(early_dtb_pud, DTB_EARLY_BASE_VA,
879 				   (uintptr_t)early_dtb_pmd, PUD_SIZE, PAGE_TABLE);
880 
881 	if (IS_ENABLED(CONFIG_64BIT)) {
882 		create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA,
883 				   pa, PMD_SIZE, PAGE_KERNEL);
884 		create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE,
885 				   pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL);
886 	}
887 
888 	dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1));
889 #else
890 	/*
891 	 * For 64-bit kernel, __va can't be used since it would return a linear
892 	 * mapping address whereas dtb_early_va will be used before
893 	 * setup_vm_final installs the linear mapping. For 32-bit kernel, as the
894 	 * kernel is mapped in the linear mapping, that makes no difference.
895 	 */
896 	dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa));
897 #endif
898 
899 	dtb_early_pa = dtb_pa;
900 }
901 
902 /*
903  * MMU is not enabled, the page tables are allocated directly using
904  * early_pmd/pud/p4d and the address returned is the physical one.
905  */
906 static void __init pt_ops_set_early(void)
907 {
908 	pt_ops.alloc_pte = alloc_pte_early;
909 	pt_ops.get_pte_virt = get_pte_virt_early;
910 #ifndef __PAGETABLE_PMD_FOLDED
911 	pt_ops.alloc_pmd = alloc_pmd_early;
912 	pt_ops.get_pmd_virt = get_pmd_virt_early;
913 	pt_ops.alloc_pud = alloc_pud_early;
914 	pt_ops.get_pud_virt = get_pud_virt_early;
915 	pt_ops.alloc_p4d = alloc_p4d_early;
916 	pt_ops.get_p4d_virt = get_p4d_virt_early;
917 #endif
918 }
919 
920 /*
921  * MMU is enabled but page table setup is not complete yet.
922  * fixmap page table alloc functions must be used as a means to temporarily
923  * map the allocated physical pages since the linear mapping does not exist yet.
924  *
925  * Note that this is called with MMU disabled, hence kernel_mapping_pa_to_va,
926  * but it will be used as described above.
927  */
928 static void __init pt_ops_set_fixmap(void)
929 {
930 	pt_ops.alloc_pte = kernel_mapping_pa_to_va((uintptr_t)alloc_pte_fixmap);
931 	pt_ops.get_pte_virt = kernel_mapping_pa_to_va((uintptr_t)get_pte_virt_fixmap);
932 #ifndef __PAGETABLE_PMD_FOLDED
933 	pt_ops.alloc_pmd = kernel_mapping_pa_to_va((uintptr_t)alloc_pmd_fixmap);
934 	pt_ops.get_pmd_virt = kernel_mapping_pa_to_va((uintptr_t)get_pmd_virt_fixmap);
935 	pt_ops.alloc_pud = kernel_mapping_pa_to_va((uintptr_t)alloc_pud_fixmap);
936 	pt_ops.get_pud_virt = kernel_mapping_pa_to_va((uintptr_t)get_pud_virt_fixmap);
937 	pt_ops.alloc_p4d = kernel_mapping_pa_to_va((uintptr_t)alloc_p4d_fixmap);
938 	pt_ops.get_p4d_virt = kernel_mapping_pa_to_va((uintptr_t)get_p4d_virt_fixmap);
939 #endif
940 }
941 
942 /*
943  * MMU is enabled and page table setup is complete, so from now, we can use
944  * generic page allocation functions to setup page table.
945  */
946 static void __init pt_ops_set_late(void)
947 {
948 	pt_ops.alloc_pte = alloc_pte_late;
949 	pt_ops.get_pte_virt = get_pte_virt_late;
950 #ifndef __PAGETABLE_PMD_FOLDED
951 	pt_ops.alloc_pmd = alloc_pmd_late;
952 	pt_ops.get_pmd_virt = get_pmd_virt_late;
953 	pt_ops.alloc_pud = alloc_pud_late;
954 	pt_ops.get_pud_virt = get_pud_virt_late;
955 	pt_ops.alloc_p4d = alloc_p4d_late;
956 	pt_ops.get_p4d_virt = get_p4d_virt_late;
957 #endif
958 }
959 
960 asmlinkage void __init setup_vm(uintptr_t dtb_pa)
961 {
962 	pmd_t __maybe_unused fix_bmap_spmd, fix_bmap_epmd;
963 
964 	kernel_map.virt_addr = KERNEL_LINK_ADDR;
965 	kernel_map.page_offset = _AC(CONFIG_PAGE_OFFSET, UL);
966 
967 #ifdef CONFIG_XIP_KERNEL
968 	kernel_map.xiprom = (uintptr_t)CONFIG_XIP_PHYS_ADDR;
969 	kernel_map.xiprom_sz = (uintptr_t)(&_exiprom) - (uintptr_t)(&_xiprom);
970 
971 	phys_ram_base = CONFIG_PHYS_RAM_BASE;
972 	kernel_map.phys_addr = (uintptr_t)CONFIG_PHYS_RAM_BASE;
973 	kernel_map.size = (uintptr_t)(&_end) - (uintptr_t)(&_sdata);
974 
975 	kernel_map.va_kernel_xip_pa_offset = kernel_map.virt_addr - kernel_map.xiprom;
976 #else
977 	kernel_map.phys_addr = (uintptr_t)(&_start);
978 	kernel_map.size = (uintptr_t)(&_end) - kernel_map.phys_addr;
979 #endif
980 
981 #if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL)
982 	set_satp_mode();
983 #endif
984 
985 	kernel_map.va_pa_offset = PAGE_OFFSET - kernel_map.phys_addr;
986 	kernel_map.va_kernel_pa_offset = kernel_map.virt_addr - kernel_map.phys_addr;
987 
988 	riscv_pfn_base = PFN_DOWN(kernel_map.phys_addr);
989 
990 	/*
991 	 * The default maximal physical memory size is KERN_VIRT_SIZE for 32-bit
992 	 * kernel, whereas for 64-bit kernel, the end of the virtual address
993 	 * space is occupied by the modules/BPF/kernel mappings which reduces
994 	 * the available size of the linear mapping.
995 	 */
996 	memory_limit = KERN_VIRT_SIZE - (IS_ENABLED(CONFIG_64BIT) ? SZ_4G : 0);
997 
998 	/* Sanity check alignment and size */
999 	BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0);
1000 	BUG_ON((kernel_map.phys_addr % PMD_SIZE) != 0);
1001 
1002 #ifdef CONFIG_64BIT
1003 	/*
1004 	 * The last 4K bytes of the addressable memory can not be mapped because
1005 	 * of IS_ERR_VALUE macro.
1006 	 */
1007 	BUG_ON((kernel_map.virt_addr + kernel_map.size) > ADDRESS_SPACE_END - SZ_4K);
1008 #endif
1009 
1010 	apply_early_boot_alternatives();
1011 	pt_ops_set_early();
1012 
1013 	/* Setup early PGD for fixmap */
1014 	create_pgd_mapping(early_pg_dir, FIXADDR_START,
1015 			   fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE);
1016 
1017 #ifndef __PAGETABLE_PMD_FOLDED
1018 	/* Setup fixmap P4D and PUD */
1019 	if (pgtable_l5_enabled)
1020 		create_p4d_mapping(fixmap_p4d, FIXADDR_START,
1021 				   (uintptr_t)fixmap_pud, P4D_SIZE, PAGE_TABLE);
1022 	/* Setup fixmap PUD and PMD */
1023 	if (pgtable_l4_enabled)
1024 		create_pud_mapping(fixmap_pud, FIXADDR_START,
1025 				   (uintptr_t)fixmap_pmd, PUD_SIZE, PAGE_TABLE);
1026 	create_pmd_mapping(fixmap_pmd, FIXADDR_START,
1027 			   (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE);
1028 	/* Setup trampoline PGD and PMD */
1029 	create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr,
1030 			   trampoline_pgd_next, PGDIR_SIZE, PAGE_TABLE);
1031 	if (pgtable_l5_enabled)
1032 		create_p4d_mapping(trampoline_p4d, kernel_map.virt_addr,
1033 				   (uintptr_t)trampoline_pud, P4D_SIZE, PAGE_TABLE);
1034 	if (pgtable_l4_enabled)
1035 		create_pud_mapping(trampoline_pud, kernel_map.virt_addr,
1036 				   (uintptr_t)trampoline_pmd, PUD_SIZE, PAGE_TABLE);
1037 #ifdef CONFIG_XIP_KERNEL
1038 	create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr,
1039 			   kernel_map.xiprom, PMD_SIZE, PAGE_KERNEL_EXEC);
1040 #else
1041 	create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr,
1042 			   kernel_map.phys_addr, PMD_SIZE, PAGE_KERNEL_EXEC);
1043 #endif
1044 #else
1045 	/* Setup trampoline PGD */
1046 	create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr,
1047 			   kernel_map.phys_addr, PGDIR_SIZE, PAGE_KERNEL_EXEC);
1048 #endif
1049 
1050 	/*
1051 	 * Setup early PGD covering entire kernel which will allow
1052 	 * us to reach paging_init(). We map all memory banks later
1053 	 * in setup_vm_final() below.
1054 	 */
1055 	create_kernel_page_table(early_pg_dir, true);
1056 
1057 	/* Setup early mapping for FDT early scan */
1058 	create_fdt_early_page_table(early_pg_dir, dtb_pa);
1059 
1060 	/*
1061 	 * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap
1062 	 * range can not span multiple pmds.
1063 	 */
1064 	BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
1065 		     != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
1066 
1067 #ifndef __PAGETABLE_PMD_FOLDED
1068 	/*
1069 	 * Early ioremap fixmap is already created as it lies within first 2MB
1070 	 * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END
1071 	 * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn
1072 	 * the user if not.
1073 	 */
1074 	fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))];
1075 	fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))];
1076 	if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) {
1077 		WARN_ON(1);
1078 		pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n",
1079 			pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd));
1080 		pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
1081 			fix_to_virt(FIX_BTMAP_BEGIN));
1082 		pr_warn("fix_to_virt(FIX_BTMAP_END):   %08lx\n",
1083 			fix_to_virt(FIX_BTMAP_END));
1084 
1085 		pr_warn("FIX_BTMAP_END:       %d\n", FIX_BTMAP_END);
1086 		pr_warn("FIX_BTMAP_BEGIN:     %d\n", FIX_BTMAP_BEGIN);
1087 	}
1088 #endif
1089 
1090 	pt_ops_set_fixmap();
1091 }
1092 
1093 static void __init setup_vm_final(void)
1094 {
1095 	uintptr_t va, map_size;
1096 	phys_addr_t pa, start, end;
1097 	u64 i;
1098 
1099 	/* Setup swapper PGD for fixmap */
1100 	create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
1101 			   __pa_symbol(fixmap_pgd_next),
1102 			   PGDIR_SIZE, PAGE_TABLE);
1103 
1104 	/* Map all memory banks in the linear mapping */
1105 	for_each_mem_range(i, &start, &end) {
1106 		if (start >= end)
1107 			break;
1108 		if (start <= __pa(PAGE_OFFSET) &&
1109 		    __pa(PAGE_OFFSET) < end)
1110 			start = __pa(PAGE_OFFSET);
1111 		if (end >= __pa(PAGE_OFFSET) + memory_limit)
1112 			end = __pa(PAGE_OFFSET) + memory_limit;
1113 
1114 		map_size = best_map_size(start, end - start);
1115 		for (pa = start; pa < end; pa += map_size) {
1116 			va = (uintptr_t)__va(pa);
1117 
1118 			create_pgd_mapping(swapper_pg_dir, va, pa, map_size,
1119 					   pgprot_from_va(va));
1120 		}
1121 	}
1122 
1123 	/* Map the kernel */
1124 	if (IS_ENABLED(CONFIG_64BIT))
1125 		create_kernel_page_table(swapper_pg_dir, false);
1126 
1127 #ifdef CONFIG_KASAN
1128 	kasan_swapper_init();
1129 #endif
1130 
1131 	/* Clear fixmap PTE and PMD mappings */
1132 	clear_fixmap(FIX_PTE);
1133 	clear_fixmap(FIX_PMD);
1134 	clear_fixmap(FIX_PUD);
1135 	clear_fixmap(FIX_P4D);
1136 
1137 	/* Move to swapper page table */
1138 	csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | satp_mode);
1139 	local_flush_tlb_all();
1140 
1141 	pt_ops_set_late();
1142 }
1143 #else
1144 asmlinkage void __init setup_vm(uintptr_t dtb_pa)
1145 {
1146 	dtb_early_va = (void *)dtb_pa;
1147 	dtb_early_pa = dtb_pa;
1148 }
1149 
1150 static inline void setup_vm_final(void)
1151 {
1152 }
1153 #endif /* CONFIG_MMU */
1154 
1155 /*
1156  * reserve_crashkernel() - reserves memory for crash kernel
1157  *
1158  * This function reserves memory area given in "crashkernel=" kernel command
1159  * line parameter. The memory reserved is used by dump capture kernel when
1160  * primary kernel is crashing.
1161  */
1162 static void __init reserve_crashkernel(void)
1163 {
1164 	unsigned long long crash_base = 0;
1165 	unsigned long long crash_size = 0;
1166 	unsigned long search_start = memblock_start_of_DRAM();
1167 	unsigned long search_end = memblock_end_of_DRAM();
1168 
1169 	int ret = 0;
1170 
1171 	if (!IS_ENABLED(CONFIG_KEXEC_CORE))
1172 		return;
1173 	/*
1174 	 * Don't reserve a region for a crash kernel on a crash kernel
1175 	 * since it doesn't make much sense and we have limited memory
1176 	 * resources.
1177 	 */
1178 	if (is_kdump_kernel()) {
1179 		pr_info("crashkernel: ignoring reservation request\n");
1180 		return;
1181 	}
1182 
1183 	ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),
1184 				&crash_size, &crash_base);
1185 	if (ret || !crash_size)
1186 		return;
1187 
1188 	crash_size = PAGE_ALIGN(crash_size);
1189 
1190 	if (crash_base) {
1191 		search_start = crash_base;
1192 		search_end = crash_base + crash_size;
1193 	}
1194 
1195 	/*
1196 	 * Current riscv boot protocol requires 2MB alignment for
1197 	 * RV64 and 4MB alignment for RV32 (hugepage size)
1198 	 *
1199 	 * Try to alloc from 32bit addressible physical memory so that
1200 	 * swiotlb can work on the crash kernel.
1201 	 */
1202 	crash_base = memblock_phys_alloc_range(crash_size, PMD_SIZE,
1203 					       search_start,
1204 					       min(search_end, (unsigned long) SZ_4G));
1205 	if (crash_base == 0) {
1206 		/* Try again without restricting region to 32bit addressible memory */
1207 		crash_base = memblock_phys_alloc_range(crash_size, PMD_SIZE,
1208 						search_start, search_end);
1209 		if (crash_base == 0) {
1210 			pr_warn("crashkernel: couldn't allocate %lldKB\n",
1211 				crash_size >> 10);
1212 			return;
1213 		}
1214 	}
1215 
1216 	pr_info("crashkernel: reserved 0x%016llx - 0x%016llx (%lld MB)\n",
1217 		crash_base, crash_base + crash_size, crash_size >> 20);
1218 
1219 	crashk_res.start = crash_base;
1220 	crashk_res.end = crash_base + crash_size - 1;
1221 }
1222 
1223 void __init paging_init(void)
1224 {
1225 	setup_bootmem();
1226 	setup_vm_final();
1227 }
1228 
1229 void __init misc_mem_init(void)
1230 {
1231 	early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
1232 	arch_numa_init();
1233 	sparse_init();
1234 	zone_sizes_init();
1235 	reserve_crashkernel();
1236 	memblock_dump_all();
1237 }
1238 
1239 #ifdef CONFIG_SPARSEMEM_VMEMMAP
1240 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
1241 			       struct vmem_altmap *altmap)
1242 {
1243 	return vmemmap_populate_basepages(start, end, node, NULL);
1244 }
1245 #endif
1246