xref: /linux/arch/riscv/mm/init.c (revision 320fefa9e2edc67011e235ea1d50f0d00ddfe004)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2012 Regents of the University of California
4  * Copyright (C) 2019 Western Digital Corporation or its affiliates.
5  * Copyright (C) 2020 FORTH-ICS/CARV
6  *  Nick Kossifidis <mick@ics.forth.gr>
7  */
8 
9 #include <linux/init.h>
10 #include <linux/mm.h>
11 #include <linux/memblock.h>
12 #include <linux/initrd.h>
13 #include <linux/swap.h>
14 #include <linux/swiotlb.h>
15 #include <linux/sizes.h>
16 #include <linux/of_fdt.h>
17 #include <linux/of_reserved_mem.h>
18 #include <linux/libfdt.h>
19 #include <linux/set_memory.h>
20 #include <linux/dma-map-ops.h>
21 #include <linux/crash_dump.h>
22 #include <linux/hugetlb.h>
23 
24 #include <asm/fixmap.h>
25 #include <asm/tlbflush.h>
26 #include <asm/sections.h>
27 #include <asm/soc.h>
28 #include <asm/io.h>
29 #include <asm/ptdump.h>
30 #include <asm/numa.h>
31 
32 #include "../kernel/head.h"
33 
34 struct kernel_mapping kernel_map __ro_after_init;
35 EXPORT_SYMBOL(kernel_map);
36 #ifdef CONFIG_XIP_KERNEL
37 #define kernel_map	(*(struct kernel_mapping *)XIP_FIXUP(&kernel_map))
38 #endif
39 
40 #ifdef CONFIG_64BIT
41 u64 satp_mode __ro_after_init = !IS_ENABLED(CONFIG_XIP_KERNEL) ? SATP_MODE_57 : SATP_MODE_39;
42 #else
43 u64 satp_mode __ro_after_init = SATP_MODE_32;
44 #endif
45 EXPORT_SYMBOL(satp_mode);
46 
47 bool pgtable_l4_enabled = IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_XIP_KERNEL);
48 bool pgtable_l5_enabled = IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_XIP_KERNEL);
49 EXPORT_SYMBOL(pgtable_l4_enabled);
50 EXPORT_SYMBOL(pgtable_l5_enabled);
51 
52 phys_addr_t phys_ram_base __ro_after_init;
53 EXPORT_SYMBOL(phys_ram_base);
54 
55 unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
56 							__page_aligned_bss;
57 EXPORT_SYMBOL(empty_zero_page);
58 
59 extern char _start[];
60 #define DTB_EARLY_BASE_VA      PGDIR_SIZE
61 void *_dtb_early_va __initdata;
62 uintptr_t _dtb_early_pa __initdata;
63 
64 static phys_addr_t dma32_phys_limit __initdata;
65 
66 static void __init zone_sizes_init(void)
67 {
68 	unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, };
69 
70 #ifdef CONFIG_ZONE_DMA32
71 	max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit);
72 #endif
73 	max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
74 
75 	free_area_init(max_zone_pfns);
76 }
77 
78 #if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM)
79 
80 #define LOG2_SZ_1K  ilog2(SZ_1K)
81 #define LOG2_SZ_1M  ilog2(SZ_1M)
82 #define LOG2_SZ_1G  ilog2(SZ_1G)
83 #define LOG2_SZ_1T  ilog2(SZ_1T)
84 
85 static inline void print_mlk(char *name, unsigned long b, unsigned long t)
86 {
87 	pr_notice("%12s : 0x%08lx - 0x%08lx   (%4ld kB)\n", name, b, t,
88 		  (((t) - (b)) >> LOG2_SZ_1K));
89 }
90 
91 static inline void print_mlm(char *name, unsigned long b, unsigned long t)
92 {
93 	pr_notice("%12s : 0x%08lx - 0x%08lx   (%4ld MB)\n", name, b, t,
94 		  (((t) - (b)) >> LOG2_SZ_1M));
95 }
96 
97 static inline void print_mlg(char *name, unsigned long b, unsigned long t)
98 {
99 	pr_notice("%12s : 0x%08lx - 0x%08lx   (%4ld GB)\n", name, b, t,
100 		   (((t) - (b)) >> LOG2_SZ_1G));
101 }
102 
103 #ifdef CONFIG_64BIT
104 static inline void print_mlt(char *name, unsigned long b, unsigned long t)
105 {
106 	pr_notice("%12s : 0x%08lx - 0x%08lx   (%4ld TB)\n", name, b, t,
107 		   (((t) - (b)) >> LOG2_SZ_1T));
108 }
109 #else
110 #define print_mlt(n, b, t) do {} while (0)
111 #endif
112 
113 static inline void print_ml(char *name, unsigned long b, unsigned long t)
114 {
115 	unsigned long diff = t - b;
116 
117 	if (IS_ENABLED(CONFIG_64BIT) && (diff >> LOG2_SZ_1T) >= 10)
118 		print_mlt(name, b, t);
119 	else if ((diff >> LOG2_SZ_1G) >= 10)
120 		print_mlg(name, b, t);
121 	else if ((diff >> LOG2_SZ_1M) >= 10)
122 		print_mlm(name, b, t);
123 	else
124 		print_mlk(name, b, t);
125 }
126 
127 static void __init print_vm_layout(void)
128 {
129 	pr_notice("Virtual kernel memory layout:\n");
130 	print_ml("fixmap", (unsigned long)FIXADDR_START,
131 		(unsigned long)FIXADDR_TOP);
132 	print_ml("pci io", (unsigned long)PCI_IO_START,
133 		(unsigned long)PCI_IO_END);
134 	print_ml("vmemmap", (unsigned long)VMEMMAP_START,
135 		(unsigned long)VMEMMAP_END);
136 	print_ml("vmalloc", (unsigned long)VMALLOC_START,
137 		(unsigned long)VMALLOC_END);
138 #ifdef CONFIG_64BIT
139 	print_ml("modules", (unsigned long)MODULES_VADDR,
140 		(unsigned long)MODULES_END);
141 #endif
142 	print_ml("lowmem", (unsigned long)PAGE_OFFSET,
143 		(unsigned long)high_memory);
144 	if (IS_ENABLED(CONFIG_64BIT)) {
145 #ifdef CONFIG_KASAN
146 		print_ml("kasan", KASAN_SHADOW_START, KASAN_SHADOW_END);
147 #endif
148 
149 		print_ml("kernel", (unsigned long)KERNEL_LINK_ADDR,
150 			 (unsigned long)ADDRESS_SPACE_END);
151 	}
152 }
153 #else
154 static void print_vm_layout(void) { }
155 #endif /* CONFIG_DEBUG_VM */
156 
157 void __init mem_init(void)
158 {
159 #ifdef CONFIG_FLATMEM
160 	BUG_ON(!mem_map);
161 #endif /* CONFIG_FLATMEM */
162 
163 	swiotlb_init(max_pfn > PFN_DOWN(dma32_phys_limit), SWIOTLB_VERBOSE);
164 	memblock_free_all();
165 
166 	print_vm_layout();
167 }
168 
169 /* Limit the memory size via mem. */
170 static phys_addr_t memory_limit;
171 
172 static int __init early_mem(char *p)
173 {
174 	u64 size;
175 
176 	if (!p)
177 		return 1;
178 
179 	size = memparse(p, &p) & PAGE_MASK;
180 	memory_limit = min_t(u64, size, memory_limit);
181 
182 	pr_notice("Memory limited to %lldMB\n", (u64)memory_limit >> 20);
183 
184 	return 0;
185 }
186 early_param("mem", early_mem);
187 
188 static void __init setup_bootmem(void)
189 {
190 	phys_addr_t vmlinux_end = __pa_symbol(&_end);
191 	phys_addr_t max_mapped_addr;
192 	phys_addr_t phys_ram_end, vmlinux_start;
193 
194 	if (IS_ENABLED(CONFIG_XIP_KERNEL))
195 		vmlinux_start = __pa_symbol(&_sdata);
196 	else
197 		vmlinux_start = __pa_symbol(&_start);
198 
199 	memblock_enforce_memory_limit(memory_limit);
200 
201 	/*
202 	 * Make sure we align the reservation on PMD_SIZE since we will
203 	 * map the kernel in the linear mapping as read-only: we do not want
204 	 * any allocation to happen between _end and the next pmd aligned page.
205 	 */
206 	if (IS_ENABLED(CONFIG_64BIT) && IS_ENABLED(CONFIG_STRICT_KERNEL_RWX))
207 		vmlinux_end = (vmlinux_end + PMD_SIZE - 1) & PMD_MASK;
208 	/*
209 	 * Reserve from the start of the kernel to the end of the kernel
210 	 */
211 	memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
212 
213 	phys_ram_end = memblock_end_of_DRAM();
214 	if (!IS_ENABLED(CONFIG_XIP_KERNEL))
215 		phys_ram_base = memblock_start_of_DRAM();
216 	/*
217 	 * memblock allocator is not aware of the fact that last 4K bytes of
218 	 * the addressable memory can not be mapped because of IS_ERR_VALUE
219 	 * macro. Make sure that last 4k bytes are not usable by memblock
220 	 * if end of dram is equal to maximum addressable memory.  For 64-bit
221 	 * kernel, this problem can't happen here as the end of the virtual
222 	 * address space is occupied by the kernel mapping then this check must
223 	 * be done as soon as the kernel mapping base address is determined.
224 	 */
225 	if (!IS_ENABLED(CONFIG_64BIT)) {
226 		max_mapped_addr = __pa(~(ulong)0);
227 		if (max_mapped_addr == (phys_ram_end - 1))
228 			memblock_set_current_limit(max_mapped_addr - 4096);
229 	}
230 
231 	min_low_pfn = PFN_UP(phys_ram_base);
232 	max_low_pfn = max_pfn = PFN_DOWN(phys_ram_end);
233 	high_memory = (void *)(__va(PFN_PHYS(max_low_pfn)));
234 
235 	dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn));
236 	set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);
237 
238 	reserve_initrd_mem();
239 	/*
240 	 * If DTB is built in, no need to reserve its memblock.
241 	 * Otherwise, do reserve it but avoid using
242 	 * early_init_fdt_reserve_self() since __pa() does
243 	 * not work for DTB pointers that are fixmap addresses
244 	 */
245 	if (!IS_ENABLED(CONFIG_BUILTIN_DTB)) {
246 		/*
247 		 * In case the DTB is not located in a memory region we won't
248 		 * be able to locate it later on via the linear mapping and
249 		 * get a segfault when accessing it via __va(dtb_early_pa).
250 		 * To avoid this situation copy DTB to a memory region.
251 		 * Note that memblock_phys_alloc will also reserve DTB region.
252 		 */
253 		if (!memblock_is_memory(dtb_early_pa)) {
254 			size_t fdt_size = fdt_totalsize(dtb_early_va);
255 			phys_addr_t new_dtb_early_pa = memblock_phys_alloc(fdt_size, PAGE_SIZE);
256 			void *new_dtb_early_va = early_memremap(new_dtb_early_pa, fdt_size);
257 
258 			memcpy(new_dtb_early_va, dtb_early_va, fdt_size);
259 			early_memunmap(new_dtb_early_va, fdt_size);
260 			_dtb_early_pa = new_dtb_early_pa;
261 		} else
262 			memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
263 	}
264 
265 	dma_contiguous_reserve(dma32_phys_limit);
266 	if (IS_ENABLED(CONFIG_64BIT))
267 		hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT);
268 	memblock_allow_resize();
269 }
270 
271 #ifdef CONFIG_MMU
272 struct pt_alloc_ops pt_ops __initdata;
273 
274 unsigned long riscv_pfn_base __ro_after_init;
275 EXPORT_SYMBOL(riscv_pfn_base);
276 
277 pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
278 pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
279 static pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
280 
281 pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
282 static p4d_t __maybe_unused early_dtb_p4d[PTRS_PER_P4D] __initdata __aligned(PAGE_SIZE);
283 static pud_t __maybe_unused early_dtb_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE);
284 static pmd_t __maybe_unused early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
285 
286 #ifdef CONFIG_XIP_KERNEL
287 #define pt_ops			(*(struct pt_alloc_ops *)XIP_FIXUP(&pt_ops))
288 #define riscv_pfn_base         (*(unsigned long  *)XIP_FIXUP(&riscv_pfn_base))
289 #define trampoline_pg_dir      ((pgd_t *)XIP_FIXUP(trampoline_pg_dir))
290 #define fixmap_pte             ((pte_t *)XIP_FIXUP(fixmap_pte))
291 #define early_pg_dir           ((pgd_t *)XIP_FIXUP(early_pg_dir))
292 #endif /* CONFIG_XIP_KERNEL */
293 
294 static const pgprot_t protection_map[16] = {
295 	[VM_NONE]					= PAGE_NONE,
296 	[VM_READ]					= PAGE_READ,
297 	[VM_WRITE]					= PAGE_COPY,
298 	[VM_WRITE | VM_READ]				= PAGE_COPY,
299 	[VM_EXEC]					= PAGE_EXEC,
300 	[VM_EXEC | VM_READ]				= PAGE_READ_EXEC,
301 	[VM_EXEC | VM_WRITE]				= PAGE_COPY_EXEC,
302 	[VM_EXEC | VM_WRITE | VM_READ]			= PAGE_COPY_READ_EXEC,
303 	[VM_SHARED]					= PAGE_NONE,
304 	[VM_SHARED | VM_READ]				= PAGE_READ,
305 	[VM_SHARED | VM_WRITE]				= PAGE_SHARED,
306 	[VM_SHARED | VM_WRITE | VM_READ]		= PAGE_SHARED,
307 	[VM_SHARED | VM_EXEC]				= PAGE_EXEC,
308 	[VM_SHARED | VM_EXEC | VM_READ]			= PAGE_READ_EXEC,
309 	[VM_SHARED | VM_EXEC | VM_WRITE]		= PAGE_SHARED_EXEC,
310 	[VM_SHARED | VM_EXEC | VM_WRITE | VM_READ]	= PAGE_SHARED_EXEC
311 };
312 DECLARE_VM_GET_PAGE_PROT
313 
314 void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
315 {
316 	unsigned long addr = __fix_to_virt(idx);
317 	pte_t *ptep;
318 
319 	BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
320 
321 	ptep = &fixmap_pte[pte_index(addr)];
322 
323 	if (pgprot_val(prot))
324 		set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
325 	else
326 		pte_clear(&init_mm, addr, ptep);
327 	local_flush_tlb_page(addr);
328 }
329 
330 static inline pte_t *__init get_pte_virt_early(phys_addr_t pa)
331 {
332 	return (pte_t *)((uintptr_t)pa);
333 }
334 
335 static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa)
336 {
337 	clear_fixmap(FIX_PTE);
338 	return (pte_t *)set_fixmap_offset(FIX_PTE, pa);
339 }
340 
341 static inline pte_t *__init get_pte_virt_late(phys_addr_t pa)
342 {
343 	return (pte_t *) __va(pa);
344 }
345 
346 static inline phys_addr_t __init alloc_pte_early(uintptr_t va)
347 {
348 	/*
349 	 * We only create PMD or PGD early mappings so we
350 	 * should never reach here with MMU disabled.
351 	 */
352 	BUG();
353 }
354 
355 static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va)
356 {
357 	return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
358 }
359 
360 static phys_addr_t __init alloc_pte_late(uintptr_t va)
361 {
362 	unsigned long vaddr;
363 
364 	vaddr = __get_free_page(GFP_KERNEL);
365 	BUG_ON(!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr)));
366 
367 	return __pa(vaddr);
368 }
369 
370 static void __init create_pte_mapping(pte_t *ptep,
371 				      uintptr_t va, phys_addr_t pa,
372 				      phys_addr_t sz, pgprot_t prot)
373 {
374 	uintptr_t pte_idx = pte_index(va);
375 
376 	BUG_ON(sz != PAGE_SIZE);
377 
378 	if (pte_none(ptep[pte_idx]))
379 		ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot);
380 }
381 
382 #ifndef __PAGETABLE_PMD_FOLDED
383 
384 static pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss;
385 static pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss;
386 static pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
387 
388 #ifdef CONFIG_XIP_KERNEL
389 #define trampoline_pmd ((pmd_t *)XIP_FIXUP(trampoline_pmd))
390 #define fixmap_pmd     ((pmd_t *)XIP_FIXUP(fixmap_pmd))
391 #define early_pmd      ((pmd_t *)XIP_FIXUP(early_pmd))
392 #endif /* CONFIG_XIP_KERNEL */
393 
394 static p4d_t trampoline_p4d[PTRS_PER_P4D] __page_aligned_bss;
395 static p4d_t fixmap_p4d[PTRS_PER_P4D] __page_aligned_bss;
396 static p4d_t early_p4d[PTRS_PER_P4D] __initdata __aligned(PAGE_SIZE);
397 
398 #ifdef CONFIG_XIP_KERNEL
399 #define trampoline_p4d ((p4d_t *)XIP_FIXUP(trampoline_p4d))
400 #define fixmap_p4d     ((p4d_t *)XIP_FIXUP(fixmap_p4d))
401 #define early_p4d      ((p4d_t *)XIP_FIXUP(early_p4d))
402 #endif /* CONFIG_XIP_KERNEL */
403 
404 static pud_t trampoline_pud[PTRS_PER_PUD] __page_aligned_bss;
405 static pud_t fixmap_pud[PTRS_PER_PUD] __page_aligned_bss;
406 static pud_t early_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE);
407 
408 #ifdef CONFIG_XIP_KERNEL
409 #define trampoline_pud ((pud_t *)XIP_FIXUP(trampoline_pud))
410 #define fixmap_pud     ((pud_t *)XIP_FIXUP(fixmap_pud))
411 #define early_pud      ((pud_t *)XIP_FIXUP(early_pud))
412 #endif /* CONFIG_XIP_KERNEL */
413 
414 static pmd_t *__init get_pmd_virt_early(phys_addr_t pa)
415 {
416 	/* Before MMU is enabled */
417 	return (pmd_t *)((uintptr_t)pa);
418 }
419 
420 static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa)
421 {
422 	clear_fixmap(FIX_PMD);
423 	return (pmd_t *)set_fixmap_offset(FIX_PMD, pa);
424 }
425 
426 static pmd_t *__init get_pmd_virt_late(phys_addr_t pa)
427 {
428 	return (pmd_t *) __va(pa);
429 }
430 
431 static phys_addr_t __init alloc_pmd_early(uintptr_t va)
432 {
433 	BUG_ON((va - kernel_map.virt_addr) >> PUD_SHIFT);
434 
435 	return (uintptr_t)early_pmd;
436 }
437 
438 static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va)
439 {
440 	return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
441 }
442 
443 static phys_addr_t __init alloc_pmd_late(uintptr_t va)
444 {
445 	unsigned long vaddr;
446 
447 	vaddr = __get_free_page(GFP_KERNEL);
448 	BUG_ON(!vaddr || !pgtable_pmd_page_ctor(virt_to_page(vaddr)));
449 
450 	return __pa(vaddr);
451 }
452 
453 static void __init create_pmd_mapping(pmd_t *pmdp,
454 				      uintptr_t va, phys_addr_t pa,
455 				      phys_addr_t sz, pgprot_t prot)
456 {
457 	pte_t *ptep;
458 	phys_addr_t pte_phys;
459 	uintptr_t pmd_idx = pmd_index(va);
460 
461 	if (sz == PMD_SIZE) {
462 		if (pmd_none(pmdp[pmd_idx]))
463 			pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot);
464 		return;
465 	}
466 
467 	if (pmd_none(pmdp[pmd_idx])) {
468 		pte_phys = pt_ops.alloc_pte(va);
469 		pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE);
470 		ptep = pt_ops.get_pte_virt(pte_phys);
471 		memset(ptep, 0, PAGE_SIZE);
472 	} else {
473 		pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx]));
474 		ptep = pt_ops.get_pte_virt(pte_phys);
475 	}
476 
477 	create_pte_mapping(ptep, va, pa, sz, prot);
478 }
479 
480 static pud_t *__init get_pud_virt_early(phys_addr_t pa)
481 {
482 	return (pud_t *)((uintptr_t)pa);
483 }
484 
485 static pud_t *__init get_pud_virt_fixmap(phys_addr_t pa)
486 {
487 	clear_fixmap(FIX_PUD);
488 	return (pud_t *)set_fixmap_offset(FIX_PUD, pa);
489 }
490 
491 static pud_t *__init get_pud_virt_late(phys_addr_t pa)
492 {
493 	return (pud_t *)__va(pa);
494 }
495 
496 static phys_addr_t __init alloc_pud_early(uintptr_t va)
497 {
498 	/* Only one PUD is available for early mapping */
499 	BUG_ON((va - kernel_map.virt_addr) >> PGDIR_SHIFT);
500 
501 	return (uintptr_t)early_pud;
502 }
503 
504 static phys_addr_t __init alloc_pud_fixmap(uintptr_t va)
505 {
506 	return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
507 }
508 
509 static phys_addr_t alloc_pud_late(uintptr_t va)
510 {
511 	unsigned long vaddr;
512 
513 	vaddr = __get_free_page(GFP_KERNEL);
514 	BUG_ON(!vaddr);
515 	return __pa(vaddr);
516 }
517 
518 static p4d_t *__init get_p4d_virt_early(phys_addr_t pa)
519 {
520 	return (p4d_t *)((uintptr_t)pa);
521 }
522 
523 static p4d_t *__init get_p4d_virt_fixmap(phys_addr_t pa)
524 {
525 	clear_fixmap(FIX_P4D);
526 	return (p4d_t *)set_fixmap_offset(FIX_P4D, pa);
527 }
528 
529 static p4d_t *__init get_p4d_virt_late(phys_addr_t pa)
530 {
531 	return (p4d_t *)__va(pa);
532 }
533 
534 static phys_addr_t __init alloc_p4d_early(uintptr_t va)
535 {
536 	/* Only one P4D is available for early mapping */
537 	BUG_ON((va - kernel_map.virt_addr) >> PGDIR_SHIFT);
538 
539 	return (uintptr_t)early_p4d;
540 }
541 
542 static phys_addr_t __init alloc_p4d_fixmap(uintptr_t va)
543 {
544 	return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
545 }
546 
547 static phys_addr_t alloc_p4d_late(uintptr_t va)
548 {
549 	unsigned long vaddr;
550 
551 	vaddr = __get_free_page(GFP_KERNEL);
552 	BUG_ON(!vaddr);
553 	return __pa(vaddr);
554 }
555 
556 static void __init create_pud_mapping(pud_t *pudp,
557 				      uintptr_t va, phys_addr_t pa,
558 				      phys_addr_t sz, pgprot_t prot)
559 {
560 	pmd_t *nextp;
561 	phys_addr_t next_phys;
562 	uintptr_t pud_index = pud_index(va);
563 
564 	if (sz == PUD_SIZE) {
565 		if (pud_val(pudp[pud_index]) == 0)
566 			pudp[pud_index] = pfn_pud(PFN_DOWN(pa), prot);
567 		return;
568 	}
569 
570 	if (pud_val(pudp[pud_index]) == 0) {
571 		next_phys = pt_ops.alloc_pmd(va);
572 		pudp[pud_index] = pfn_pud(PFN_DOWN(next_phys), PAGE_TABLE);
573 		nextp = pt_ops.get_pmd_virt(next_phys);
574 		memset(nextp, 0, PAGE_SIZE);
575 	} else {
576 		next_phys = PFN_PHYS(_pud_pfn(pudp[pud_index]));
577 		nextp = pt_ops.get_pmd_virt(next_phys);
578 	}
579 
580 	create_pmd_mapping(nextp, va, pa, sz, prot);
581 }
582 
583 static void __init create_p4d_mapping(p4d_t *p4dp,
584 				      uintptr_t va, phys_addr_t pa,
585 				      phys_addr_t sz, pgprot_t prot)
586 {
587 	pud_t *nextp;
588 	phys_addr_t next_phys;
589 	uintptr_t p4d_index = p4d_index(va);
590 
591 	if (sz == P4D_SIZE) {
592 		if (p4d_val(p4dp[p4d_index]) == 0)
593 			p4dp[p4d_index] = pfn_p4d(PFN_DOWN(pa), prot);
594 		return;
595 	}
596 
597 	if (p4d_val(p4dp[p4d_index]) == 0) {
598 		next_phys = pt_ops.alloc_pud(va);
599 		p4dp[p4d_index] = pfn_p4d(PFN_DOWN(next_phys), PAGE_TABLE);
600 		nextp = pt_ops.get_pud_virt(next_phys);
601 		memset(nextp, 0, PAGE_SIZE);
602 	} else {
603 		next_phys = PFN_PHYS(_p4d_pfn(p4dp[p4d_index]));
604 		nextp = pt_ops.get_pud_virt(next_phys);
605 	}
606 
607 	create_pud_mapping(nextp, va, pa, sz, prot);
608 }
609 
610 #define pgd_next_t		p4d_t
611 #define alloc_pgd_next(__va)	(pgtable_l5_enabled ?			\
612 		pt_ops.alloc_p4d(__va) : (pgtable_l4_enabled ?		\
613 		pt_ops.alloc_pud(__va) : pt_ops.alloc_pmd(__va)))
614 #define get_pgd_next_virt(__pa)	(pgtable_l5_enabled ?			\
615 		pt_ops.get_p4d_virt(__pa) : (pgd_next_t *)(pgtable_l4_enabled ?	\
616 		pt_ops.get_pud_virt(__pa) : (pud_t *)pt_ops.get_pmd_virt(__pa)))
617 #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot)	\
618 				(pgtable_l5_enabled ?			\
619 		create_p4d_mapping(__nextp, __va, __pa, __sz, __prot) : \
620 				(pgtable_l4_enabled ?			\
621 		create_pud_mapping((pud_t *)__nextp, __va, __pa, __sz, __prot) :	\
622 		create_pmd_mapping((pmd_t *)__nextp, __va, __pa, __sz, __prot)))
623 #define fixmap_pgd_next		(pgtable_l5_enabled ?			\
624 		(uintptr_t)fixmap_p4d : (pgtable_l4_enabled ?		\
625 		(uintptr_t)fixmap_pud : (uintptr_t)fixmap_pmd))
626 #define trampoline_pgd_next	(pgtable_l5_enabled ?			\
627 		(uintptr_t)trampoline_p4d : (pgtable_l4_enabled ?	\
628 		(uintptr_t)trampoline_pud : (uintptr_t)trampoline_pmd))
629 #define early_dtb_pgd_next	(pgtable_l5_enabled ?			\
630 		(uintptr_t)early_dtb_p4d : (pgtable_l4_enabled ?	\
631 		(uintptr_t)early_dtb_pud : (uintptr_t)early_dtb_pmd))
632 #else
633 #define pgd_next_t		pte_t
634 #define alloc_pgd_next(__va)	pt_ops.alloc_pte(__va)
635 #define get_pgd_next_virt(__pa)	pt_ops.get_pte_virt(__pa)
636 #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot)	\
637 	create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
638 #define fixmap_pgd_next		((uintptr_t)fixmap_pte)
639 #define early_dtb_pgd_next	((uintptr_t)early_dtb_pmd)
640 #define create_p4d_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
641 #define create_pud_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
642 #define create_pmd_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
643 #endif /* __PAGETABLE_PMD_FOLDED */
644 
645 void __init create_pgd_mapping(pgd_t *pgdp,
646 				      uintptr_t va, phys_addr_t pa,
647 				      phys_addr_t sz, pgprot_t prot)
648 {
649 	pgd_next_t *nextp;
650 	phys_addr_t next_phys;
651 	uintptr_t pgd_idx = pgd_index(va);
652 
653 	if (sz == PGDIR_SIZE) {
654 		if (pgd_val(pgdp[pgd_idx]) == 0)
655 			pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot);
656 		return;
657 	}
658 
659 	if (pgd_val(pgdp[pgd_idx]) == 0) {
660 		next_phys = alloc_pgd_next(va);
661 		pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE);
662 		nextp = get_pgd_next_virt(next_phys);
663 		memset(nextp, 0, PAGE_SIZE);
664 	} else {
665 		next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx]));
666 		nextp = get_pgd_next_virt(next_phys);
667 	}
668 
669 	create_pgd_next_mapping(nextp, va, pa, sz, prot);
670 }
671 
672 static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size)
673 {
674 	/* Upgrade to PMD_SIZE mappings whenever possible */
675 	if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1)))
676 		return PAGE_SIZE;
677 
678 	return PMD_SIZE;
679 }
680 
681 #ifdef CONFIG_XIP_KERNEL
682 #define phys_ram_base  (*(phys_addr_t *)XIP_FIXUP(&phys_ram_base))
683 extern char _xiprom[], _exiprom[], __data_loc;
684 
685 /* called from head.S with MMU off */
686 asmlinkage void __init __copy_data(void)
687 {
688 	void *from = (void *)(&__data_loc);
689 	void *to = (void *)CONFIG_PHYS_RAM_BASE;
690 	size_t sz = (size_t)((uintptr_t)(&_end) - (uintptr_t)(&_sdata));
691 
692 	memcpy(to, from, sz);
693 }
694 #endif
695 
696 #ifdef CONFIG_STRICT_KERNEL_RWX
697 static __init pgprot_t pgprot_from_va(uintptr_t va)
698 {
699 	if (is_va_kernel_text(va))
700 		return PAGE_KERNEL_READ_EXEC;
701 
702 	/*
703 	 * In 64-bit kernel, the kernel mapping is outside the linear mapping so
704 	 * we must protect its linear mapping alias from being executed and
705 	 * written.
706 	 * And rodata section is marked readonly in mark_rodata_ro.
707 	 */
708 	if (IS_ENABLED(CONFIG_64BIT) && is_va_kernel_lm_alias_text(va))
709 		return PAGE_KERNEL_READ;
710 
711 	return PAGE_KERNEL;
712 }
713 
714 void mark_rodata_ro(void)
715 {
716 	set_kernel_memory(__start_rodata, _data, set_memory_ro);
717 	if (IS_ENABLED(CONFIG_64BIT))
718 		set_kernel_memory(lm_alias(__start_rodata), lm_alias(_data),
719 				  set_memory_ro);
720 
721 	debug_checkwx();
722 }
723 #else
724 static __init pgprot_t pgprot_from_va(uintptr_t va)
725 {
726 	if (IS_ENABLED(CONFIG_64BIT) && !is_kernel_mapping(va))
727 		return PAGE_KERNEL;
728 
729 	return PAGE_KERNEL_EXEC;
730 }
731 #endif /* CONFIG_STRICT_KERNEL_RWX */
732 
733 #if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL)
734 static void __init disable_pgtable_l5(void)
735 {
736 	pgtable_l5_enabled = false;
737 	kernel_map.page_offset = PAGE_OFFSET_L4;
738 	satp_mode = SATP_MODE_48;
739 }
740 
741 static void __init disable_pgtable_l4(void)
742 {
743 	pgtable_l4_enabled = false;
744 	kernel_map.page_offset = PAGE_OFFSET_L3;
745 	satp_mode = SATP_MODE_39;
746 }
747 
748 /*
749  * There is a simple way to determine if 4-level is supported by the
750  * underlying hardware: establish 1:1 mapping in 4-level page table mode
751  * then read SATP to see if the configuration was taken into account
752  * meaning sv48 is supported.
753  */
754 static __init void set_satp_mode(void)
755 {
756 	u64 identity_satp, hw_satp;
757 	uintptr_t set_satp_mode_pmd = ((unsigned long)set_satp_mode) & PMD_MASK;
758 	bool check_l4 = false;
759 
760 	create_p4d_mapping(early_p4d,
761 			set_satp_mode_pmd, (uintptr_t)early_pud,
762 			P4D_SIZE, PAGE_TABLE);
763 	create_pud_mapping(early_pud,
764 			   set_satp_mode_pmd, (uintptr_t)early_pmd,
765 			   PUD_SIZE, PAGE_TABLE);
766 	/* Handle the case where set_satp_mode straddles 2 PMDs */
767 	create_pmd_mapping(early_pmd,
768 			   set_satp_mode_pmd, set_satp_mode_pmd,
769 			   PMD_SIZE, PAGE_KERNEL_EXEC);
770 	create_pmd_mapping(early_pmd,
771 			   set_satp_mode_pmd + PMD_SIZE,
772 			   set_satp_mode_pmd + PMD_SIZE,
773 			   PMD_SIZE, PAGE_KERNEL_EXEC);
774 retry:
775 	create_pgd_mapping(early_pg_dir,
776 			   set_satp_mode_pmd,
777 			   check_l4 ? (uintptr_t)early_pud : (uintptr_t)early_p4d,
778 			   PGDIR_SIZE, PAGE_TABLE);
779 
780 	identity_satp = PFN_DOWN((uintptr_t)&early_pg_dir) | satp_mode;
781 
782 	local_flush_tlb_all();
783 	csr_write(CSR_SATP, identity_satp);
784 	hw_satp = csr_swap(CSR_SATP, 0ULL);
785 	local_flush_tlb_all();
786 
787 	if (hw_satp != identity_satp) {
788 		if (!check_l4) {
789 			disable_pgtable_l5();
790 			check_l4 = true;
791 			memset(early_pg_dir, 0, PAGE_SIZE);
792 			goto retry;
793 		}
794 		disable_pgtable_l4();
795 	}
796 
797 	memset(early_pg_dir, 0, PAGE_SIZE);
798 	memset(early_p4d, 0, PAGE_SIZE);
799 	memset(early_pud, 0, PAGE_SIZE);
800 	memset(early_pmd, 0, PAGE_SIZE);
801 }
802 #endif
803 
804 /*
805  * setup_vm() is called from head.S with MMU-off.
806  *
807  * Following requirements should be honoured for setup_vm() to work
808  * correctly:
809  * 1) It should use PC-relative addressing for accessing kernel symbols.
810  *    To achieve this we always use GCC cmodel=medany.
811  * 2) The compiler instrumentation for FTRACE will not work for setup_vm()
812  *    so disable compiler instrumentation when FTRACE is enabled.
813  *
814  * Currently, the above requirements are honoured by using custom CFLAGS
815  * for init.o in mm/Makefile.
816  */
817 
818 #ifndef __riscv_cmodel_medany
819 #error "setup_vm() is called from head.S before relocate so it should not use absolute addressing."
820 #endif
821 
822 #ifdef CONFIG_XIP_KERNEL
823 static void __init create_kernel_page_table(pgd_t *pgdir,
824 					    __always_unused bool early)
825 {
826 	uintptr_t va, end_va;
827 
828 	/* Map the flash resident part */
829 	end_va = kernel_map.virt_addr + kernel_map.xiprom_sz;
830 	for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE)
831 		create_pgd_mapping(pgdir, va,
832 				   kernel_map.xiprom + (va - kernel_map.virt_addr),
833 				   PMD_SIZE, PAGE_KERNEL_EXEC);
834 
835 	/* Map the data in RAM */
836 	end_va = kernel_map.virt_addr + XIP_OFFSET + kernel_map.size;
837 	for (va = kernel_map.virt_addr + XIP_OFFSET; va < end_va; va += PMD_SIZE)
838 		create_pgd_mapping(pgdir, va,
839 				   kernel_map.phys_addr + (va - (kernel_map.virt_addr + XIP_OFFSET)),
840 				   PMD_SIZE, PAGE_KERNEL);
841 }
842 #else
843 static void __init create_kernel_page_table(pgd_t *pgdir, bool early)
844 {
845 	uintptr_t va, end_va;
846 
847 	end_va = kernel_map.virt_addr + kernel_map.size;
848 	for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE)
849 		create_pgd_mapping(pgdir, va,
850 				   kernel_map.phys_addr + (va - kernel_map.virt_addr),
851 				   PMD_SIZE,
852 				   early ?
853 					PAGE_KERNEL_EXEC : pgprot_from_va(va));
854 }
855 #endif
856 
857 /*
858  * Setup a 4MB mapping that encompasses the device tree: for 64-bit kernel,
859  * this means 2 PMD entries whereas for 32-bit kernel, this is only 1 PGDIR
860  * entry.
861  */
862 static void __init create_fdt_early_page_table(pgd_t *pgdir, uintptr_t dtb_pa)
863 {
864 #ifndef CONFIG_BUILTIN_DTB
865 	uintptr_t pa = dtb_pa & ~(PMD_SIZE - 1);
866 
867 	create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
868 			   IS_ENABLED(CONFIG_64BIT) ? early_dtb_pgd_next : pa,
869 			   PGDIR_SIZE,
870 			   IS_ENABLED(CONFIG_64BIT) ? PAGE_TABLE : PAGE_KERNEL);
871 
872 	if (pgtable_l5_enabled)
873 		create_p4d_mapping(early_dtb_p4d, DTB_EARLY_BASE_VA,
874 				   (uintptr_t)early_dtb_pud, P4D_SIZE, PAGE_TABLE);
875 
876 	if (pgtable_l4_enabled)
877 		create_pud_mapping(early_dtb_pud, DTB_EARLY_BASE_VA,
878 				   (uintptr_t)early_dtb_pmd, PUD_SIZE, PAGE_TABLE);
879 
880 	if (IS_ENABLED(CONFIG_64BIT)) {
881 		create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA,
882 				   pa, PMD_SIZE, PAGE_KERNEL);
883 		create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE,
884 				   pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL);
885 	}
886 
887 	dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1));
888 #else
889 	/*
890 	 * For 64-bit kernel, __va can't be used since it would return a linear
891 	 * mapping address whereas dtb_early_va will be used before
892 	 * setup_vm_final installs the linear mapping. For 32-bit kernel, as the
893 	 * kernel is mapped in the linear mapping, that makes no difference.
894 	 */
895 	dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa));
896 #endif
897 
898 	dtb_early_pa = dtb_pa;
899 }
900 
901 /*
902  * MMU is not enabled, the page tables are allocated directly using
903  * early_pmd/pud/p4d and the address returned is the physical one.
904  */
905 static void __init pt_ops_set_early(void)
906 {
907 	pt_ops.alloc_pte = alloc_pte_early;
908 	pt_ops.get_pte_virt = get_pte_virt_early;
909 #ifndef __PAGETABLE_PMD_FOLDED
910 	pt_ops.alloc_pmd = alloc_pmd_early;
911 	pt_ops.get_pmd_virt = get_pmd_virt_early;
912 	pt_ops.alloc_pud = alloc_pud_early;
913 	pt_ops.get_pud_virt = get_pud_virt_early;
914 	pt_ops.alloc_p4d = alloc_p4d_early;
915 	pt_ops.get_p4d_virt = get_p4d_virt_early;
916 #endif
917 }
918 
919 /*
920  * MMU is enabled but page table setup is not complete yet.
921  * fixmap page table alloc functions must be used as a means to temporarily
922  * map the allocated physical pages since the linear mapping does not exist yet.
923  *
924  * Note that this is called with MMU disabled, hence kernel_mapping_pa_to_va,
925  * but it will be used as described above.
926  */
927 static void __init pt_ops_set_fixmap(void)
928 {
929 	pt_ops.alloc_pte = kernel_mapping_pa_to_va((uintptr_t)alloc_pte_fixmap);
930 	pt_ops.get_pte_virt = kernel_mapping_pa_to_va((uintptr_t)get_pte_virt_fixmap);
931 #ifndef __PAGETABLE_PMD_FOLDED
932 	pt_ops.alloc_pmd = kernel_mapping_pa_to_va((uintptr_t)alloc_pmd_fixmap);
933 	pt_ops.get_pmd_virt = kernel_mapping_pa_to_va((uintptr_t)get_pmd_virt_fixmap);
934 	pt_ops.alloc_pud = kernel_mapping_pa_to_va((uintptr_t)alloc_pud_fixmap);
935 	pt_ops.get_pud_virt = kernel_mapping_pa_to_va((uintptr_t)get_pud_virt_fixmap);
936 	pt_ops.alloc_p4d = kernel_mapping_pa_to_va((uintptr_t)alloc_p4d_fixmap);
937 	pt_ops.get_p4d_virt = kernel_mapping_pa_to_va((uintptr_t)get_p4d_virt_fixmap);
938 #endif
939 }
940 
941 /*
942  * MMU is enabled and page table setup is complete, so from now, we can use
943  * generic page allocation functions to setup page table.
944  */
945 static void __init pt_ops_set_late(void)
946 {
947 	pt_ops.alloc_pte = alloc_pte_late;
948 	pt_ops.get_pte_virt = get_pte_virt_late;
949 #ifndef __PAGETABLE_PMD_FOLDED
950 	pt_ops.alloc_pmd = alloc_pmd_late;
951 	pt_ops.get_pmd_virt = get_pmd_virt_late;
952 	pt_ops.alloc_pud = alloc_pud_late;
953 	pt_ops.get_pud_virt = get_pud_virt_late;
954 	pt_ops.alloc_p4d = alloc_p4d_late;
955 	pt_ops.get_p4d_virt = get_p4d_virt_late;
956 #endif
957 }
958 
959 asmlinkage void __init setup_vm(uintptr_t dtb_pa)
960 {
961 	pmd_t __maybe_unused fix_bmap_spmd, fix_bmap_epmd;
962 
963 	kernel_map.virt_addr = KERNEL_LINK_ADDR;
964 	kernel_map.page_offset = _AC(CONFIG_PAGE_OFFSET, UL);
965 
966 #ifdef CONFIG_XIP_KERNEL
967 	kernel_map.xiprom = (uintptr_t)CONFIG_XIP_PHYS_ADDR;
968 	kernel_map.xiprom_sz = (uintptr_t)(&_exiprom) - (uintptr_t)(&_xiprom);
969 
970 	phys_ram_base = CONFIG_PHYS_RAM_BASE;
971 	kernel_map.phys_addr = (uintptr_t)CONFIG_PHYS_RAM_BASE;
972 	kernel_map.size = (uintptr_t)(&_end) - (uintptr_t)(&_sdata);
973 
974 	kernel_map.va_kernel_xip_pa_offset = kernel_map.virt_addr - kernel_map.xiprom;
975 #else
976 	kernel_map.phys_addr = (uintptr_t)(&_start);
977 	kernel_map.size = (uintptr_t)(&_end) - kernel_map.phys_addr;
978 #endif
979 
980 #if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL)
981 	set_satp_mode();
982 #endif
983 
984 	kernel_map.va_pa_offset = PAGE_OFFSET - kernel_map.phys_addr;
985 	kernel_map.va_kernel_pa_offset = kernel_map.virt_addr - kernel_map.phys_addr;
986 
987 	riscv_pfn_base = PFN_DOWN(kernel_map.phys_addr);
988 
989 	/*
990 	 * The default maximal physical memory size is KERN_VIRT_SIZE for 32-bit
991 	 * kernel, whereas for 64-bit kernel, the end of the virtual address
992 	 * space is occupied by the modules/BPF/kernel mappings which reduces
993 	 * the available size of the linear mapping.
994 	 */
995 	memory_limit = KERN_VIRT_SIZE - (IS_ENABLED(CONFIG_64BIT) ? SZ_4G : 0);
996 
997 	/* Sanity check alignment and size */
998 	BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0);
999 	BUG_ON((kernel_map.phys_addr % PMD_SIZE) != 0);
1000 
1001 #ifdef CONFIG_64BIT
1002 	/*
1003 	 * The last 4K bytes of the addressable memory can not be mapped because
1004 	 * of IS_ERR_VALUE macro.
1005 	 */
1006 	BUG_ON((kernel_map.virt_addr + kernel_map.size) > ADDRESS_SPACE_END - SZ_4K);
1007 #endif
1008 
1009 	apply_early_boot_alternatives();
1010 	pt_ops_set_early();
1011 
1012 	/* Setup early PGD for fixmap */
1013 	create_pgd_mapping(early_pg_dir, FIXADDR_START,
1014 			   fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE);
1015 
1016 #ifndef __PAGETABLE_PMD_FOLDED
1017 	/* Setup fixmap P4D and PUD */
1018 	if (pgtable_l5_enabled)
1019 		create_p4d_mapping(fixmap_p4d, FIXADDR_START,
1020 				   (uintptr_t)fixmap_pud, P4D_SIZE, PAGE_TABLE);
1021 	/* Setup fixmap PUD and PMD */
1022 	if (pgtable_l4_enabled)
1023 		create_pud_mapping(fixmap_pud, FIXADDR_START,
1024 				   (uintptr_t)fixmap_pmd, PUD_SIZE, PAGE_TABLE);
1025 	create_pmd_mapping(fixmap_pmd, FIXADDR_START,
1026 			   (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE);
1027 	/* Setup trampoline PGD and PMD */
1028 	create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr,
1029 			   trampoline_pgd_next, PGDIR_SIZE, PAGE_TABLE);
1030 	if (pgtable_l5_enabled)
1031 		create_p4d_mapping(trampoline_p4d, kernel_map.virt_addr,
1032 				   (uintptr_t)trampoline_pud, P4D_SIZE, PAGE_TABLE);
1033 	if (pgtable_l4_enabled)
1034 		create_pud_mapping(trampoline_pud, kernel_map.virt_addr,
1035 				   (uintptr_t)trampoline_pmd, PUD_SIZE, PAGE_TABLE);
1036 #ifdef CONFIG_XIP_KERNEL
1037 	create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr,
1038 			   kernel_map.xiprom, PMD_SIZE, PAGE_KERNEL_EXEC);
1039 #else
1040 	create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr,
1041 			   kernel_map.phys_addr, PMD_SIZE, PAGE_KERNEL_EXEC);
1042 #endif
1043 #else
1044 	/* Setup trampoline PGD */
1045 	create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr,
1046 			   kernel_map.phys_addr, PGDIR_SIZE, PAGE_KERNEL_EXEC);
1047 #endif
1048 
1049 	/*
1050 	 * Setup early PGD covering entire kernel which will allow
1051 	 * us to reach paging_init(). We map all memory banks later
1052 	 * in setup_vm_final() below.
1053 	 */
1054 	create_kernel_page_table(early_pg_dir, true);
1055 
1056 	/* Setup early mapping for FDT early scan */
1057 	create_fdt_early_page_table(early_pg_dir, dtb_pa);
1058 
1059 	/*
1060 	 * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap
1061 	 * range can not span multiple pmds.
1062 	 */
1063 	BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
1064 		     != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
1065 
1066 #ifndef __PAGETABLE_PMD_FOLDED
1067 	/*
1068 	 * Early ioremap fixmap is already created as it lies within first 2MB
1069 	 * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END
1070 	 * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn
1071 	 * the user if not.
1072 	 */
1073 	fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))];
1074 	fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))];
1075 	if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) {
1076 		WARN_ON(1);
1077 		pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n",
1078 			pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd));
1079 		pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
1080 			fix_to_virt(FIX_BTMAP_BEGIN));
1081 		pr_warn("fix_to_virt(FIX_BTMAP_END):   %08lx\n",
1082 			fix_to_virt(FIX_BTMAP_END));
1083 
1084 		pr_warn("FIX_BTMAP_END:       %d\n", FIX_BTMAP_END);
1085 		pr_warn("FIX_BTMAP_BEGIN:     %d\n", FIX_BTMAP_BEGIN);
1086 	}
1087 #endif
1088 
1089 	pt_ops_set_fixmap();
1090 }
1091 
1092 static void __init setup_vm_final(void)
1093 {
1094 	uintptr_t va, map_size;
1095 	phys_addr_t pa, start, end;
1096 	u64 i;
1097 
1098 	/* Setup swapper PGD for fixmap */
1099 	create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
1100 			   __pa_symbol(fixmap_pgd_next),
1101 			   PGDIR_SIZE, PAGE_TABLE);
1102 
1103 	/* Map all memory banks in the linear mapping */
1104 	for_each_mem_range(i, &start, &end) {
1105 		if (start >= end)
1106 			break;
1107 		if (start <= __pa(PAGE_OFFSET) &&
1108 		    __pa(PAGE_OFFSET) < end)
1109 			start = __pa(PAGE_OFFSET);
1110 		if (end >= __pa(PAGE_OFFSET) + memory_limit)
1111 			end = __pa(PAGE_OFFSET) + memory_limit;
1112 
1113 		map_size = best_map_size(start, end - start);
1114 		for (pa = start; pa < end; pa += map_size) {
1115 			va = (uintptr_t)__va(pa);
1116 
1117 			create_pgd_mapping(swapper_pg_dir, va, pa, map_size,
1118 					   pgprot_from_va(va));
1119 		}
1120 	}
1121 
1122 	/* Map the kernel */
1123 	if (IS_ENABLED(CONFIG_64BIT))
1124 		create_kernel_page_table(swapper_pg_dir, false);
1125 
1126 #ifdef CONFIG_KASAN
1127 	kasan_swapper_init();
1128 #endif
1129 
1130 	/* Clear fixmap PTE and PMD mappings */
1131 	clear_fixmap(FIX_PTE);
1132 	clear_fixmap(FIX_PMD);
1133 	clear_fixmap(FIX_PUD);
1134 	clear_fixmap(FIX_P4D);
1135 
1136 	/* Move to swapper page table */
1137 	csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | satp_mode);
1138 	local_flush_tlb_all();
1139 
1140 	pt_ops_set_late();
1141 }
1142 #else
1143 asmlinkage void __init setup_vm(uintptr_t dtb_pa)
1144 {
1145 	dtb_early_va = (void *)dtb_pa;
1146 	dtb_early_pa = dtb_pa;
1147 }
1148 
1149 static inline void setup_vm_final(void)
1150 {
1151 }
1152 #endif /* CONFIG_MMU */
1153 
1154 /*
1155  * reserve_crashkernel() - reserves memory for crash kernel
1156  *
1157  * This function reserves memory area given in "crashkernel=" kernel command
1158  * line parameter. The memory reserved is used by dump capture kernel when
1159  * primary kernel is crashing.
1160  */
1161 static void __init reserve_crashkernel(void)
1162 {
1163 	unsigned long long crash_base = 0;
1164 	unsigned long long crash_size = 0;
1165 	unsigned long search_start = memblock_start_of_DRAM();
1166 	unsigned long search_end = memblock_end_of_DRAM();
1167 
1168 	int ret = 0;
1169 
1170 	if (!IS_ENABLED(CONFIG_KEXEC_CORE))
1171 		return;
1172 	/*
1173 	 * Don't reserve a region for a crash kernel on a crash kernel
1174 	 * since it doesn't make much sense and we have limited memory
1175 	 * resources.
1176 	 */
1177 	if (is_kdump_kernel()) {
1178 		pr_info("crashkernel: ignoring reservation request\n");
1179 		return;
1180 	}
1181 
1182 	ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),
1183 				&crash_size, &crash_base);
1184 	if (ret || !crash_size)
1185 		return;
1186 
1187 	crash_size = PAGE_ALIGN(crash_size);
1188 
1189 	if (crash_base) {
1190 		search_start = crash_base;
1191 		search_end = crash_base + crash_size;
1192 	}
1193 
1194 	/*
1195 	 * Current riscv boot protocol requires 2MB alignment for
1196 	 * RV64 and 4MB alignment for RV32 (hugepage size)
1197 	 *
1198 	 * Try to alloc from 32bit addressible physical memory so that
1199 	 * swiotlb can work on the crash kernel.
1200 	 */
1201 	crash_base = memblock_phys_alloc_range(crash_size, PMD_SIZE,
1202 					       search_start,
1203 					       min(search_end, (unsigned long) SZ_4G));
1204 	if (crash_base == 0) {
1205 		/* Try again without restricting region to 32bit addressible memory */
1206 		crash_base = memblock_phys_alloc_range(crash_size, PMD_SIZE,
1207 						search_start, search_end);
1208 		if (crash_base == 0) {
1209 			pr_warn("crashkernel: couldn't allocate %lldKB\n",
1210 				crash_size >> 10);
1211 			return;
1212 		}
1213 	}
1214 
1215 	pr_info("crashkernel: reserved 0x%016llx - 0x%016llx (%lld MB)\n",
1216 		crash_base, crash_base + crash_size, crash_size >> 20);
1217 
1218 	crashk_res.start = crash_base;
1219 	crashk_res.end = crash_base + crash_size - 1;
1220 }
1221 
1222 void __init paging_init(void)
1223 {
1224 	setup_bootmem();
1225 	setup_vm_final();
1226 }
1227 
1228 void __init misc_mem_init(void)
1229 {
1230 	early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
1231 	arch_numa_init();
1232 	sparse_init();
1233 	zone_sizes_init();
1234 	reserve_crashkernel();
1235 	memblock_dump_all();
1236 }
1237 
1238 #ifdef CONFIG_SPARSEMEM_VMEMMAP
1239 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
1240 			       struct vmem_altmap *altmap)
1241 {
1242 	return vmemmap_populate_basepages(start, end, node, NULL);
1243 }
1244 #endif
1245