1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2019 Western Digital Corporation or its affiliates. 4 * 5 * Authors: 6 * Anup Patel <anup.patel@wdc.com> 7 */ 8 9 #include <linux/errno.h> 10 #include <linux/err.h> 11 #include <linux/module.h> 12 #include <linux/kvm_host.h> 13 #include <asm/csr.h> 14 #include <asm/cpufeature.h> 15 #include <asm/sbi.h> 16 17 long kvm_arch_dev_ioctl(struct file *filp, 18 unsigned int ioctl, unsigned long arg) 19 { 20 return -EINVAL; 21 } 22 23 int kvm_arch_enable_virtualization_cpu(void) 24 { 25 csr_write(CSR_HEDELEG, KVM_HEDELEG_DEFAULT); 26 csr_write(CSR_HIDELEG, KVM_HIDELEG_DEFAULT); 27 28 /* VS should access only the time counter directly. Everything else should trap */ 29 csr_write(CSR_HCOUNTEREN, 0x02); 30 31 csr_write(CSR_HVIP, 0); 32 33 kvm_riscv_aia_enable(); 34 35 return 0; 36 } 37 38 void kvm_arch_disable_virtualization_cpu(void) 39 { 40 kvm_riscv_aia_disable(); 41 42 /* 43 * After clearing the hideleg CSR, the host kernel will receive 44 * spurious interrupts if hvip CSR has pending interrupts and the 45 * corresponding enable bits in vsie CSR are asserted. To avoid it, 46 * hvip CSR and vsie CSR must be cleared before clearing hideleg CSR. 47 */ 48 csr_write(CSR_VSIE, 0); 49 csr_write(CSR_HVIP, 0); 50 csr_write(CSR_HEDELEG, 0); 51 csr_write(CSR_HIDELEG, 0); 52 } 53 54 static int __init riscv_kvm_init(void) 55 { 56 int rc; 57 const char *str; 58 59 if (!riscv_isa_extension_available(NULL, h)) { 60 kvm_info("hypervisor extension not available\n"); 61 return -ENODEV; 62 } 63 64 if (sbi_spec_is_0_1()) { 65 kvm_info("require SBI v0.2 or higher\n"); 66 return -ENODEV; 67 } 68 69 if (!sbi_probe_extension(SBI_EXT_RFENCE)) { 70 kvm_info("require SBI RFENCE extension\n"); 71 return -ENODEV; 72 } 73 74 kvm_riscv_gstage_mode_detect(); 75 76 kvm_riscv_gstage_vmid_detect(); 77 78 rc = kvm_riscv_aia_init(); 79 if (rc && rc != -ENODEV) 80 return rc; 81 82 kvm_info("hypervisor extension available\n"); 83 84 switch (kvm_riscv_gstage_mode()) { 85 case HGATP_MODE_SV32X4: 86 str = "Sv32x4"; 87 break; 88 case HGATP_MODE_SV39X4: 89 str = "Sv39x4"; 90 break; 91 case HGATP_MODE_SV48X4: 92 str = "Sv48x4"; 93 break; 94 case HGATP_MODE_SV57X4: 95 str = "Sv57x4"; 96 break; 97 default: 98 return -ENODEV; 99 } 100 kvm_info("using %s G-stage page table format\n", str); 101 102 kvm_info("VMID %ld bits available\n", kvm_riscv_gstage_vmid_bits()); 103 104 if (kvm_riscv_aia_available()) 105 kvm_info("AIA available with %d guest external interrupts\n", 106 kvm_riscv_aia_nr_hgei); 107 108 rc = kvm_init(sizeof(struct kvm_vcpu), 0, THIS_MODULE); 109 if (rc) { 110 kvm_riscv_aia_exit(); 111 return rc; 112 } 113 114 return 0; 115 } 116 module_init(riscv_kvm_init); 117 118 static void __exit riscv_kvm_exit(void) 119 { 120 kvm_riscv_aia_exit(); 121 122 kvm_exit(); 123 } 124 module_exit(riscv_kvm_exit); 125