1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2021 Western Digital Corporation or its affiliates. 4 * Copyright (c) 2022 Ventana Micro Systems Inc. 5 */ 6 7 #define pr_fmt(fmt) "suspend: " fmt 8 9 #include <linux/ftrace.h> 10 #include <linux/suspend.h> 11 #include <asm/csr.h> 12 #include <asm/sbi.h> 13 #include <asm/suspend.h> 14 15 void suspend_save_csrs(struct suspend_context *context) 16 { 17 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_XLINUXENVCFG)) 18 context->envcfg = csr_read(CSR_ENVCFG); 19 context->tvec = csr_read(CSR_TVEC); 20 context->ie = csr_read(CSR_IE); 21 22 /* 23 * No need to save/restore IP CSR (i.e. MIP or SIP) because: 24 * 25 * 1. For no-MMU (M-mode) kernel, the bits in MIP are set by 26 * external devices (such as interrupt controller, timer, etc). 27 * 2. For MMU (S-mode) kernel, the bits in SIP are set by 28 * M-mode firmware and external devices (such as interrupt 29 * controller, etc). 30 */ 31 32 #ifdef CONFIG_MMU 33 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SSTC)) { 34 context->stimecmp = csr_read(CSR_STIMECMP); 35 #if __riscv_xlen < 64 36 context->stimecmph = csr_read(CSR_STIMECMPH); 37 #endif 38 } 39 40 context->satp = csr_read(CSR_SATP); 41 #endif 42 } 43 44 void suspend_restore_csrs(struct suspend_context *context) 45 { 46 riscv_clear_hypervisor_csr(); 47 48 csr_write(CSR_SCRATCH, 0); 49 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_XLINUXENVCFG)) 50 csr_write(CSR_ENVCFG, context->envcfg); 51 csr_write(CSR_TVEC, context->tvec); 52 csr_write(CSR_IE, context->ie); 53 54 #ifdef CONFIG_MMU 55 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SSTC)) { 56 #if __riscv_xlen < 64 57 csr_write(CSR_STIMECMP, ULONG_MAX); 58 csr_write(CSR_STIMECMPH, context->stimecmph); 59 #endif 60 csr_write(CSR_STIMECMP, context->stimecmp); 61 } 62 63 csr_write(CSR_SATP, context->satp); 64 #endif 65 } 66 67 int cpu_suspend(unsigned long arg, 68 int (*finish)(unsigned long arg, 69 unsigned long entry, 70 unsigned long context)) 71 { 72 int rc = 0; 73 struct suspend_context context = { 0 }; 74 75 /* Finisher should be non-NULL */ 76 if (!finish) 77 return -EINVAL; 78 79 /* Save additional CSRs*/ 80 suspend_save_csrs(&context); 81 82 /* 83 * Function graph tracer state gets inconsistent when the kernel 84 * calls functions that never return (aka finishers) hence disable 85 * graph tracing during their execution. 86 */ 87 pause_graph_tracing(); 88 89 /* Save context on stack */ 90 if (__cpu_suspend_enter(&context)) { 91 /* Call the finisher */ 92 rc = finish(arg, __pa_symbol(__cpu_resume_enter), 93 (ulong)&context); 94 95 /* 96 * Should never reach here, unless the suspend finisher 97 * fails. Successful cpu_suspend() should return from 98 * __cpu_resume_entry() 99 */ 100 if (!rc) 101 rc = -EOPNOTSUPP; 102 } 103 104 /* Enable function graph tracer */ 105 unpause_graph_tracing(); 106 107 /* Restore additional CSRs */ 108 suspend_restore_csrs(&context); 109 110 return rc; 111 } 112 113 #ifdef CONFIG_RISCV_SBI 114 static int sbi_system_suspend(unsigned long sleep_type, 115 unsigned long resume_addr, 116 unsigned long opaque) 117 { 118 struct sbiret ret; 119 120 ret = sbi_ecall(SBI_EXT_SUSP, SBI_EXT_SUSP_SYSTEM_SUSPEND, 121 sleep_type, resume_addr, opaque, 0, 0, 0); 122 if (ret.error) 123 return sbi_err_map_linux_errno(ret.error); 124 125 return ret.value; 126 } 127 128 static int sbi_system_suspend_enter(suspend_state_t state) 129 { 130 return cpu_suspend(SBI_SUSP_SLEEP_TYPE_SUSPEND_TO_RAM, sbi_system_suspend); 131 } 132 133 static const struct platform_suspend_ops sbi_system_suspend_ops = { 134 .valid = suspend_valid_only_mem, 135 .enter = sbi_system_suspend_enter, 136 }; 137 138 static int __init sbi_system_suspend_init(void) 139 { 140 if (sbi_spec_version >= sbi_mk_version(2, 0) && 141 sbi_probe_extension(SBI_EXT_SUSP) > 0) { 142 pr_info("SBI SUSP extension detected\n"); 143 if (IS_ENABLED(CONFIG_SUSPEND)) 144 suspend_set_ops(&sbi_system_suspend_ops); 145 } 146 147 return 0; 148 } 149 150 arch_initcall(sbi_system_suspend_init); 151 152 static int sbi_suspend_finisher(unsigned long suspend_type, 153 unsigned long resume_addr, 154 unsigned long opaque) 155 { 156 struct sbiret ret; 157 158 ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_SUSPEND, 159 suspend_type, resume_addr, opaque, 0, 0, 0); 160 161 return (ret.error) ? sbi_err_map_linux_errno(ret.error) : 0; 162 } 163 164 int riscv_sbi_hart_suspend(u32 state) 165 { 166 if (state & SBI_HSM_SUSP_NON_RET_BIT) 167 return cpu_suspend(state, sbi_suspend_finisher); 168 else 169 return sbi_suspend_finisher(state, 0, 0); 170 } 171 172 bool riscv_sbi_suspend_state_is_valid(u32 state) 173 { 174 if (state > SBI_HSM_SUSPEND_RET_DEFAULT && 175 state < SBI_HSM_SUSPEND_RET_PLATFORM) 176 return false; 177 178 if (state > SBI_HSM_SUSPEND_NON_RET_DEFAULT && 179 state < SBI_HSM_SUSPEND_NON_RET_PLATFORM) 180 return false; 181 182 return true; 183 } 184 185 bool riscv_sbi_hsm_is_supported(void) 186 { 187 /* 188 * The SBI HSM suspend function is only available when: 189 * 1) SBI version is 0.3 or higher 190 * 2) SBI HSM extension is available 191 */ 192 if (sbi_spec_version < sbi_mk_version(0, 3) || 193 !sbi_probe_extension(SBI_EXT_HSM)) { 194 pr_info("HSM suspend not available\n"); 195 return false; 196 } 197 198 return true; 199 } 200 #endif /* CONFIG_RISCV_SBI */ 201