1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * SMP initialisation and IPI support 4 * Based on arch/arm64/kernel/smp.c 5 * 6 * Copyright (C) 2012 ARM Ltd. 7 * Copyright (C) 2015 Regents of the University of California 8 * Copyright (C) 2017 SiFive 9 */ 10 11 #include <linux/acpi.h> 12 #include <linux/arch_topology.h> 13 #include <linux/module.h> 14 #include <linux/init.h> 15 #include <linux/kernel.h> 16 #include <linux/mm.h> 17 #include <linux/sched.h> 18 #include <linux/kernel_stat.h> 19 #include <linux/notifier.h> 20 #include <linux/cpu.h> 21 #include <linux/percpu.h> 22 #include <linux/delay.h> 23 #include <linux/err.h> 24 #include <linux/irq.h> 25 #include <linux/of.h> 26 #include <linux/sched/task_stack.h> 27 #include <linux/sched/mm.h> 28 29 #include <asm/cpufeature.h> 30 #include <asm/cpu_ops.h> 31 #include <asm/cpufeature.h> 32 #include <asm/irq.h> 33 #include <asm/mmu_context.h> 34 #include <asm/numa.h> 35 #include <asm/tlbflush.h> 36 #include <asm/sections.h> 37 #include <asm/smp.h> 38 #include <uapi/asm/hwcap.h> 39 #include <asm/vector.h> 40 41 #include "head.h" 42 43 static DECLARE_COMPLETION(cpu_running); 44 45 void __init smp_prepare_boot_cpu(void) 46 { 47 } 48 49 void __init smp_prepare_cpus(unsigned int max_cpus) 50 { 51 int cpuid; 52 int ret; 53 unsigned int curr_cpuid; 54 55 init_cpu_topology(); 56 57 curr_cpuid = smp_processor_id(); 58 store_cpu_topology(curr_cpuid); 59 numa_store_cpu_info(curr_cpuid); 60 numa_add_cpu(curr_cpuid); 61 62 /* This covers non-smp usecase mandated by "nosmp" option */ 63 if (max_cpus == 0) 64 return; 65 66 for_each_possible_cpu(cpuid) { 67 if (cpuid == curr_cpuid) 68 continue; 69 if (cpu_ops[cpuid]->cpu_prepare) { 70 ret = cpu_ops[cpuid]->cpu_prepare(cpuid); 71 if (ret) 72 continue; 73 } 74 set_cpu_present(cpuid, true); 75 numa_store_cpu_info(cpuid); 76 } 77 } 78 79 #ifdef CONFIG_ACPI 80 static unsigned int cpu_count = 1; 81 82 static int __init acpi_parse_rintc(union acpi_subtable_headers *header, const unsigned long end) 83 { 84 unsigned long hart; 85 static bool found_boot_cpu; 86 struct acpi_madt_rintc *processor = (struct acpi_madt_rintc *)header; 87 88 /* 89 * Each RINTC structure in MADT will have a flag. If ACPI_MADT_ENABLED 90 * bit in the flag is not enabled, it means OS should not try to enable 91 * the cpu to which RINTC belongs. 92 */ 93 if (!(processor->flags & ACPI_MADT_ENABLED)) 94 return 0; 95 96 if (BAD_MADT_ENTRY(processor, end)) 97 return -EINVAL; 98 99 acpi_table_print_madt_entry(&header->common); 100 101 hart = processor->hart_id; 102 if (hart == INVALID_HARTID) { 103 pr_warn("Invalid hartid\n"); 104 return 0; 105 } 106 107 if (hart == cpuid_to_hartid_map(0)) { 108 BUG_ON(found_boot_cpu); 109 found_boot_cpu = true; 110 early_map_cpu_to_node(0, acpi_numa_get_nid(cpu_count)); 111 return 0; 112 } 113 114 if (cpu_count >= NR_CPUS) { 115 pr_warn("NR_CPUS is too small for the number of ACPI tables.\n"); 116 return 0; 117 } 118 119 cpuid_to_hartid_map(cpu_count) = hart; 120 early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count)); 121 cpu_count++; 122 123 return 0; 124 } 125 126 static void __init acpi_parse_and_init_cpus(void) 127 { 128 int cpuid; 129 130 cpu_set_ops(0); 131 132 acpi_table_parse_madt(ACPI_MADT_TYPE_RINTC, acpi_parse_rintc, 0); 133 134 for (cpuid = 1; cpuid < nr_cpu_ids; cpuid++) { 135 if (cpuid_to_hartid_map(cpuid) != INVALID_HARTID) { 136 cpu_set_ops(cpuid); 137 set_cpu_possible(cpuid, true); 138 } 139 } 140 } 141 #else 142 #define acpi_parse_and_init_cpus(...) do { } while (0) 143 #endif 144 145 static void __init of_parse_and_init_cpus(void) 146 { 147 struct device_node *dn; 148 unsigned long hart; 149 bool found_boot_cpu = false; 150 int cpuid = 1; 151 int rc; 152 153 cpu_set_ops(0); 154 155 for_each_of_cpu_node(dn) { 156 rc = riscv_early_of_processor_hartid(dn, &hart); 157 if (rc < 0) 158 continue; 159 160 if (hart == cpuid_to_hartid_map(0)) { 161 BUG_ON(found_boot_cpu); 162 found_boot_cpu = 1; 163 early_map_cpu_to_node(0, of_node_to_nid(dn)); 164 continue; 165 } 166 if (cpuid >= NR_CPUS) { 167 pr_warn("Invalid cpuid [%d] for hartid [%lu]\n", 168 cpuid, hart); 169 continue; 170 } 171 172 cpuid_to_hartid_map(cpuid) = hart; 173 early_map_cpu_to_node(cpuid, of_node_to_nid(dn)); 174 cpuid++; 175 } 176 177 BUG_ON(!found_boot_cpu); 178 179 if (cpuid > nr_cpu_ids) 180 pr_warn("Total number of cpus [%d] is greater than nr_cpus option value [%d]\n", 181 cpuid, nr_cpu_ids); 182 183 for (cpuid = 1; cpuid < nr_cpu_ids; cpuid++) { 184 if (cpuid_to_hartid_map(cpuid) != INVALID_HARTID) { 185 cpu_set_ops(cpuid); 186 set_cpu_possible(cpuid, true); 187 } 188 } 189 } 190 191 void __init setup_smp(void) 192 { 193 if (acpi_disabled) 194 of_parse_and_init_cpus(); 195 else 196 acpi_parse_and_init_cpus(); 197 } 198 199 static int start_secondary_cpu(int cpu, struct task_struct *tidle) 200 { 201 if (cpu_ops[cpu]->cpu_start) 202 return cpu_ops[cpu]->cpu_start(cpu, tidle); 203 204 return -EOPNOTSUPP; 205 } 206 207 int __cpu_up(unsigned int cpu, struct task_struct *tidle) 208 { 209 int ret = 0; 210 tidle->thread_info.cpu = cpu; 211 212 ret = start_secondary_cpu(cpu, tidle); 213 if (!ret) { 214 wait_for_completion_timeout(&cpu_running, 215 msecs_to_jiffies(1000)); 216 217 if (!cpu_online(cpu)) { 218 pr_crit("CPU%u: failed to come online\n", cpu); 219 ret = -EIO; 220 } 221 } else { 222 pr_crit("CPU%u: failed to start\n", cpu); 223 } 224 225 return ret; 226 } 227 228 void __init smp_cpus_done(unsigned int max_cpus) 229 { 230 } 231 232 /* 233 * C entry point for a secondary processor. 234 */ 235 asmlinkage __visible void smp_callin(void) 236 { 237 struct mm_struct *mm = &init_mm; 238 unsigned int curr_cpuid = smp_processor_id(); 239 240 /* All kernel threads share the same mm context. */ 241 mmgrab(mm); 242 current->active_mm = mm; 243 244 store_cpu_topology(curr_cpuid); 245 notify_cpu_starting(curr_cpuid); 246 247 riscv_ipi_enable(); 248 249 numa_add_cpu(curr_cpuid); 250 set_cpu_online(curr_cpuid, 1); 251 check_unaligned_access(curr_cpuid); 252 253 if (has_vector()) { 254 if (riscv_v_setup_vsize()) 255 elf_hwcap &= ~COMPAT_HWCAP_ISA_V; 256 } 257 258 riscv_user_isa_enable(); 259 260 /* 261 * Remote TLB flushes are ignored while the CPU is offline, so emit 262 * a local TLB flush right now just in case. 263 */ 264 local_flush_tlb_all(); 265 complete(&cpu_running); 266 /* 267 * Disable preemption before enabling interrupts, so we don't try to 268 * schedule a CPU that hasn't actually started yet. 269 */ 270 local_irq_enable(); 271 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 272 } 273