xref: /linux/arch/riscv/kernel/smp.c (revision 1b0975ee3bdd3eb19a47371c26fd7ef8f7f6b599)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * SMP initialisation and IPI support
4  * Based on arch/arm64/kernel/smp.c
5  *
6  * Copyright (C) 2012 ARM Ltd.
7  * Copyright (C) 2015 Regents of the University of California
8  * Copyright (C) 2017 SiFive
9  */
10 
11 #include <linux/cpu.h>
12 #include <linux/clockchips.h>
13 #include <linux/interrupt.h>
14 #include <linux/module.h>
15 #include <linux/kexec.h>
16 #include <linux/percpu.h>
17 #include <linux/profile.h>
18 #include <linux/smp.h>
19 #include <linux/sched.h>
20 #include <linux/seq_file.h>
21 #include <linux/delay.h>
22 #include <linux/irq.h>
23 #include <linux/irq_work.h>
24 
25 #include <asm/tlbflush.h>
26 #include <asm/cacheflush.h>
27 #include <asm/cpu_ops.h>
28 
29 enum ipi_message_type {
30 	IPI_RESCHEDULE,
31 	IPI_CALL_FUNC,
32 	IPI_CPU_STOP,
33 	IPI_CPU_CRASH_STOP,
34 	IPI_IRQ_WORK,
35 	IPI_TIMER,
36 	IPI_MAX
37 };
38 
39 unsigned long __cpuid_to_hartid_map[NR_CPUS] __ro_after_init = {
40 	[0 ... NR_CPUS-1] = INVALID_HARTID
41 };
42 
43 void __init smp_setup_processor_id(void)
44 {
45 	cpuid_to_hartid_map(0) = boot_cpu_hartid;
46 }
47 
48 static DEFINE_PER_CPU_READ_MOSTLY(int, ipi_dummy_dev);
49 static int ipi_virq_base __ro_after_init;
50 static int nr_ipi __ro_after_init = IPI_MAX;
51 static struct irq_desc *ipi_desc[IPI_MAX] __read_mostly;
52 
53 int riscv_hartid_to_cpuid(unsigned long hartid)
54 {
55 	int i;
56 
57 	for (i = 0; i < NR_CPUS; i++)
58 		if (cpuid_to_hartid_map(i) == hartid)
59 			return i;
60 
61 	return -ENOENT;
62 }
63 
64 bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
65 {
66 	return phys_id == cpuid_to_hartid_map(cpu);
67 }
68 
69 static void ipi_stop(void)
70 {
71 	set_cpu_online(smp_processor_id(), false);
72 	while (1)
73 		wait_for_interrupt();
74 }
75 
76 #ifdef CONFIG_KEXEC_CORE
77 static atomic_t waiting_for_crash_ipi = ATOMIC_INIT(0);
78 
79 static inline void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
80 {
81 	crash_save_cpu(regs, cpu);
82 
83 	atomic_dec(&waiting_for_crash_ipi);
84 
85 	local_irq_disable();
86 
87 #ifdef CONFIG_HOTPLUG_CPU
88 	if (cpu_has_hotplug(cpu))
89 		cpu_ops[cpu]->cpu_stop();
90 #endif
91 
92 	for(;;)
93 		wait_for_interrupt();
94 }
95 #else
96 static inline void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
97 {
98 	unreachable();
99 }
100 #endif
101 
102 static void send_ipi_mask(const struct cpumask *mask, enum ipi_message_type op)
103 {
104 	__ipi_send_mask(ipi_desc[op], mask);
105 }
106 
107 static void send_ipi_single(int cpu, enum ipi_message_type op)
108 {
109 	__ipi_send_mask(ipi_desc[op], cpumask_of(cpu));
110 }
111 
112 #ifdef CONFIG_IRQ_WORK
113 void arch_irq_work_raise(void)
114 {
115 	send_ipi_single(smp_processor_id(), IPI_IRQ_WORK);
116 }
117 #endif
118 
119 static irqreturn_t handle_IPI(int irq, void *data)
120 {
121 	int ipi = irq - ipi_virq_base;
122 
123 	switch (ipi) {
124 	case IPI_RESCHEDULE:
125 		scheduler_ipi();
126 		break;
127 	case IPI_CALL_FUNC:
128 		generic_smp_call_function_interrupt();
129 		break;
130 	case IPI_CPU_STOP:
131 		ipi_stop();
132 		break;
133 	case IPI_CPU_CRASH_STOP:
134 		ipi_cpu_crash_stop(smp_processor_id(), get_irq_regs());
135 		break;
136 	case IPI_IRQ_WORK:
137 		irq_work_run();
138 		break;
139 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
140 	case IPI_TIMER:
141 		tick_receive_broadcast();
142 		break;
143 #endif
144 	default:
145 		pr_warn("CPU%d: unhandled IPI%d\n", smp_processor_id(), ipi);
146 		break;
147 	}
148 
149 	return IRQ_HANDLED;
150 }
151 
152 void riscv_ipi_enable(void)
153 {
154 	int i;
155 
156 	if (WARN_ON_ONCE(!ipi_virq_base))
157 		return;
158 
159 	for (i = 0; i < nr_ipi; i++)
160 		enable_percpu_irq(ipi_virq_base + i, 0);
161 }
162 
163 void riscv_ipi_disable(void)
164 {
165 	int i;
166 
167 	if (WARN_ON_ONCE(!ipi_virq_base))
168 		return;
169 
170 	for (i = 0; i < nr_ipi; i++)
171 		disable_percpu_irq(ipi_virq_base + i);
172 }
173 
174 bool riscv_ipi_have_virq_range(void)
175 {
176 	return (ipi_virq_base) ? true : false;
177 }
178 
179 DEFINE_STATIC_KEY_FALSE(riscv_ipi_for_rfence);
180 EXPORT_SYMBOL_GPL(riscv_ipi_for_rfence);
181 
182 void riscv_ipi_set_virq_range(int virq, int nr, bool use_for_rfence)
183 {
184 	int i, err;
185 
186 	if (WARN_ON(ipi_virq_base))
187 		return;
188 
189 	WARN_ON(nr < IPI_MAX);
190 	nr_ipi = min(nr, IPI_MAX);
191 	ipi_virq_base = virq;
192 
193 	/* Request IPIs */
194 	for (i = 0; i < nr_ipi; i++) {
195 		err = request_percpu_irq(ipi_virq_base + i, handle_IPI,
196 					 "IPI", &ipi_dummy_dev);
197 		WARN_ON(err);
198 
199 		ipi_desc[i] = irq_to_desc(ipi_virq_base + i);
200 		irq_set_status_flags(ipi_virq_base + i, IRQ_HIDDEN);
201 	}
202 
203 	/* Enabled IPIs for boot CPU immediately */
204 	riscv_ipi_enable();
205 
206 	/* Update RFENCE static key */
207 	if (use_for_rfence)
208 		static_branch_enable(&riscv_ipi_for_rfence);
209 	else
210 		static_branch_disable(&riscv_ipi_for_rfence);
211 }
212 
213 static const char * const ipi_names[] = {
214 	[IPI_RESCHEDULE]	= "Rescheduling interrupts",
215 	[IPI_CALL_FUNC]		= "Function call interrupts",
216 	[IPI_CPU_STOP]		= "CPU stop interrupts",
217 	[IPI_CPU_CRASH_STOP]	= "CPU stop (for crash dump) interrupts",
218 	[IPI_IRQ_WORK]		= "IRQ work interrupts",
219 	[IPI_TIMER]		= "Timer broadcast interrupts",
220 };
221 
222 void show_ipi_stats(struct seq_file *p, int prec)
223 {
224 	unsigned int cpu, i;
225 
226 	for (i = 0; i < IPI_MAX; i++) {
227 		seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
228 			   prec >= 4 ? " " : "");
229 		for_each_online_cpu(cpu)
230 			seq_printf(p, "%10u ", irq_desc_kstat_cpu(ipi_desc[i], cpu));
231 		seq_printf(p, " %s\n", ipi_names[i]);
232 	}
233 }
234 
235 void arch_send_call_function_ipi_mask(struct cpumask *mask)
236 {
237 	send_ipi_mask(mask, IPI_CALL_FUNC);
238 }
239 
240 void arch_send_call_function_single_ipi(int cpu)
241 {
242 	send_ipi_single(cpu, IPI_CALL_FUNC);
243 }
244 
245 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
246 void tick_broadcast(const struct cpumask *mask)
247 {
248 	send_ipi_mask(mask, IPI_TIMER);
249 }
250 #endif
251 
252 void smp_send_stop(void)
253 {
254 	unsigned long timeout;
255 
256 	if (num_online_cpus() > 1) {
257 		cpumask_t mask;
258 
259 		cpumask_copy(&mask, cpu_online_mask);
260 		cpumask_clear_cpu(smp_processor_id(), &mask);
261 
262 		if (system_state <= SYSTEM_RUNNING)
263 			pr_crit("SMP: stopping secondary CPUs\n");
264 		send_ipi_mask(&mask, IPI_CPU_STOP);
265 	}
266 
267 	/* Wait up to one second for other CPUs to stop */
268 	timeout = USEC_PER_SEC;
269 	while (num_online_cpus() > 1 && timeout--)
270 		udelay(1);
271 
272 	if (num_online_cpus() > 1)
273 		pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
274 			   cpumask_pr_args(cpu_online_mask));
275 }
276 
277 #ifdef CONFIG_KEXEC_CORE
278 /*
279  * The number of CPUs online, not counting this CPU (which may not be
280  * fully online and so not counted in num_online_cpus()).
281  */
282 static inline unsigned int num_other_online_cpus(void)
283 {
284 	unsigned int this_cpu_online = cpu_online(smp_processor_id());
285 
286 	return num_online_cpus() - this_cpu_online;
287 }
288 
289 void crash_smp_send_stop(void)
290 {
291 	static int cpus_stopped;
292 	cpumask_t mask;
293 	unsigned long timeout;
294 
295 	/*
296 	 * This function can be called twice in panic path, but obviously
297 	 * we execute this only once.
298 	 */
299 	if (cpus_stopped)
300 		return;
301 
302 	cpus_stopped = 1;
303 
304 	/*
305 	 * If this cpu is the only one alive at this point in time, online or
306 	 * not, there are no stop messages to be sent around, so just back out.
307 	 */
308 	if (num_other_online_cpus() == 0)
309 		return;
310 
311 	cpumask_copy(&mask, cpu_online_mask);
312 	cpumask_clear_cpu(smp_processor_id(), &mask);
313 
314 	atomic_set(&waiting_for_crash_ipi, num_other_online_cpus());
315 
316 	pr_crit("SMP: stopping secondary CPUs\n");
317 	send_ipi_mask(&mask, IPI_CPU_CRASH_STOP);
318 
319 	/* Wait up to one second for other CPUs to stop */
320 	timeout = USEC_PER_SEC;
321 	while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--)
322 		udelay(1);
323 
324 	if (atomic_read(&waiting_for_crash_ipi) > 0)
325 		pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
326 			cpumask_pr_args(&mask));
327 }
328 
329 bool smp_crash_stop_failed(void)
330 {
331 	return (atomic_read(&waiting_for_crash_ipi) > 0);
332 }
333 #endif
334 
335 void arch_smp_send_reschedule(int cpu)
336 {
337 	send_ipi_single(cpu, IPI_RESCHEDULE);
338 }
339 EXPORT_SYMBOL_GPL(arch_smp_send_reschedule);
340