xref: /linux/arch/riscv/kernel/probes/decode-insn.c (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0)
1 // SPDX-License-Identifier: GPL-2.0+
2 
3 #include <linux/kernel.h>
4 #include <linux/kprobes.h>
5 #include <linux/module.h>
6 #include <linux/kallsyms.h>
7 #include <asm/sections.h>
8 
9 #include "decode-insn.h"
10 #include "simulate-insn.h"
11 
12 /* Return:
13  *   INSN_REJECTED     If instruction is one not allowed to kprobe,
14  *   INSN_GOOD_NO_SLOT If instruction is supported but doesn't use its slot.
15  */
16 enum probe_insn __kprobes
17 riscv_probe_decode_insn(probe_opcode_t *addr, struct arch_probe_insn *api)
18 {
19 	probe_opcode_t insn = *addr;
20 
21 	/*
22 	 * Reject instructions list:
23 	 */
24 	RISCV_INSN_REJECTED(system,		insn);
25 	RISCV_INSN_REJECTED(fence,		insn);
26 
27 	/*
28 	 * Simulate instructions list:
29 	 * TODO: the REJECTED ones below need to be implemented
30 	 */
31 #ifdef CONFIG_RISCV_ISA_C
32 	RISCV_INSN_REJECTED(c_jal,		insn);
33 	RISCV_INSN_REJECTED(c_ebreak,		insn);
34 
35 	RISCV_INSN_SET_SIMULATE(c_j,		insn);
36 	RISCV_INSN_SET_SIMULATE(c_jr,		insn);
37 	RISCV_INSN_SET_SIMULATE(c_jalr,		insn);
38 	RISCV_INSN_SET_SIMULATE(c_beqz,		insn);
39 	RISCV_INSN_SET_SIMULATE(c_bnez,		insn);
40 #endif
41 
42 	RISCV_INSN_SET_SIMULATE(jal,		insn);
43 	RISCV_INSN_SET_SIMULATE(jalr,		insn);
44 	RISCV_INSN_SET_SIMULATE(auipc,		insn);
45 	RISCV_INSN_SET_SIMULATE(branch,		insn);
46 
47 	return INSN_GOOD;
48 }
49