xref: /linux/arch/riscv/kernel/hibernate-asm.S (revision 122333d6bd229af279cdb35d1b874b71b3b9ccfb)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Hibernation low level support for RISCV.
4 *
5 * Copyright (C) 2023 StarFive Technology Co., Ltd.
6 *
7 * Author: Jee Heng Sia <jeeheng.sia@starfivetech.com>
8 */
9
10#include <asm/asm.h>
11#include <asm/asm-offsets.h>
12#include <asm/assembler.h>
13#include <asm/csr.h>
14
15#include <linux/linkage.h>
16
17/*
18 * int __hibernate_cpu_resume(void)
19 * Switch back to the hibernated image's page table prior to restoring the CPU
20 * context.
21 *
22 * Always returns 0
23 */
24ENTRY(__hibernate_cpu_resume)
25	/* switch to hibernated image's page table. */
26	csrw CSR_SATP, s0
27	sfence.vma
28
29	REG_L	a0, hibernate_cpu_context
30
31	suspend_restore_csrs
32	suspend_restore_regs
33
34	/* Return zero value. */
35	mv	a0, zero
36
37	ret
38END(__hibernate_cpu_resume)
39
40/*
41 * Prepare to restore the image.
42 * a0: satp of saved page tables.
43 * a1: satp of temporary page tables.
44 * a2: cpu_resume.
45 */
46ENTRY(hibernate_restore_image)
47	mv	s0, a0
48	mv	s1, a1
49	mv	s2, a2
50	REG_L	s4, restore_pblist
51	REG_L	a1, relocated_restore_code
52
53	jalr	a1
54END(hibernate_restore_image)
55
56/*
57 * The below code will be executed from a 'safe' page.
58 * It first switches to the temporary page table, then starts to copy the pages
59 * back to the original memory location. Finally, it jumps to __hibernate_cpu_resume()
60 * to restore the CPU context.
61 */
62ENTRY(hibernate_core_restore_code)
63	/* switch to temp page table. */
64	csrw satp, s1
65	sfence.vma
66.Lcopy:
67	/* The below code will restore the hibernated image. */
68	REG_L	a1, HIBERN_PBE_ADDR(s4)
69	REG_L	a0, HIBERN_PBE_ORIG(s4)
70
71	copy_page a0, a1
72
73	REG_L	s4, HIBERN_PBE_NEXT(s4)
74	bnez	s4, .Lcopy
75
76	jalr	s2
77END(hibernate_core_restore_code)
78