xref: /linux/arch/riscv/kernel/cpu_ops.c (revision 07f0148aafe8c95a3a76cd59e9e75b4d78d1d31d)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2020 Western Digital Corporation or its affiliates.
4  */
5 
6 #include <linux/errno.h>
7 #include <linux/mm.h>
8 #include <linux/of.h>
9 #include <linux/string.h>
10 #include <linux/sched.h>
11 #include <asm/cpu_ops.h>
12 #include <asm/cpu_ops_sbi.h>
13 #include <asm/sbi.h>
14 #include <asm/smp.h>
15 
16 const struct cpu_operations *cpu_ops[NR_CPUS] __ro_after_init;
17 
18 extern const struct cpu_operations cpu_ops_sbi;
19 #ifndef CONFIG_RISCV_BOOT_SPINWAIT
20 const struct cpu_operations cpu_ops_spinwait = {
21 	.name		= "",
22 	.cpu_prepare	= NULL,
23 	.cpu_start	= NULL,
24 };
25 #endif
26 
27 void __init cpu_set_ops(int cpuid)
28 {
29 #if IS_ENABLED(CONFIG_RISCV_SBI)
30 	if (sbi_probe_extension(SBI_EXT_HSM) > 0) {
31 		if (!cpuid)
32 			pr_info("SBI HSM extension detected\n");
33 		cpu_ops[cpuid] = &cpu_ops_sbi;
34 	} else
35 #endif
36 		cpu_ops[cpuid] = &cpu_ops_spinwait;
37 }
38