1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * alternative runtime patching 4 * inspired by the ARM64 and x86 version 5 * 6 * Copyright (C) 2021 Sifive. 7 */ 8 9 #include <linux/init.h> 10 #include <linux/module.h> 11 #include <linux/cpu.h> 12 #include <linux/uaccess.h> 13 #include <asm/alternative.h> 14 #include <asm/module.h> 15 #include <asm/sections.h> 16 #include <asm/vdso.h> 17 #include <asm/vendorid_list.h> 18 #include <asm/sbi.h> 19 #include <asm/csr.h> 20 #include <asm/insn.h> 21 #include <asm/patch.h> 22 23 struct cpu_manufacturer_info_t { 24 unsigned long vendor_id; 25 unsigned long arch_id; 26 unsigned long imp_id; 27 void (*patch_func)(struct alt_entry *begin, struct alt_entry *end, 28 unsigned long archid, unsigned long impid, 29 unsigned int stage); 30 }; 31 32 static void __init_or_module riscv_fill_cpu_mfr_info(struct cpu_manufacturer_info_t *cpu_mfr_info) 33 { 34 #ifdef CONFIG_RISCV_M_MODE 35 cpu_mfr_info->vendor_id = csr_read(CSR_MVENDORID); 36 cpu_mfr_info->arch_id = csr_read(CSR_MARCHID); 37 cpu_mfr_info->imp_id = csr_read(CSR_MIMPID); 38 #else 39 cpu_mfr_info->vendor_id = sbi_get_mvendorid(); 40 cpu_mfr_info->arch_id = sbi_get_marchid(); 41 cpu_mfr_info->imp_id = sbi_get_mimpid(); 42 #endif 43 44 switch (cpu_mfr_info->vendor_id) { 45 #ifdef CONFIG_ERRATA_SIFIVE 46 case SIFIVE_VENDOR_ID: 47 cpu_mfr_info->patch_func = sifive_errata_patch_func; 48 break; 49 #endif 50 #ifdef CONFIG_ERRATA_THEAD 51 case THEAD_VENDOR_ID: 52 cpu_mfr_info->patch_func = thead_errata_patch_func; 53 break; 54 #endif 55 default: 56 cpu_mfr_info->patch_func = NULL; 57 } 58 } 59 60 static u32 riscv_instruction_at(void *p) 61 { 62 u16 *parcel = p; 63 64 return (u32)parcel[0] | (u32)parcel[1] << 16; 65 } 66 67 static void riscv_alternative_fix_auipc_jalr(void *ptr, u32 auipc_insn, 68 u32 jalr_insn, int patch_offset) 69 { 70 u32 call[2] = { auipc_insn, jalr_insn }; 71 s32 imm; 72 73 /* get and adjust new target address */ 74 imm = riscv_insn_extract_utype_itype_imm(auipc_insn, jalr_insn); 75 imm -= patch_offset; 76 77 /* update instructions */ 78 riscv_insn_insert_utype_itype_imm(&call[0], &call[1], imm); 79 80 /* patch the call place again */ 81 patch_text_nosync(ptr, call, sizeof(u32) * 2); 82 } 83 84 static void riscv_alternative_fix_jal(void *ptr, u32 jal_insn, int patch_offset) 85 { 86 s32 imm; 87 88 /* get and adjust new target address */ 89 imm = riscv_insn_extract_jtype_imm(jal_insn); 90 imm -= patch_offset; 91 92 /* update instruction */ 93 riscv_insn_insert_jtype_imm(&jal_insn, imm); 94 95 /* patch the call place again */ 96 patch_text_nosync(ptr, &jal_insn, sizeof(u32)); 97 } 98 99 void riscv_alternative_fix_offsets(void *alt_ptr, unsigned int len, 100 int patch_offset) 101 { 102 int num_insn = len / sizeof(u32); 103 int i; 104 105 for (i = 0; i < num_insn; i++) { 106 u32 insn = riscv_instruction_at(alt_ptr + i * sizeof(u32)); 107 108 /* 109 * May be the start of an auipc + jalr pair 110 * Needs to check that at least one more instruction 111 * is in the list. 112 */ 113 if (riscv_insn_is_auipc(insn) && i < num_insn - 1) { 114 u32 insn2 = riscv_instruction_at(alt_ptr + (i + 1) * sizeof(u32)); 115 116 if (!riscv_insn_is_jalr(insn2)) 117 continue; 118 119 /* if instruction pair is a call, it will use the ra register */ 120 if (RV_EXTRACT_RD_REG(insn) != 1) 121 continue; 122 123 riscv_alternative_fix_auipc_jalr(alt_ptr + i * sizeof(u32), 124 insn, insn2, patch_offset); 125 i++; 126 } 127 128 if (riscv_insn_is_jal(insn)) { 129 s32 imm = riscv_insn_extract_jtype_imm(insn); 130 131 /* Don't modify jumps inside the alternative block */ 132 if ((alt_ptr + i * sizeof(u32) + imm) >= alt_ptr && 133 (alt_ptr + i * sizeof(u32) + imm) < (alt_ptr + len)) 134 continue; 135 136 riscv_alternative_fix_jal(alt_ptr + i * sizeof(u32), 137 insn, patch_offset); 138 } 139 } 140 } 141 142 /* 143 * This is called very early in the boot process (directly after we run 144 * a feature detect on the boot CPU). No need to worry about other CPUs 145 * here. 146 */ 147 static void __init_or_module _apply_alternatives(struct alt_entry *begin, 148 struct alt_entry *end, 149 unsigned int stage) 150 { 151 struct cpu_manufacturer_info_t cpu_mfr_info; 152 153 riscv_fill_cpu_mfr_info(&cpu_mfr_info); 154 155 riscv_cpufeature_patch_func(begin, end, stage); 156 157 if (!cpu_mfr_info.patch_func) 158 return; 159 160 cpu_mfr_info.patch_func(begin, end, 161 cpu_mfr_info.arch_id, 162 cpu_mfr_info.imp_id, 163 stage); 164 } 165 166 #ifdef CONFIG_MMU 167 static void __init apply_vdso_alternatives(void) 168 { 169 const Elf_Ehdr *hdr; 170 const Elf_Shdr *shdr; 171 const Elf_Shdr *alt; 172 struct alt_entry *begin, *end; 173 174 hdr = (Elf_Ehdr *)vdso_start; 175 shdr = (void *)hdr + hdr->e_shoff; 176 alt = find_section(hdr, shdr, ".alternative"); 177 if (!alt) 178 return; 179 180 begin = (void *)hdr + alt->sh_offset, 181 end = (void *)hdr + alt->sh_offset + alt->sh_size, 182 183 _apply_alternatives((struct alt_entry *)begin, 184 (struct alt_entry *)end, 185 RISCV_ALTERNATIVES_BOOT); 186 } 187 #else 188 static void __init apply_vdso_alternatives(void) { } 189 #endif 190 191 void __init apply_boot_alternatives(void) 192 { 193 /* If called on non-boot cpu things could go wrong */ 194 WARN_ON(smp_processor_id() != 0); 195 196 _apply_alternatives((struct alt_entry *)__alt_start, 197 (struct alt_entry *)__alt_end, 198 RISCV_ALTERNATIVES_BOOT); 199 200 apply_vdso_alternatives(); 201 } 202 203 /* 204 * apply_early_boot_alternatives() is called from setup_vm() with MMU-off. 205 * 206 * Following requirements should be honoured for it to work correctly: 207 * 1) It should use PC-relative addressing for accessing kernel symbols. 208 * To achieve this we always use GCC cmodel=medany. 209 * 2) The compiler instrumentation for FTRACE will not work for setup_vm() 210 * so disable compiler instrumentation when FTRACE is enabled. 211 * 212 * Currently, the above requirements are honoured by using custom CFLAGS 213 * for alternative.o in kernel/Makefile. 214 */ 215 void __init apply_early_boot_alternatives(void) 216 { 217 #ifdef CONFIG_RISCV_ALTERNATIVE_EARLY 218 _apply_alternatives((struct alt_entry *)__alt_start, 219 (struct alt_entry *)__alt_end, 220 RISCV_ALTERNATIVES_EARLY_BOOT); 221 #endif 222 } 223 224 #ifdef CONFIG_MODULES 225 void apply_module_alternatives(void *start, size_t length) 226 { 227 _apply_alternatives((struct alt_entry *)start, 228 (struct alt_entry *)(start + length), 229 RISCV_ALTERNATIVES_MODULE); 230 } 231 #endif 232