xref: /linux/arch/riscv/include/uapi/asm/hwprobe.h (revision 5b179fe052334ea81c9f1841bf782bb0878b61d2)
1ea3de9ceSEvan Green /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2ea3de9ceSEvan Green /*
3ea3de9ceSEvan Green  * Copyright 2023 Rivos, Inc
4ea3de9ceSEvan Green  */
5ea3de9ceSEvan Green 
6ea3de9ceSEvan Green #ifndef _UAPI_ASM_HWPROBE_H
7ea3de9ceSEvan Green #define _UAPI_ASM_HWPROBE_H
8ea3de9ceSEvan Green 
9ea3de9ceSEvan Green #include <linux/types.h>
10ea3de9ceSEvan Green 
11ea3de9ceSEvan Green /*
12ea3de9ceSEvan Green  * Interface for probing hardware capabilities from userspace, see
13ed843ae9SCosta Shulyupin  * Documentation/arch/riscv/hwprobe.rst for more information.
14ea3de9ceSEvan Green  */
15ea3de9ceSEvan Green struct riscv_hwprobe {
16ea3de9ceSEvan Green 	__s64 key;
17ea3de9ceSEvan Green 	__u64 value;
18ea3de9ceSEvan Green };
19ea3de9ceSEvan Green 
20ea3de9ceSEvan Green #define RISCV_HWPROBE_KEY_MVENDORID	0
21ea3de9ceSEvan Green #define RISCV_HWPROBE_KEY_MARCHID	1
22ea3de9ceSEvan Green #define RISCV_HWPROBE_KEY_MIMPID	2
2300e76e2cSEvan Green #define RISCV_HWPROBE_KEY_BASE_BEHAVIOR	3
2400e76e2cSEvan Green #define		RISCV_HWPROBE_BASE_BEHAVIOR_IMA	(1 << 0)
2500e76e2cSEvan Green #define RISCV_HWPROBE_KEY_IMA_EXT_0	4
2600e76e2cSEvan Green #define		RISCV_HWPROBE_IMA_FD		(1 << 0)
2700e76e2cSEvan Green #define		RISCV_HWPROBE_IMA_C		(1 << 1)
28162e4df1SAndy Chiu #define		RISCV_HWPROBE_IMA_V		(1 << 2)
2916252e01SPalmer Dabbelt #define		RISCV_HWPROBE_EXT_ZBA		(1 << 3)
3016252e01SPalmer Dabbelt #define		RISCV_HWPROBE_EXT_ZBB		(1 << 4)
3116252e01SPalmer Dabbelt #define		RISCV_HWPROBE_EXT_ZBS		(1 << 5)
329c7646d5SAndrew Jones #define		RISCV_HWPROBE_EXT_ZICBOZ	(1 << 6)
33be6bef2aSClément Léger #define		RISCV_HWPROBE_EXT_ZBC		(1 << 7)
34794983f2SClément Léger #define		RISCV_HWPROBE_EXT_ZBKB		(1 << 8)
35794983f2SClément Léger #define		RISCV_HWPROBE_EXT_ZBKC		(1 << 9)
36794983f2SClément Léger #define		RISCV_HWPROBE_EXT_ZBKX		(1 << 10)
37794983f2SClément Léger #define		RISCV_HWPROBE_EXT_ZKND		(1 << 11)
38794983f2SClément Léger #define		RISCV_HWPROBE_EXT_ZKNE		(1 << 12)
39794983f2SClément Léger #define		RISCV_HWPROBE_EXT_ZKNH		(1 << 13)
40794983f2SClément Léger #define		RISCV_HWPROBE_EXT_ZKSED		(1 << 14)
41794983f2SClément Léger #define		RISCV_HWPROBE_EXT_ZKSH		(1 << 15)
42794983f2SClément Léger #define		RISCV_HWPROBE_EXT_ZKT		(1 << 16)
43ca35b5b1SClément Léger #define		RISCV_HWPROBE_EXT_ZVBB		(1 << 17)
44ca35b5b1SClément Léger #define		RISCV_HWPROBE_EXT_ZVBC		(1 << 18)
45ca35b5b1SClément Léger #define		RISCV_HWPROBE_EXT_ZVKB		(1 << 19)
46ca35b5b1SClément Léger #define		RISCV_HWPROBE_EXT_ZVKG		(1 << 20)
47ca35b5b1SClément Léger #define		RISCV_HWPROBE_EXT_ZVKNED	(1 << 21)
48ca35b5b1SClément Léger #define		RISCV_HWPROBE_EXT_ZVKNHA	(1 << 22)
49ca35b5b1SClément Léger #define		RISCV_HWPROBE_EXT_ZVKNHB	(1 << 23)
50ca35b5b1SClément Léger #define		RISCV_HWPROBE_EXT_ZVKSED	(1 << 24)
51ca35b5b1SClément Léger #define		RISCV_HWPROBE_EXT_ZVKSH		(1 << 25)
52ca35b5b1SClément Léger #define		RISCV_HWPROBE_EXT_ZVKT		(1 << 26)
53bf4cd841SClément Léger #define		RISCV_HWPROBE_EXT_ZFH		(1 << 27)
54bf4cd841SClément Léger #define		RISCV_HWPROBE_EXT_ZFHMIN	(1 << 28)
5574ba42b2SClément Léger #define		RISCV_HWPROBE_EXT_ZIHINTNTL	(1 << 29)
565dadda5eSClément Léger #define		RISCV_HWPROBE_EXT_ZVFH		(1 << 30)
575ea6764dSClément Léger #define		RISCV_HWPROBE_EXT_ZVFHMIN	(1ULL << 31)
58dc6ccb21SClément Léger #define		RISCV_HWPROBE_EXT_ZFA		(1ULL << 32)
595b4d64a8SClément Léger #define		RISCV_HWPROBE_EXT_ZTSO		(1ULL << 33)
60154a3706SClément Léger #define		RISCV_HWPROBE_EXT_ZACAS		(1ULL << 34)
613359866bSClément Léger #define		RISCV_HWPROBE_EXT_ZICOND	(1ULL << 35)
6263f93a3cSClément Léger #define		RISCV_HWPROBE_EXT_ZIHINTPAUSE	(1ULL << 36)
63de8f8282SAndy Chiu #define		RISCV_HWPROBE_EXT_ZVE32X	(1ULL << 37)
64de8f8282SAndy Chiu #define		RISCV_HWPROBE_EXT_ZVE32F	(1ULL << 38)
65de8f8282SAndy Chiu #define		RISCV_HWPROBE_EXT_ZVE64X	(1ULL << 39)
66de8f8282SAndy Chiu #define		RISCV_HWPROBE_EXT_ZVE64F	(1ULL << 40)
67de8f8282SAndy Chiu #define		RISCV_HWPROBE_EXT_ZVE64D	(1ULL << 41)
6836f8960dSClément Léger #define		RISCV_HWPROBE_EXT_ZIMOP		(1ULL << 42)
690ad70db5SClément Léger #define		RISCV_HWPROBE_EXT_ZCA		(1ULL << 43)
700ad70db5SClément Léger #define		RISCV_HWPROBE_EXT_ZCB		(1ULL << 44)
710ad70db5SClément Léger #define		RISCV_HWPROBE_EXT_ZCD		(1ULL << 45)
720ad70db5SClément Léger #define		RISCV_HWPROBE_EXT_ZCF		(1ULL << 46)
73fc078ea3SClément Léger #define		RISCV_HWPROBE_EXT_ZCMOP		(1ULL << 47)
74244c18fbSAndrew Jones #define		RISCV_HWPROBE_EXT_ZAWRS		(1ULL << 48)
7562a31d6eSEvan Green #define RISCV_HWPROBE_KEY_CPUPERF_0	5
7662a31d6eSEvan Green #define		RISCV_HWPROBE_MISALIGNED_UNKNOWN	(0 << 0)
7762a31d6eSEvan Green #define		RISCV_HWPROBE_MISALIGNED_EMULATED	(1 << 0)
7862a31d6eSEvan Green #define		RISCV_HWPROBE_MISALIGNED_SLOW		(2 << 0)
7962a31d6eSEvan Green #define		RISCV_HWPROBE_MISALIGNED_FAST		(3 << 0)
8062a31d6eSEvan Green #define		RISCV_HWPROBE_MISALIGNED_UNSUPPORTED	(4 << 0)
8162a31d6eSEvan Green #define		RISCV_HWPROBE_MISALIGNED_MASK		(7 << 0)
829c7646d5SAndrew Jones #define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE	6
83c9b8cd13SClément Léger #define RISCV_HWPROBE_KEY_HIGHEST_VIRT_ADDRESS	7
8452420e48SPalmer Dabbelt #define RISCV_HWPROBE_KEY_TIME_CSR_FREQ	8
85c42e2f07SEvan Green #define RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF	9
86*1f528887SEvan Green #define		RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN		0
87*1f528887SEvan Green #define		RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED	1
88*1f528887SEvan Green #define		RISCV_HWPROBE_MISALIGNED_SCALAR_SLOW		2
89*1f528887SEvan Green #define		RISCV_HWPROBE_MISALIGNED_SCALAR_FAST		3
90*1f528887SEvan Green #define		RISCV_HWPROBE_MISALIGNED_SCALAR_UNSUPPORTED	4
91ea3de9ceSEvan Green /* Increase RISCV_HWPROBE_MAX_KEY when adding items. */
92ea3de9ceSEvan Green 
93e178bf14SAndrew Jones /* Flags */
94e178bf14SAndrew Jones #define RISCV_HWPROBE_WHICH_CPUS	(1 << 0)
95e178bf14SAndrew Jones 
96ea3de9ceSEvan Green #endif
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