1ad5d1122SVincent Chen /* SPDX-License-Identifier: GPL-2.0-only */ 2ad5d1122SVincent Chen #ifndef __ASM_VDSO_PROCESSOR_H 3ad5d1122SVincent Chen #define __ASM_VDSO_PROCESSOR_H 4ad5d1122SVincent Chen 5ad5d1122SVincent Chen #ifndef __ASSEMBLY__ 6ad5d1122SVincent Chen 730aca1baSRandy Dunlap #include <asm/barrier.h> 8*6da11157SAndrew Jones #include <asm/insn-def.h> 930aca1baSRandy Dunlap cpu_relax(void)10ad5d1122SVincent Chenstatic inline void cpu_relax(void) 11ad5d1122SVincent Chen { 12ad5d1122SVincent Chen #ifdef __riscv_muldiv 13ad5d1122SVincent Chen int dummy; 14ad5d1122SVincent Chen /* In lieu of a halt instruction, induce a long-latency stall. */ 15ad5d1122SVincent Chen __asm__ __volatile__ ("div %0, %0, zero" : "=r" (dummy)); 16ad5d1122SVincent Chen #endif 173c349eacSPalmer Dabbelt 188eb060e1SDao Lu /* 198eb060e1SDao Lu * Reduce instruction retirement. 208eb060e1SDao Lu * This assumes the PC changes. 218eb060e1SDao Lu */ 22*6da11157SAndrew Jones __asm__ __volatile__ (RISCV_PAUSE); 23ad5d1122SVincent Chen barrier(); 24ad5d1122SVincent Chen } 25ad5d1122SVincent Chen 26ad5d1122SVincent Chen #endif /* __ASSEMBLY__ */ 27ad5d1122SVincent Chen 28ad5d1122SVincent Chen #endif /* __ASM_VDSO_PROCESSOR_H */ 29