xref: /linux/arch/riscv/include/asm/suspend.h (revision 906fd46a65383cd639e5eec72a047efc33045d86)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2021 Western Digital Corporation or its affiliates.
4  * Copyright (c) 2022 Ventana Micro Systems Inc.
5  */
6 
7 #ifndef _ASM_RISCV_SUSPEND_H
8 #define _ASM_RISCV_SUSPEND_H
9 
10 #include <asm/ptrace.h>
11 
12 struct suspend_context {
13 	/* Saved and restored by low-level functions */
14 	struct pt_regs regs;
15 	/* Saved and restored by high-level functions */
16 	unsigned long envcfg;
17 	unsigned long tvec;
18 	unsigned long ie;
19 #ifdef CONFIG_MMU
20 	unsigned long satp;
21 #endif
22 };
23 
24 /*
25  * Used by hibernation core and cleared during resume sequence
26  */
27 extern int in_suspend;
28 
29 /* Low-level CPU suspend entry function */
30 int __cpu_suspend_enter(struct suspend_context *context);
31 
32 /* High-level CPU suspend which will save context and call finish() */
33 int cpu_suspend(unsigned long arg,
34 		int (*finish)(unsigned long arg,
35 			      unsigned long entry,
36 			      unsigned long context));
37 
38 /* Low-level CPU resume entry function */
39 int __cpu_resume_enter(unsigned long hartid, unsigned long context);
40 
41 /* Used to save and restore the CSRs */
42 void suspend_save_csrs(struct suspend_context *context);
43 void suspend_restore_csrs(struct suspend_context *context);
44 
45 /* Low-level API to support hibernation */
46 int swsusp_arch_suspend(void);
47 int swsusp_arch_resume(void);
48 int arch_hibernation_header_save(void *addr, unsigned int max_size);
49 int arch_hibernation_header_restore(void *addr);
50 int __hibernate_cpu_resume(void);
51 
52 /* Used to resume on the CPU we hibernated on */
53 int hibernate_resume_nonboot_cpu_disable(void);
54 
55 asmlinkage void hibernate_restore_image(unsigned long resume_satp, unsigned long satp_temp,
56 					unsigned long cpu_resume);
57 asmlinkage int hibernate_core_restore_code(void);
58 bool riscv_sbi_hsm_is_supported(void);
59 bool riscv_sbi_suspend_state_is_valid(u32 state);
60 int riscv_sbi_hart_suspend(u32 state);
61 #endif
62