xref: /linux/arch/riscv/include/asm/suspend.h (revision 63b13e64a829e7b12fba81fccbea0d5448fc0c24)
1*63b13e64SAnup Patel /* SPDX-License-Identifier: GPL-2.0-only */
2*63b13e64SAnup Patel /*
3*63b13e64SAnup Patel  * Copyright (c) 2021 Western Digital Corporation or its affiliates.
4*63b13e64SAnup Patel  * Copyright (c) 2022 Ventana Micro Systems Inc.
5*63b13e64SAnup Patel  */
6*63b13e64SAnup Patel 
7*63b13e64SAnup Patel #ifndef _ASM_RISCV_SUSPEND_H
8*63b13e64SAnup Patel #define _ASM_RISCV_SUSPEND_H
9*63b13e64SAnup Patel 
10*63b13e64SAnup Patel #include <asm/ptrace.h>
11*63b13e64SAnup Patel 
12*63b13e64SAnup Patel struct suspend_context {
13*63b13e64SAnup Patel 	/* Saved and restored by low-level functions */
14*63b13e64SAnup Patel 	struct pt_regs regs;
15*63b13e64SAnup Patel 	/* Saved and restored by high-level functions */
16*63b13e64SAnup Patel 	unsigned long scratch;
17*63b13e64SAnup Patel 	unsigned long tvec;
18*63b13e64SAnup Patel 	unsigned long ie;
19*63b13e64SAnup Patel #ifdef CONFIG_MMU
20*63b13e64SAnup Patel 	unsigned long satp;
21*63b13e64SAnup Patel #endif
22*63b13e64SAnup Patel };
23*63b13e64SAnup Patel 
24*63b13e64SAnup Patel /* Low-level CPU suspend entry function */
25*63b13e64SAnup Patel int __cpu_suspend_enter(struct suspend_context *context);
26*63b13e64SAnup Patel 
27*63b13e64SAnup Patel /* High-level CPU suspend which will save context and call finish() */
28*63b13e64SAnup Patel int cpu_suspend(unsigned long arg,
29*63b13e64SAnup Patel 		int (*finish)(unsigned long arg,
30*63b13e64SAnup Patel 			      unsigned long entry,
31*63b13e64SAnup Patel 			      unsigned long context));
32*63b13e64SAnup Patel 
33*63b13e64SAnup Patel /* Low-level CPU resume entry function */
34*63b13e64SAnup Patel int __cpu_resume_enter(unsigned long hartid, unsigned long context);
35*63b13e64SAnup Patel 
36*63b13e64SAnup Patel #endif
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