163b13e64SAnup Patel /* SPDX-License-Identifier: GPL-2.0-only */ 263b13e64SAnup Patel /* 363b13e64SAnup Patel * Copyright (c) 2021 Western Digital Corporation or its affiliates. 463b13e64SAnup Patel * Copyright (c) 2022 Ventana Micro Systems Inc. 563b13e64SAnup Patel */ 663b13e64SAnup Patel 763b13e64SAnup Patel #ifndef _ASM_RISCV_SUSPEND_H 863b13e64SAnup Patel #define _ASM_RISCV_SUSPEND_H 963b13e64SAnup Patel 1063b13e64SAnup Patel #include <asm/ptrace.h> 1163b13e64SAnup Patel 1263b13e64SAnup Patel struct suspend_context { 1363b13e64SAnup Patel /* Saved and restored by low-level functions */ 1463b13e64SAnup Patel struct pt_regs regs; 1563b13e64SAnup Patel /* Saved and restored by high-level functions */ 1663b13e64SAnup Patel unsigned long scratch; 1763b13e64SAnup Patel unsigned long tvec; 1863b13e64SAnup Patel unsigned long ie; 1963b13e64SAnup Patel #ifdef CONFIG_MMU 2063b13e64SAnup Patel unsigned long satp; 2163b13e64SAnup Patel #endif 2263b13e64SAnup Patel }; 2363b13e64SAnup Patel 2463b13e64SAnup Patel /* Low-level CPU suspend entry function */ 2563b13e64SAnup Patel int __cpu_suspend_enter(struct suspend_context *context); 2663b13e64SAnup Patel 2763b13e64SAnup Patel /* High-level CPU suspend which will save context and call finish() */ 2863b13e64SAnup Patel int cpu_suspend(unsigned long arg, 2963b13e64SAnup Patel int (*finish)(unsigned long arg, 3063b13e64SAnup Patel unsigned long entry, 3163b13e64SAnup Patel unsigned long context)); 3263b13e64SAnup Patel 3363b13e64SAnup Patel /* Low-level CPU resume entry function */ 3463b13e64SAnup Patel int __cpu_resume_enter(unsigned long hartid, unsigned long context); 3563b13e64SAnup Patel 36*0def12f3SSia Jee Heng /* Used to save and restore the CSRs */ 37*0def12f3SSia Jee Heng void suspend_save_csrs(struct suspend_context *context); 38*0def12f3SSia Jee Heng void suspend_restore_csrs(struct suspend_context *context); 3963b13e64SAnup Patel #endif 40