1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2012 Regents of the University of California 4 */ 5 6 #ifndef _ASM_RISCV_PROCESSOR_H 7 #define _ASM_RISCV_PROCESSOR_H 8 9 #include <linux/const.h> 10 #include <linux/cache.h> 11 #include <linux/prctl.h> 12 13 #include <vdso/processor.h> 14 15 #include <asm/ptrace.h> 16 17 /* 18 * addr is a hint to the maximum userspace address that mmap should provide, so 19 * this macro needs to return the largest address space available so that 20 * mmap_end < addr, being mmap_end the top of that address space. 21 * See Documentation/arch/riscv/vm-layout.rst for more details. 22 */ 23 #define arch_get_mmap_end(addr, len, flags) \ 24 ({ \ 25 unsigned long mmap_end; \ 26 typeof(addr) _addr = (addr); \ 27 if ((_addr) == 0 || is_compat_task() || \ 28 ((_addr + len) > BIT(VA_BITS - 1))) \ 29 mmap_end = STACK_TOP_MAX; \ 30 else \ 31 mmap_end = (_addr + len); \ 32 mmap_end; \ 33 }) 34 35 #define arch_get_mmap_base(addr, base) \ 36 ({ \ 37 unsigned long mmap_base; \ 38 typeof(addr) _addr = (addr); \ 39 typeof(base) _base = (base); \ 40 unsigned long rnd_gap = DEFAULT_MAP_WINDOW - (_base); \ 41 if ((_addr) == 0 || is_compat_task() || \ 42 ((_addr + len) > BIT(VA_BITS - 1))) \ 43 mmap_base = (_base); \ 44 else \ 45 mmap_base = (_addr + len) - rnd_gap; \ 46 mmap_base; \ 47 }) 48 49 #ifdef CONFIG_64BIT 50 #define DEFAULT_MAP_WINDOW (UL(1) << (MMAP_VA_BITS - 1)) 51 #define STACK_TOP_MAX TASK_SIZE_64 52 #else 53 #define DEFAULT_MAP_WINDOW TASK_SIZE 54 #define STACK_TOP_MAX TASK_SIZE 55 #endif 56 #define STACK_ALIGN 16 57 58 #define STACK_TOP DEFAULT_MAP_WINDOW 59 60 #ifdef CONFIG_MMU 61 #define user_max_virt_addr() arch_get_mmap_end(ULONG_MAX, 0, 0) 62 #else 63 #define user_max_virt_addr() 0 64 #endif /* CONFIG_MMU */ 65 66 /* 67 * This decides where the kernel will search for a free chunk of vm 68 * space during mmap's. 69 */ 70 #ifdef CONFIG_64BIT 71 #define TASK_UNMAPPED_BASE PAGE_ALIGN((UL(1) << MMAP_MIN_VA_BITS) / 3) 72 #else 73 #define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3) 74 #endif 75 76 #ifndef __ASSEMBLY__ 77 #include <linux/cpumask.h> 78 79 struct task_struct; 80 struct pt_regs; 81 82 /* 83 * We use a flag to track in-kernel Vector context. Currently the flag has the 84 * following meaning: 85 * 86 * - bit 0: indicates whether the in-kernel Vector context is active. The 87 * activation of this state disables the preemption. On a non-RT kernel, it 88 * also disable bh. 89 * - bits 8: is used for tracking preemptible kernel-mode Vector, when 90 * RISCV_ISA_V_PREEMPTIVE is enabled. Calling kernel_vector_begin() does not 91 * disable the preemption if the thread's kernel_vstate.datap is allocated. 92 * Instead, the kernel set this bit field. Then the trap entry/exit code 93 * knows if we are entering/exiting the context that owns preempt_v. 94 * - 0: the task is not using preempt_v 95 * - 1: the task is actively using preempt_v. But whether does the task own 96 * the preempt_v context is decided by bits in RISCV_V_CTX_DEPTH_MASK. 97 * - bit 16-23 are RISCV_V_CTX_DEPTH_MASK, used by context tracking routine 98 * when preempt_v starts: 99 * - 0: the task is actively using, and own preempt_v context. 100 * - non-zero: the task was using preempt_v, but then took a trap within. 101 * Thus, the task does not own preempt_v. Any use of Vector will have to 102 * save preempt_v, if dirty, and fallback to non-preemptible kernel-mode 103 * Vector. 104 * - bit 30: The in-kernel preempt_v context is saved, and requries to be 105 * restored when returning to the context that owns the preempt_v. 106 * - bit 31: The in-kernel preempt_v context is dirty, as signaled by the 107 * trap entry code. Any context switches out-of current task need to save 108 * it to the task's in-kernel V context. Also, any traps nesting on-top-of 109 * preempt_v requesting to use V needs a save. 110 */ 111 #define RISCV_V_CTX_DEPTH_MASK 0x00ff0000 112 113 #define RISCV_V_CTX_UNIT_DEPTH 0x00010000 114 #define RISCV_KERNEL_MODE_V 0x00000001 115 #define RISCV_PREEMPT_V 0x00000100 116 #define RISCV_PREEMPT_V_DIRTY 0x80000000 117 #define RISCV_PREEMPT_V_NEED_RESTORE 0x40000000 118 119 /* CPU-specific state of a task */ 120 struct thread_struct { 121 /* Callee-saved registers */ 122 unsigned long ra; 123 unsigned long sp; /* Kernel mode stack */ 124 unsigned long s[12]; /* s[0]: frame pointer */ 125 struct __riscv_d_ext_state fstate; 126 unsigned long bad_cause; 127 u32 riscv_v_flags; 128 u32 vstate_ctrl; 129 struct __riscv_v_ext_state vstate; 130 unsigned long align_ctl; 131 struct __riscv_v_ext_state kernel_vstate; 132 #ifdef CONFIG_SMP 133 /* Flush the icache on migration */ 134 bool force_icache_flush; 135 /* A forced icache flush is not needed if migrating to the previous cpu. */ 136 unsigned int prev_cpu; 137 #endif 138 }; 139 140 /* Whitelist the fstate from the task_struct for hardened usercopy */ 141 static inline void arch_thread_struct_whitelist(unsigned long *offset, 142 unsigned long *size) 143 { 144 *offset = offsetof(struct thread_struct, fstate); 145 *size = sizeof_field(struct thread_struct, fstate); 146 } 147 148 #define INIT_THREAD { \ 149 .sp = sizeof(init_stack) + (long)&init_stack, \ 150 .align_ctl = PR_UNALIGN_NOPRINT, \ 151 } 152 153 #define task_pt_regs(tsk) \ 154 ((struct pt_regs *)(task_stack_page(tsk) + THREAD_SIZE \ 155 - ALIGN(sizeof(struct pt_regs), STACK_ALIGN))) 156 157 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->epc) 158 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->sp) 159 160 161 /* Do necessary setup to start up a newly executed thread. */ 162 extern void start_thread(struct pt_regs *regs, 163 unsigned long pc, unsigned long sp); 164 165 extern unsigned long __get_wchan(struct task_struct *p); 166 167 168 static inline void wait_for_interrupt(void) 169 { 170 __asm__ __volatile__ ("wfi"); 171 } 172 173 extern phys_addr_t dma32_phys_limit; 174 175 struct device_node; 176 int riscv_of_processor_hartid(struct device_node *node, unsigned long *hartid); 177 int riscv_early_of_processor_hartid(struct device_node *node, unsigned long *hartid); 178 int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid); 179 180 extern void riscv_fill_hwcap(void); 181 extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src); 182 183 extern unsigned long signal_minsigstksz __ro_after_init; 184 185 #ifdef CONFIG_RISCV_ISA_V 186 /* Userspace interface for PR_RISCV_V_{SET,GET}_VS prctl()s: */ 187 #define RISCV_V_SET_CONTROL(arg) riscv_v_vstate_ctrl_set_current(arg) 188 #define RISCV_V_GET_CONTROL() riscv_v_vstate_ctrl_get_current() 189 extern long riscv_v_vstate_ctrl_set_current(unsigned long arg); 190 extern long riscv_v_vstate_ctrl_get_current(void); 191 #endif /* CONFIG_RISCV_ISA_V */ 192 193 extern int get_unalign_ctl(struct task_struct *tsk, unsigned long addr); 194 extern int set_unalign_ctl(struct task_struct *tsk, unsigned int val); 195 196 #define GET_UNALIGN_CTL(tsk, addr) get_unalign_ctl((tsk), (addr)) 197 #define SET_UNALIGN_CTL(tsk, val) set_unalign_ctl((tsk), (val)) 198 199 #define RISCV_SET_ICACHE_FLUSH_CTX(arg1, arg2) riscv_set_icache_flush_ctx(arg1, arg2) 200 extern int riscv_set_icache_flush_ctx(unsigned long ctx, unsigned long per_thread); 201 202 #endif /* __ASSEMBLY__ */ 203 204 #endif /* _ASM_RISCV_PROCESSOR_H */ 205