1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2012 Regents of the University of California 4 */ 5 6 #ifndef _ASM_RISCV_PGTABLE_H 7 #define _ASM_RISCV_PGTABLE_H 8 9 #include <linux/mmzone.h> 10 #include <linux/sizes.h> 11 12 #include <asm/pgtable-bits.h> 13 14 #ifndef __ASSEMBLY__ 15 16 /* Page Upper Directory not used in RISC-V */ 17 #include <asm-generic/pgtable-nopud.h> 18 #include <asm/page.h> 19 #include <asm/tlbflush.h> 20 #include <linux/mm_types.h> 21 22 #ifdef CONFIG_MMU 23 24 #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1) 25 #define VMALLOC_END (PAGE_OFFSET - 1) 26 #define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE) 27 28 #define BPF_JIT_REGION_SIZE (SZ_128M) 29 #define BPF_JIT_REGION_START (PAGE_OFFSET - BPF_JIT_REGION_SIZE) 30 #define BPF_JIT_REGION_END (VMALLOC_END) 31 32 /* 33 * Roughly size the vmemmap space to be large enough to fit enough 34 * struct pages to map half the virtual address space. Then 35 * position vmemmap directly below the VMALLOC region. 36 */ 37 #define VMEMMAP_SHIFT \ 38 (CONFIG_VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT) 39 #define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT) 40 #define VMEMMAP_END (VMALLOC_START - 1) 41 #define VMEMMAP_START (VMALLOC_START - VMEMMAP_SIZE) 42 43 /* 44 * Define vmemmap for pfn_to_page & page_to_pfn calls. Needed if kernel 45 * is configured with CONFIG_SPARSEMEM_VMEMMAP enabled. 46 */ 47 #define vmemmap ((struct page *)VMEMMAP_START) 48 49 #define PCI_IO_SIZE SZ_16M 50 #define PCI_IO_END VMEMMAP_START 51 #define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE) 52 53 #define FIXADDR_TOP PCI_IO_START 54 #ifdef CONFIG_64BIT 55 #define FIXADDR_SIZE PMD_SIZE 56 #else 57 #define FIXADDR_SIZE PGDIR_SIZE 58 #endif 59 #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) 60 61 #endif 62 63 #ifdef CONFIG_64BIT 64 #include <asm/pgtable-64.h> 65 #else 66 #include <asm/pgtable-32.h> 67 #endif /* CONFIG_64BIT */ 68 69 #ifdef CONFIG_MMU 70 /* Number of entries in the page global directory */ 71 #define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t)) 72 /* Number of entries in the page table */ 73 #define PTRS_PER_PTE (PAGE_SIZE / sizeof(pte_t)) 74 75 /* Number of PGD entries that a user-mode program can use */ 76 #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) 77 78 /* Page protection bits */ 79 #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_USER) 80 81 #define PAGE_NONE __pgprot(_PAGE_PROT_NONE) 82 #define PAGE_READ __pgprot(_PAGE_BASE | _PAGE_READ) 83 #define PAGE_WRITE __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_WRITE) 84 #define PAGE_EXEC __pgprot(_PAGE_BASE | _PAGE_EXEC) 85 #define PAGE_READ_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC) 86 #define PAGE_WRITE_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | \ 87 _PAGE_EXEC | _PAGE_WRITE) 88 89 #define PAGE_COPY PAGE_READ 90 #define PAGE_COPY_EXEC PAGE_EXEC 91 #define PAGE_COPY_READ_EXEC PAGE_READ_EXEC 92 #define PAGE_SHARED PAGE_WRITE 93 #define PAGE_SHARED_EXEC PAGE_WRITE_EXEC 94 95 #define _PAGE_KERNEL (_PAGE_READ \ 96 | _PAGE_WRITE \ 97 | _PAGE_PRESENT \ 98 | _PAGE_ACCESSED \ 99 | _PAGE_DIRTY) 100 101 #define PAGE_KERNEL __pgprot(_PAGE_KERNEL) 102 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL | _PAGE_EXEC) 103 #define PAGE_KERNEL_READ __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE) 104 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL | _PAGE_EXEC) 105 #define PAGE_KERNEL_READ_EXEC __pgprot((_PAGE_KERNEL & ~_PAGE_WRITE) \ 106 | _PAGE_EXEC) 107 108 #define PAGE_TABLE __pgprot(_PAGE_TABLE) 109 110 /* 111 * The RISC-V ISA doesn't yet specify how to query or modify PMAs, so we can't 112 * change the properties of memory regions. 113 */ 114 #define _PAGE_IOREMAP _PAGE_KERNEL 115 116 extern pgd_t swapper_pg_dir[]; 117 118 /* MAP_PRIVATE permissions: xwr (copy-on-write) */ 119 #define __P000 PAGE_NONE 120 #define __P001 PAGE_READ 121 #define __P010 PAGE_COPY 122 #define __P011 PAGE_COPY 123 #define __P100 PAGE_EXEC 124 #define __P101 PAGE_READ_EXEC 125 #define __P110 PAGE_COPY_EXEC 126 #define __P111 PAGE_COPY_READ_EXEC 127 128 /* MAP_SHARED permissions: xwr */ 129 #define __S000 PAGE_NONE 130 #define __S001 PAGE_READ 131 #define __S010 PAGE_SHARED 132 #define __S011 PAGE_SHARED 133 #define __S100 PAGE_EXEC 134 #define __S101 PAGE_READ_EXEC 135 #define __S110 PAGE_SHARED_EXEC 136 #define __S111 PAGE_SHARED_EXEC 137 138 static inline int pmd_present(pmd_t pmd) 139 { 140 return (pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROT_NONE)); 141 } 142 143 static inline int pmd_none(pmd_t pmd) 144 { 145 return (pmd_val(pmd) == 0); 146 } 147 148 static inline int pmd_bad(pmd_t pmd) 149 { 150 return !pmd_present(pmd); 151 } 152 153 #define pmd_leaf pmd_leaf 154 static inline int pmd_leaf(pmd_t pmd) 155 { 156 return pmd_present(pmd) && 157 (pmd_val(pmd) & (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC)); 158 } 159 160 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd) 161 { 162 *pmdp = pmd; 163 } 164 165 static inline void pmd_clear(pmd_t *pmdp) 166 { 167 set_pmd(pmdp, __pmd(0)); 168 } 169 170 static inline pgd_t pfn_pgd(unsigned long pfn, pgprot_t prot) 171 { 172 return __pgd((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot)); 173 } 174 175 static inline unsigned long _pgd_pfn(pgd_t pgd) 176 { 177 return pgd_val(pgd) >> _PAGE_PFN_SHIFT; 178 } 179 180 static inline struct page *pmd_page(pmd_t pmd) 181 { 182 return pfn_to_page(pmd_val(pmd) >> _PAGE_PFN_SHIFT); 183 } 184 185 static inline unsigned long pmd_page_vaddr(pmd_t pmd) 186 { 187 return (unsigned long)pfn_to_virt(pmd_val(pmd) >> _PAGE_PFN_SHIFT); 188 } 189 190 static inline pte_t pmd_pte(pmd_t pmd) 191 { 192 return __pte(pmd_val(pmd)); 193 } 194 195 /* Yields the page frame number (PFN) of a page table entry */ 196 static inline unsigned long pte_pfn(pte_t pte) 197 { 198 return (pte_val(pte) >> _PAGE_PFN_SHIFT); 199 } 200 201 #define pte_page(x) pfn_to_page(pte_pfn(x)) 202 203 /* Constructs a page table entry */ 204 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot) 205 { 206 return __pte((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot)); 207 } 208 209 #define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot) 210 211 static inline int pte_present(pte_t pte) 212 { 213 return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE)); 214 } 215 216 static inline int pte_none(pte_t pte) 217 { 218 return (pte_val(pte) == 0); 219 } 220 221 static inline int pte_write(pte_t pte) 222 { 223 return pte_val(pte) & _PAGE_WRITE; 224 } 225 226 static inline int pte_exec(pte_t pte) 227 { 228 return pte_val(pte) & _PAGE_EXEC; 229 } 230 231 static inline int pte_huge(pte_t pte) 232 { 233 return pte_present(pte) 234 && (pte_val(pte) & (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC)); 235 } 236 237 static inline int pte_dirty(pte_t pte) 238 { 239 return pte_val(pte) & _PAGE_DIRTY; 240 } 241 242 static inline int pte_young(pte_t pte) 243 { 244 return pte_val(pte) & _PAGE_ACCESSED; 245 } 246 247 static inline int pte_special(pte_t pte) 248 { 249 return pte_val(pte) & _PAGE_SPECIAL; 250 } 251 252 /* static inline pte_t pte_rdprotect(pte_t pte) */ 253 254 static inline pte_t pte_wrprotect(pte_t pte) 255 { 256 return __pte(pte_val(pte) & ~(_PAGE_WRITE)); 257 } 258 259 /* static inline pte_t pte_mkread(pte_t pte) */ 260 261 static inline pte_t pte_mkwrite(pte_t pte) 262 { 263 return __pte(pte_val(pte) | _PAGE_WRITE); 264 } 265 266 /* static inline pte_t pte_mkexec(pte_t pte) */ 267 268 static inline pte_t pte_mkdirty(pte_t pte) 269 { 270 return __pte(pte_val(pte) | _PAGE_DIRTY); 271 } 272 273 static inline pte_t pte_mkclean(pte_t pte) 274 { 275 return __pte(pte_val(pte) & ~(_PAGE_DIRTY)); 276 } 277 278 static inline pte_t pte_mkyoung(pte_t pte) 279 { 280 return __pte(pte_val(pte) | _PAGE_ACCESSED); 281 } 282 283 static inline pte_t pte_mkold(pte_t pte) 284 { 285 return __pte(pte_val(pte) & ~(_PAGE_ACCESSED)); 286 } 287 288 static inline pte_t pte_mkspecial(pte_t pte) 289 { 290 return __pte(pte_val(pte) | _PAGE_SPECIAL); 291 } 292 293 static inline pte_t pte_mkhuge(pte_t pte) 294 { 295 return pte; 296 } 297 298 #ifdef CONFIG_NUMA_BALANCING 299 /* 300 * See the comment in include/asm-generic/pgtable.h 301 */ 302 static inline int pte_protnone(pte_t pte) 303 { 304 return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE)) == _PAGE_PROT_NONE; 305 } 306 307 static inline int pmd_protnone(pmd_t pmd) 308 { 309 return pte_protnone(pmd_pte(pmd)); 310 } 311 #endif 312 313 /* Modify page protection bits */ 314 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 315 { 316 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)); 317 } 318 319 #define pgd_ERROR(e) \ 320 pr_err("%s:%d: bad pgd " PTE_FMT ".\n", __FILE__, __LINE__, pgd_val(e)) 321 322 323 /* Commit new configuration to MMU hardware */ 324 static inline void update_mmu_cache(struct vm_area_struct *vma, 325 unsigned long address, pte_t *ptep) 326 { 327 /* 328 * The kernel assumes that TLBs don't cache invalid entries, but 329 * in RISC-V, SFENCE.VMA specifies an ordering constraint, not a 330 * cache flush; it is necessary even after writing invalid entries. 331 * Relying on flush_tlb_fix_spurious_fault would suffice, but 332 * the extra traps reduce performance. So, eagerly SFENCE.VMA. 333 */ 334 local_flush_tlb_page(address); 335 } 336 337 #define __HAVE_ARCH_PTE_SAME 338 static inline int pte_same(pte_t pte_a, pte_t pte_b) 339 { 340 return pte_val(pte_a) == pte_val(pte_b); 341 } 342 343 /* 344 * Certain architectures need to do special things when PTEs within 345 * a page table are directly modified. Thus, the following hook is 346 * made available. 347 */ 348 static inline void set_pte(pte_t *ptep, pte_t pteval) 349 { 350 *ptep = pteval; 351 } 352 353 void flush_icache_pte(pte_t pte); 354 355 static inline void set_pte_at(struct mm_struct *mm, 356 unsigned long addr, pte_t *ptep, pte_t pteval) 357 { 358 if (pte_present(pteval) && pte_exec(pteval)) 359 flush_icache_pte(pteval); 360 361 set_pte(ptep, pteval); 362 } 363 364 static inline void pte_clear(struct mm_struct *mm, 365 unsigned long addr, pte_t *ptep) 366 { 367 set_pte_at(mm, addr, ptep, __pte(0)); 368 } 369 370 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 371 static inline int ptep_set_access_flags(struct vm_area_struct *vma, 372 unsigned long address, pte_t *ptep, 373 pte_t entry, int dirty) 374 { 375 if (!pte_same(*ptep, entry)) 376 set_pte_at(vma->vm_mm, address, ptep, entry); 377 /* 378 * update_mmu_cache will unconditionally execute, handling both 379 * the case that the PTE changed and the spurious fault case. 380 */ 381 return true; 382 } 383 384 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 385 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 386 unsigned long address, pte_t *ptep) 387 { 388 return __pte(atomic_long_xchg((atomic_long_t *)ptep, 0)); 389 } 390 391 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 392 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, 393 unsigned long address, 394 pte_t *ptep) 395 { 396 if (!pte_young(*ptep)) 397 return 0; 398 return test_and_clear_bit(_PAGE_ACCESSED_OFFSET, &pte_val(*ptep)); 399 } 400 401 #define __HAVE_ARCH_PTEP_SET_WRPROTECT 402 static inline void ptep_set_wrprotect(struct mm_struct *mm, 403 unsigned long address, pte_t *ptep) 404 { 405 atomic_long_and(~(unsigned long)_PAGE_WRITE, (atomic_long_t *)ptep); 406 } 407 408 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 409 static inline int ptep_clear_flush_young(struct vm_area_struct *vma, 410 unsigned long address, pte_t *ptep) 411 { 412 /* 413 * This comment is borrowed from x86, but applies equally to RISC-V: 414 * 415 * Clearing the accessed bit without a TLB flush 416 * doesn't cause data corruption. [ It could cause incorrect 417 * page aging and the (mistaken) reclaim of hot pages, but the 418 * chance of that should be relatively low. ] 419 * 420 * So as a performance optimization don't flush the TLB when 421 * clearing the accessed bit, it will eventually be flushed by 422 * a context switch or a VM operation anyway. [ In the rare 423 * event of it not getting flushed for a long time the delay 424 * shouldn't really matter because there's no real memory 425 * pressure for swapout to react to. ] 426 */ 427 return ptep_test_and_clear_young(vma, address, ptep); 428 } 429 430 /* 431 * Encode and decode a swap entry 432 * 433 * Format of swap PTE: 434 * bit 0: _PAGE_PRESENT (zero) 435 * bit 1: _PAGE_PROT_NONE (zero) 436 * bits 2 to 6: swap type 437 * bits 7 to XLEN-1: swap offset 438 */ 439 #define __SWP_TYPE_SHIFT 2 440 #define __SWP_TYPE_BITS 5 441 #define __SWP_TYPE_MASK ((1UL << __SWP_TYPE_BITS) - 1) 442 #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT) 443 444 #define MAX_SWAPFILES_CHECK() \ 445 BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS) 446 447 #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK) 448 #define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT) 449 #define __swp_entry(type, offset) ((swp_entry_t) \ 450 { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) }) 451 452 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 453 #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 454 455 /* 456 * In the RV64 Linux scheme, we give the user half of the virtual-address space 457 * and give the kernel the other (upper) half. 458 */ 459 #ifdef CONFIG_64BIT 460 #define KERN_VIRT_START (-(BIT(CONFIG_VA_BITS)) + TASK_SIZE) 461 #else 462 #define KERN_VIRT_START FIXADDR_START 463 #endif 464 465 /* 466 * Task size is 0x4000000000 for RV64 or 0x9fc00000 for RV32. 467 * Note that PGDIR_SIZE must evenly divide TASK_SIZE. 468 */ 469 #ifdef CONFIG_64BIT 470 #define TASK_SIZE (PGDIR_SIZE * PTRS_PER_PGD / 2) 471 #else 472 #define TASK_SIZE FIXADDR_START 473 #endif 474 475 #else /* CONFIG_MMU */ 476 477 #define PAGE_SHARED __pgprot(0) 478 #define PAGE_KERNEL __pgprot(0) 479 #define swapper_pg_dir NULL 480 #define TASK_SIZE 0xffffffffUL 481 #define VMALLOC_START 0 482 #define VMALLOC_END TASK_SIZE 483 484 #endif /* !CONFIG_MMU */ 485 486 #define kern_addr_valid(addr) (1) /* FIXME */ 487 488 extern void *dtb_early_va; 489 extern uintptr_t dtb_early_pa; 490 void setup_bootmem(void); 491 void paging_init(void); 492 void misc_mem_init(void); 493 494 #define FIRST_USER_ADDRESS 0 495 496 /* 497 * ZERO_PAGE is a global shared page that is always zero, 498 * used for zero-mapped memory areas, etc. 499 */ 500 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; 501 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 502 503 #endif /* !__ASSEMBLY__ */ 504 505 #endif /* _ASM_RISCV_PGTABLE_H */ 506