1*4ecbd3ebSAnup Patel /* SPDX-License-Identifier: GPL-2.0-only */ 2*4ecbd3ebSAnup Patel /* 3*4ecbd3ebSAnup Patel * Copyright (c) 2025 Ventana Micro Systems Inc. 4*4ecbd3ebSAnup Patel */ 5*4ecbd3ebSAnup Patel 6*4ecbd3ebSAnup Patel #ifndef __RISCV_KVM_MMU_H_ 7*4ecbd3ebSAnup Patel #define __RISCV_KVM_MMU_H_ 8*4ecbd3ebSAnup Patel 9*4ecbd3ebSAnup Patel #include <linux/kvm_types.h> 10*4ecbd3ebSAnup Patel 11*4ecbd3ebSAnup Patel int kvm_riscv_gstage_ioremap(struct kvm *kvm, gpa_t gpa, 12*4ecbd3ebSAnup Patel phys_addr_t hpa, unsigned long size, 13*4ecbd3ebSAnup Patel bool writable, bool in_atomic); 14*4ecbd3ebSAnup Patel void kvm_riscv_gstage_iounmap(struct kvm *kvm, gpa_t gpa, 15*4ecbd3ebSAnup Patel unsigned long size); 16*4ecbd3ebSAnup Patel int kvm_riscv_gstage_map(struct kvm_vcpu *vcpu, 17*4ecbd3ebSAnup Patel struct kvm_memory_slot *memslot, 18*4ecbd3ebSAnup Patel gpa_t gpa, unsigned long hva, bool is_write); 19*4ecbd3ebSAnup Patel int kvm_riscv_gstage_alloc_pgd(struct kvm *kvm); 20*4ecbd3ebSAnup Patel void kvm_riscv_gstage_free_pgd(struct kvm *kvm); 21*4ecbd3ebSAnup Patel void kvm_riscv_gstage_update_hgatp(struct kvm_vcpu *vcpu); 22*4ecbd3ebSAnup Patel void kvm_riscv_gstage_mode_detect(void); 23*4ecbd3ebSAnup Patel unsigned long kvm_riscv_gstage_mode(void); 24*4ecbd3ebSAnup Patel int kvm_riscv_gstage_gpa_bits(void); 25*4ecbd3ebSAnup Patel 26*4ecbd3ebSAnup Patel #endif 27