1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2019 Western Digital Corporation or its affiliates. 4 * 5 * Authors: 6 * Anup Patel <anup.patel@wdc.com> 7 */ 8 9 #ifndef __RISCV_KVM_HOST_H__ 10 #define __RISCV_KVM_HOST_H__ 11 12 #include <linux/types.h> 13 #include <linux/kvm.h> 14 #include <linux/kvm_types.h> 15 #include <linux/spinlock.h> 16 #include <asm/hwcap.h> 17 #include <asm/kvm_aia.h> 18 #include <asm/ptrace.h> 19 #include <asm/kvm_vcpu_fp.h> 20 #include <asm/kvm_vcpu_insn.h> 21 #include <asm/kvm_vcpu_sbi.h> 22 #include <asm/kvm_vcpu_timer.h> 23 #include <asm/kvm_vcpu_pmu.h> 24 25 #define KVM_MAX_VCPUS 1024 26 27 #define KVM_HALT_POLL_NS_DEFAULT 500000 28 29 #define KVM_VCPU_MAX_FEATURES 0 30 31 #define KVM_IRQCHIP_NUM_PINS 1024 32 33 #define KVM_REQ_SLEEP \ 34 KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 35 #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(1) 36 #define KVM_REQ_UPDATE_HGATP KVM_ARCH_REQ(2) 37 #define KVM_REQ_FENCE_I \ 38 KVM_ARCH_REQ_FLAGS(3, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 39 #define KVM_REQ_HFENCE_GVMA_VMID_ALL KVM_REQ_TLB_FLUSH 40 #define KVM_REQ_HFENCE_VVMA_ALL \ 41 KVM_ARCH_REQ_FLAGS(4, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 42 #define KVM_REQ_HFENCE \ 43 KVM_ARCH_REQ_FLAGS(5, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 44 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(6) 45 46 #define KVM_HEDELEG_DEFAULT (BIT(EXC_INST_MISALIGNED) | \ 47 BIT(EXC_BREAKPOINT) | \ 48 BIT(EXC_SYSCALL) | \ 49 BIT(EXC_INST_PAGE_FAULT) | \ 50 BIT(EXC_LOAD_PAGE_FAULT) | \ 51 BIT(EXC_STORE_PAGE_FAULT)) 52 53 #define KVM_HIDELEG_DEFAULT (BIT(IRQ_VS_SOFT) | \ 54 BIT(IRQ_VS_TIMER) | \ 55 BIT(IRQ_VS_EXT)) 56 57 enum kvm_riscv_hfence_type { 58 KVM_RISCV_HFENCE_UNKNOWN = 0, 59 KVM_RISCV_HFENCE_GVMA_VMID_GPA, 60 KVM_RISCV_HFENCE_VVMA_ASID_GVA, 61 KVM_RISCV_HFENCE_VVMA_ASID_ALL, 62 KVM_RISCV_HFENCE_VVMA_GVA, 63 }; 64 65 struct kvm_riscv_hfence { 66 enum kvm_riscv_hfence_type type; 67 unsigned long asid; 68 unsigned long order; 69 gpa_t addr; 70 gpa_t size; 71 }; 72 73 #define KVM_RISCV_VCPU_MAX_HFENCE 64 74 75 struct kvm_vm_stat { 76 struct kvm_vm_stat_generic generic; 77 }; 78 79 struct kvm_vcpu_stat { 80 struct kvm_vcpu_stat_generic generic; 81 u64 ecall_exit_stat; 82 u64 wfi_exit_stat; 83 u64 wrs_exit_stat; 84 u64 mmio_exit_user; 85 u64 mmio_exit_kernel; 86 u64 csr_exit_user; 87 u64 csr_exit_kernel; 88 u64 signal_exits; 89 u64 exits; 90 u64 instr_illegal_exits; 91 u64 load_misaligned_exits; 92 u64 store_misaligned_exits; 93 u64 load_access_exits; 94 u64 store_access_exits; 95 }; 96 97 struct kvm_arch_memory_slot { 98 }; 99 100 struct kvm_vmid { 101 /* 102 * Writes to vmid_version and vmid happen with vmid_lock held 103 * whereas reads happen without any lock held. 104 */ 105 unsigned long vmid_version; 106 unsigned long vmid; 107 }; 108 109 struct kvm_arch { 110 /* G-stage vmid */ 111 struct kvm_vmid vmid; 112 113 /* G-stage page table */ 114 pgd_t *pgd; 115 phys_addr_t pgd_phys; 116 117 /* Guest Timer */ 118 struct kvm_guest_timer timer; 119 120 /* AIA Guest/VM context */ 121 struct kvm_aia aia; 122 123 /* KVM_CAP_RISCV_MP_STATE_RESET */ 124 bool mp_state_reset; 125 }; 126 127 struct kvm_cpu_trap { 128 unsigned long sepc; 129 unsigned long scause; 130 unsigned long stval; 131 unsigned long htval; 132 unsigned long htinst; 133 }; 134 135 struct kvm_cpu_context { 136 unsigned long zero; 137 unsigned long ra; 138 unsigned long sp; 139 unsigned long gp; 140 unsigned long tp; 141 unsigned long t0; 142 unsigned long t1; 143 unsigned long t2; 144 unsigned long s0; 145 unsigned long s1; 146 unsigned long a0; 147 unsigned long a1; 148 unsigned long a2; 149 unsigned long a3; 150 unsigned long a4; 151 unsigned long a5; 152 unsigned long a6; 153 unsigned long a7; 154 unsigned long s2; 155 unsigned long s3; 156 unsigned long s4; 157 unsigned long s5; 158 unsigned long s6; 159 unsigned long s7; 160 unsigned long s8; 161 unsigned long s9; 162 unsigned long s10; 163 unsigned long s11; 164 unsigned long t3; 165 unsigned long t4; 166 unsigned long t5; 167 unsigned long t6; 168 unsigned long sepc; 169 unsigned long sstatus; 170 unsigned long hstatus; 171 union __riscv_fp_state fp; 172 struct __riscv_v_ext_state vector; 173 }; 174 175 struct kvm_vcpu_csr { 176 unsigned long vsstatus; 177 unsigned long vsie; 178 unsigned long vstvec; 179 unsigned long vsscratch; 180 unsigned long vsepc; 181 unsigned long vscause; 182 unsigned long vstval; 183 unsigned long hvip; 184 unsigned long vsatp; 185 unsigned long scounteren; 186 unsigned long senvcfg; 187 }; 188 189 struct kvm_vcpu_config { 190 u64 henvcfg; 191 u64 hstateen0; 192 unsigned long hedeleg; 193 }; 194 195 struct kvm_vcpu_smstateen_csr { 196 unsigned long sstateen0; 197 }; 198 199 struct kvm_vcpu_reset_state { 200 spinlock_t lock; 201 unsigned long pc; 202 unsigned long a1; 203 }; 204 205 struct kvm_vcpu_arch { 206 /* VCPU ran at least once */ 207 bool ran_atleast_once; 208 209 /* Last Host CPU on which Guest VCPU exited */ 210 int last_exit_cpu; 211 212 /* ISA feature bits (similar to MISA) */ 213 DECLARE_BITMAP(isa, RISCV_ISA_EXT_MAX); 214 215 /* Vendor, Arch, and Implementation details */ 216 unsigned long mvendorid; 217 unsigned long marchid; 218 unsigned long mimpid; 219 220 /* SSCRATCH, STVEC, and SCOUNTEREN of Host */ 221 unsigned long host_sscratch; 222 unsigned long host_stvec; 223 unsigned long host_scounteren; 224 unsigned long host_senvcfg; 225 unsigned long host_sstateen0; 226 227 /* CPU context of Host */ 228 struct kvm_cpu_context host_context; 229 230 /* CPU context of Guest VCPU */ 231 struct kvm_cpu_context guest_context; 232 233 /* CPU CSR context of Guest VCPU */ 234 struct kvm_vcpu_csr guest_csr; 235 236 /* CPU Smstateen CSR context of Guest VCPU */ 237 struct kvm_vcpu_smstateen_csr smstateen_csr; 238 239 /* CPU reset state of Guest VCPU */ 240 struct kvm_vcpu_reset_state reset_state; 241 242 /* 243 * VCPU interrupts 244 * 245 * We have a lockless approach for tracking pending VCPU interrupts 246 * implemented using atomic bitops. The irqs_pending bitmap represent 247 * pending interrupts whereas irqs_pending_mask represent bits changed 248 * in irqs_pending. Our approach is modeled around multiple producer 249 * and single consumer problem where the consumer is the VCPU itself. 250 */ 251 #define KVM_RISCV_VCPU_NR_IRQS 64 252 DECLARE_BITMAP(irqs_pending, KVM_RISCV_VCPU_NR_IRQS); 253 DECLARE_BITMAP(irqs_pending_mask, KVM_RISCV_VCPU_NR_IRQS); 254 255 /* VCPU Timer */ 256 struct kvm_vcpu_timer timer; 257 258 /* HFENCE request queue */ 259 spinlock_t hfence_lock; 260 unsigned long hfence_head; 261 unsigned long hfence_tail; 262 struct kvm_riscv_hfence hfence_queue[KVM_RISCV_VCPU_MAX_HFENCE]; 263 264 /* MMIO instruction details */ 265 struct kvm_mmio_decode mmio_decode; 266 267 /* CSR instruction details */ 268 struct kvm_csr_decode csr_decode; 269 270 /* SBI context */ 271 struct kvm_vcpu_sbi_context sbi_context; 272 273 /* AIA VCPU context */ 274 struct kvm_vcpu_aia aia_context; 275 276 /* Cache pages needed to program page tables with spinlock held */ 277 struct kvm_mmu_memory_cache mmu_page_cache; 278 279 /* VCPU power state */ 280 struct kvm_mp_state mp_state; 281 spinlock_t mp_state_lock; 282 283 /* Don't run the VCPU (blocked) */ 284 bool pause; 285 286 /* Performance monitoring context */ 287 struct kvm_pmu pmu_context; 288 289 /* 'static' configurations which are set only once */ 290 struct kvm_vcpu_config cfg; 291 292 /* SBI steal-time accounting */ 293 struct { 294 gpa_t shmem; 295 u64 last_steal; 296 } sta; 297 }; 298 299 /* 300 * Returns true if a Performance Monitoring Interrupt (PMI), a.k.a. perf event, 301 * arrived in guest context. For riscv, any event that arrives while a vCPU is 302 * loaded is considered to be "in guest". 303 */ 304 static inline bool kvm_arch_pmi_in_guest(struct kvm_vcpu *vcpu) 305 { 306 return IS_ENABLED(CONFIG_GUEST_PERF_EVENTS) && !!vcpu; 307 } 308 309 #define KVM_RISCV_GSTAGE_TLB_MIN_ORDER 12 310 311 void kvm_riscv_local_hfence_gvma_vmid_gpa(unsigned long vmid, 312 gpa_t gpa, gpa_t gpsz, 313 unsigned long order); 314 void kvm_riscv_local_hfence_gvma_vmid_all(unsigned long vmid); 315 void kvm_riscv_local_hfence_gvma_gpa(gpa_t gpa, gpa_t gpsz, 316 unsigned long order); 317 void kvm_riscv_local_hfence_gvma_all(void); 318 void kvm_riscv_local_hfence_vvma_asid_gva(unsigned long vmid, 319 unsigned long asid, 320 unsigned long gva, 321 unsigned long gvsz, 322 unsigned long order); 323 void kvm_riscv_local_hfence_vvma_asid_all(unsigned long vmid, 324 unsigned long asid); 325 void kvm_riscv_local_hfence_vvma_gva(unsigned long vmid, 326 unsigned long gva, unsigned long gvsz, 327 unsigned long order); 328 void kvm_riscv_local_hfence_vvma_all(unsigned long vmid); 329 330 void kvm_riscv_local_tlb_sanitize(struct kvm_vcpu *vcpu); 331 332 void kvm_riscv_fence_i_process(struct kvm_vcpu *vcpu); 333 void kvm_riscv_hfence_gvma_vmid_all_process(struct kvm_vcpu *vcpu); 334 void kvm_riscv_hfence_vvma_all_process(struct kvm_vcpu *vcpu); 335 void kvm_riscv_hfence_process(struct kvm_vcpu *vcpu); 336 337 void kvm_riscv_fence_i(struct kvm *kvm, 338 unsigned long hbase, unsigned long hmask); 339 void kvm_riscv_hfence_gvma_vmid_gpa(struct kvm *kvm, 340 unsigned long hbase, unsigned long hmask, 341 gpa_t gpa, gpa_t gpsz, 342 unsigned long order); 343 void kvm_riscv_hfence_gvma_vmid_all(struct kvm *kvm, 344 unsigned long hbase, unsigned long hmask); 345 void kvm_riscv_hfence_vvma_asid_gva(struct kvm *kvm, 346 unsigned long hbase, unsigned long hmask, 347 unsigned long gva, unsigned long gvsz, 348 unsigned long order, unsigned long asid); 349 void kvm_riscv_hfence_vvma_asid_all(struct kvm *kvm, 350 unsigned long hbase, unsigned long hmask, 351 unsigned long asid); 352 void kvm_riscv_hfence_vvma_gva(struct kvm *kvm, 353 unsigned long hbase, unsigned long hmask, 354 unsigned long gva, unsigned long gvsz, 355 unsigned long order); 356 void kvm_riscv_hfence_vvma_all(struct kvm *kvm, 357 unsigned long hbase, unsigned long hmask); 358 359 int kvm_riscv_gstage_ioremap(struct kvm *kvm, gpa_t gpa, 360 phys_addr_t hpa, unsigned long size, 361 bool writable, bool in_atomic); 362 void kvm_riscv_gstage_iounmap(struct kvm *kvm, gpa_t gpa, 363 unsigned long size); 364 int kvm_riscv_gstage_map(struct kvm_vcpu *vcpu, 365 struct kvm_memory_slot *memslot, 366 gpa_t gpa, unsigned long hva, bool is_write); 367 int kvm_riscv_gstage_alloc_pgd(struct kvm *kvm); 368 void kvm_riscv_gstage_free_pgd(struct kvm *kvm); 369 void kvm_riscv_gstage_update_hgatp(struct kvm_vcpu *vcpu); 370 void __init kvm_riscv_gstage_mode_detect(void); 371 unsigned long __init kvm_riscv_gstage_mode(void); 372 int kvm_riscv_gstage_gpa_bits(void); 373 374 void __init kvm_riscv_gstage_vmid_detect(void); 375 unsigned long kvm_riscv_gstage_vmid_bits(void); 376 int kvm_riscv_gstage_vmid_init(struct kvm *kvm); 377 bool kvm_riscv_gstage_vmid_ver_changed(struct kvm_vmid *vmid); 378 void kvm_riscv_gstage_vmid_update(struct kvm_vcpu *vcpu); 379 380 int kvm_riscv_setup_default_irq_routing(struct kvm *kvm, u32 lines); 381 382 void __kvm_riscv_unpriv_trap(void); 383 384 unsigned long kvm_riscv_vcpu_unpriv_read(struct kvm_vcpu *vcpu, 385 bool read_insn, 386 unsigned long guest_addr, 387 struct kvm_cpu_trap *trap); 388 void kvm_riscv_vcpu_trap_redirect(struct kvm_vcpu *vcpu, 389 struct kvm_cpu_trap *trap); 390 int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, 391 struct kvm_cpu_trap *trap); 392 393 void __kvm_riscv_switch_to(struct kvm_vcpu_arch *vcpu_arch); 394 395 void kvm_riscv_vcpu_setup_isa(struct kvm_vcpu *vcpu); 396 unsigned long kvm_riscv_vcpu_num_regs(struct kvm_vcpu *vcpu); 397 int kvm_riscv_vcpu_copy_reg_indices(struct kvm_vcpu *vcpu, 398 u64 __user *uindices); 399 int kvm_riscv_vcpu_get_reg(struct kvm_vcpu *vcpu, 400 const struct kvm_one_reg *reg); 401 int kvm_riscv_vcpu_set_reg(struct kvm_vcpu *vcpu, 402 const struct kvm_one_reg *reg); 403 404 int kvm_riscv_vcpu_set_interrupt(struct kvm_vcpu *vcpu, unsigned int irq); 405 int kvm_riscv_vcpu_unset_interrupt(struct kvm_vcpu *vcpu, unsigned int irq); 406 void kvm_riscv_vcpu_flush_interrupts(struct kvm_vcpu *vcpu); 407 void kvm_riscv_vcpu_sync_interrupts(struct kvm_vcpu *vcpu); 408 bool kvm_riscv_vcpu_has_interrupts(struct kvm_vcpu *vcpu, u64 mask); 409 void __kvm_riscv_vcpu_power_off(struct kvm_vcpu *vcpu); 410 void kvm_riscv_vcpu_power_off(struct kvm_vcpu *vcpu); 411 void __kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu); 412 void kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu); 413 bool kvm_riscv_vcpu_stopped(struct kvm_vcpu *vcpu); 414 415 void kvm_riscv_vcpu_sbi_sta_reset(struct kvm_vcpu *vcpu); 416 void kvm_riscv_vcpu_record_steal_time(struct kvm_vcpu *vcpu); 417 418 #endif /* __RISCV_KVM_HOST_H__ */ 419