1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2019 Western Digital Corporation or its affiliates. 4 * 5 * Authors: 6 * Anup Patel <anup.patel@wdc.com> 7 */ 8 9 #ifndef __RISCV_KVM_HOST_H__ 10 #define __RISCV_KVM_HOST_H__ 11 12 #include <linux/types.h> 13 #include <linux/kvm.h> 14 #include <linux/kvm_types.h> 15 #include <linux/spinlock.h> 16 #include <asm/hwcap.h> 17 #include <asm/kvm_aia.h> 18 #include <asm/ptrace.h> 19 #include <asm/kvm_tlb.h> 20 #include <asm/kvm_vmid.h> 21 #include <asm/kvm_vcpu_config.h> 22 #include <asm/kvm_vcpu_fp.h> 23 #include <asm/kvm_vcpu_insn.h> 24 #include <asm/kvm_vcpu_sbi.h> 25 #include <asm/kvm_vcpu_sbi_fwft.h> 26 #include <asm/kvm_vcpu_timer.h> 27 #include <asm/kvm_vcpu_pmu.h> 28 29 #define KVM_MAX_VCPUS 1024 30 31 #define KVM_HALT_POLL_NS_DEFAULT 500000 32 33 #define KVM_VCPU_MAX_FEATURES 0 34 35 #define KVM_IRQCHIP_NUM_PINS 1024 36 37 #define KVM_REQ_SLEEP \ 38 KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 39 #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(1) 40 #define KVM_REQ_UPDATE_HGATP KVM_ARCH_REQ(2) 41 #define KVM_REQ_FENCE_I \ 42 KVM_ARCH_REQ_FLAGS(3, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 43 #define KVM_REQ_HFENCE_VVMA_ALL \ 44 KVM_ARCH_REQ_FLAGS(4, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 45 #define KVM_REQ_HFENCE \ 46 KVM_ARCH_REQ_FLAGS(5, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 47 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(6) 48 49 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLBS_RANGE 50 51 #define KVM_HAVE_MMU_RWLOCK 52 53 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 54 KVM_DIRTY_LOG_INITIALLY_SET) 55 56 struct kvm_vm_stat { 57 struct kvm_vm_stat_generic generic; 58 }; 59 60 struct kvm_vcpu_stat { 61 struct kvm_vcpu_stat_generic generic; 62 u64 ecall_exit_stat; 63 u64 wfi_exit_stat; 64 u64 wrs_exit_stat; 65 u64 mmio_exit_user; 66 u64 mmio_exit_kernel; 67 u64 csr_exit_user; 68 u64 csr_exit_kernel; 69 u64 signal_exits; 70 u64 exits; 71 u64 instr_illegal_exits; 72 u64 load_misaligned_exits; 73 u64 store_misaligned_exits; 74 u64 load_access_exits; 75 u64 store_access_exits; 76 }; 77 78 struct kvm_arch_memory_slot { 79 }; 80 81 struct kvm_arch { 82 /* G-stage vmid */ 83 struct kvm_vmid vmid; 84 85 /* G-stage page table */ 86 pgd_t *pgd; 87 phys_addr_t pgd_phys; 88 unsigned long pgd_levels; 89 90 /* Guest Timer */ 91 struct kvm_guest_timer timer; 92 93 /* AIA Guest/VM context */ 94 struct kvm_aia aia; 95 96 /* KVM_CAP_RISCV_MP_STATE_RESET */ 97 bool mp_state_reset; 98 }; 99 100 struct kvm_cpu_trap { 101 unsigned long sepc; 102 unsigned long scause; 103 unsigned long stval; 104 unsigned long htval; 105 unsigned long htinst; 106 }; 107 108 struct kvm_cpu_context { 109 unsigned long zero; 110 unsigned long ra; 111 unsigned long sp; 112 unsigned long gp; 113 unsigned long tp; 114 unsigned long t0; 115 unsigned long t1; 116 unsigned long t2; 117 unsigned long s0; 118 unsigned long s1; 119 unsigned long a0; 120 unsigned long a1; 121 unsigned long a2; 122 unsigned long a3; 123 unsigned long a4; 124 unsigned long a5; 125 unsigned long a6; 126 unsigned long a7; 127 unsigned long s2; 128 unsigned long s3; 129 unsigned long s4; 130 unsigned long s5; 131 unsigned long s6; 132 unsigned long s7; 133 unsigned long s8; 134 unsigned long s9; 135 unsigned long s10; 136 unsigned long s11; 137 unsigned long t3; 138 unsigned long t4; 139 unsigned long t5; 140 unsigned long t6; 141 unsigned long sepc; 142 unsigned long sstatus; 143 unsigned long hstatus; 144 union __riscv_fp_state fp; 145 struct __riscv_v_ext_state vector; 146 }; 147 148 struct kvm_vcpu_csr { 149 unsigned long vsstatus; 150 unsigned long vsie; 151 unsigned long vstvec; 152 unsigned long vsscratch; 153 unsigned long vsepc; 154 unsigned long vscause; 155 unsigned long vstval; 156 unsigned long hvip; 157 unsigned long vsatp; 158 unsigned long scounteren; 159 unsigned long senvcfg; 160 }; 161 162 struct kvm_vcpu_smstateen_csr { 163 unsigned long sstateen0; 164 }; 165 166 struct kvm_vcpu_reset_state { 167 spinlock_t lock; 168 unsigned long pc; 169 unsigned long a1; 170 }; 171 172 struct kvm_vcpu_arch { 173 /* VCPU ran at least once */ 174 bool ran_atleast_once; 175 176 /* Last Host CPU on which Guest VCPU exited */ 177 int last_exit_cpu; 178 179 /* ISA feature bits (similar to MISA) */ 180 DECLARE_BITMAP(isa, RISCV_ISA_EXT_MAX); 181 182 /* Vendor, Arch, and Implementation details */ 183 unsigned long mvendorid; 184 unsigned long marchid; 185 unsigned long mimpid; 186 187 /* SSCRATCH, STVEC, and SCOUNTEREN of Host */ 188 unsigned long host_sscratch; 189 unsigned long host_stvec; 190 unsigned long host_scounteren; 191 unsigned long host_senvcfg; 192 unsigned long host_sstateen0; 193 194 /* CPU context of Host */ 195 struct kvm_cpu_context host_context; 196 197 /* CPU context of Guest VCPU */ 198 struct kvm_cpu_context guest_context; 199 200 /* CPU CSR context of Guest VCPU */ 201 struct kvm_vcpu_csr guest_csr; 202 203 /* CPU Smstateen CSR context of Guest VCPU */ 204 struct kvm_vcpu_smstateen_csr smstateen_csr; 205 206 /* CPU reset state of Guest VCPU */ 207 struct kvm_vcpu_reset_state reset_state; 208 209 /* 210 * VCPU interrupts 211 * 212 * We have a lockless approach for tracking pending VCPU interrupts 213 * implemented using atomic bitops. The irqs_pending bitmap represent 214 * pending interrupts whereas irqs_pending_mask represent bits changed 215 * in irqs_pending. Our approach is modeled around multiple producer 216 * and single consumer problem where the consumer is the VCPU itself. 217 */ 218 #define KVM_RISCV_VCPU_NR_IRQS 64 219 DECLARE_BITMAP(irqs_pending, KVM_RISCV_VCPU_NR_IRQS); 220 DECLARE_BITMAP(irqs_pending_mask, KVM_RISCV_VCPU_NR_IRQS); 221 222 /* VCPU Timer */ 223 struct kvm_vcpu_timer timer; 224 225 /* HFENCE request queue */ 226 spinlock_t hfence_lock; 227 unsigned long hfence_head; 228 unsigned long hfence_tail; 229 struct kvm_riscv_hfence hfence_queue[KVM_RISCV_VCPU_MAX_HFENCE]; 230 231 /* MMIO instruction details */ 232 struct kvm_mmio_decode mmio_decode; 233 234 /* CSR instruction details */ 235 struct kvm_csr_decode csr_decode; 236 237 /* SBI context */ 238 struct kvm_vcpu_sbi_context sbi_context; 239 240 /* AIA VCPU context */ 241 struct kvm_vcpu_aia aia_context; 242 243 /* Cache pages needed to program page tables with spinlock held */ 244 struct kvm_mmu_memory_cache mmu_page_cache; 245 246 /* VCPU power state */ 247 struct kvm_mp_state mp_state; 248 spinlock_t mp_state_lock; 249 250 /* Don't run the VCPU (blocked) */ 251 bool pause; 252 253 /* Performance monitoring context */ 254 struct kvm_pmu pmu_context; 255 256 /* Firmware feature SBI extension context */ 257 struct kvm_sbi_fwft fwft_context; 258 259 /* 'static' configurations which are set only once */ 260 struct kvm_vcpu_config cfg; 261 262 /* Indicates modified guest CSRs */ 263 bool csr_dirty; 264 265 /* SBI steal-time accounting */ 266 struct { 267 gpa_t shmem; 268 u64 last_steal; 269 } sta; 270 }; 271 272 /* 273 * Returns true if a Performance Monitoring Interrupt (PMI), a.k.a. perf event, 274 * arrived in guest context. For riscv, any event that arrives while a vCPU is 275 * loaded is considered to be "in guest". 276 */ 277 static inline bool kvm_arch_pmi_in_guest(struct kvm_vcpu *vcpu) 278 { 279 return IS_ENABLED(CONFIG_GUEST_PERF_EVENTS) && !!vcpu; 280 } 281 282 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {} 283 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {} 284 285 int kvm_riscv_setup_default_irq_routing(struct kvm *kvm, u32 lines); 286 287 void __kvm_riscv_unpriv_trap(void); 288 289 unsigned long kvm_riscv_vcpu_unpriv_read(struct kvm_vcpu *vcpu, 290 bool read_insn, 291 unsigned long guest_addr, 292 struct kvm_cpu_trap *trap); 293 void kvm_riscv_vcpu_trap_redirect(struct kvm_vcpu *vcpu, 294 struct kvm_cpu_trap *trap); 295 int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, 296 struct kvm_cpu_trap *trap); 297 298 void __kvm_riscv_switch_to(struct kvm_vcpu_arch *vcpu_arch); 299 300 void kvm_riscv_vcpu_setup_isa(struct kvm_vcpu *vcpu); 301 unsigned long kvm_riscv_vcpu_num_regs(struct kvm_vcpu *vcpu); 302 int kvm_riscv_vcpu_copy_reg_indices(struct kvm_vcpu *vcpu, 303 u64 __user *uindices); 304 int kvm_riscv_vcpu_get_reg(struct kvm_vcpu *vcpu, 305 const struct kvm_one_reg *reg); 306 int kvm_riscv_vcpu_set_reg(struct kvm_vcpu *vcpu, 307 const struct kvm_one_reg *reg); 308 309 int kvm_riscv_vcpu_set_interrupt(struct kvm_vcpu *vcpu, unsigned int irq); 310 int kvm_riscv_vcpu_unset_interrupt(struct kvm_vcpu *vcpu, unsigned int irq); 311 void kvm_riscv_vcpu_flush_interrupts(struct kvm_vcpu *vcpu); 312 void kvm_riscv_vcpu_sync_interrupts(struct kvm_vcpu *vcpu); 313 bool kvm_riscv_vcpu_has_interrupts(struct kvm_vcpu *vcpu, u64 mask); 314 void __kvm_riscv_vcpu_power_off(struct kvm_vcpu *vcpu); 315 void kvm_riscv_vcpu_power_off(struct kvm_vcpu *vcpu); 316 void __kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu); 317 void kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu); 318 bool kvm_riscv_vcpu_stopped(struct kvm_vcpu *vcpu); 319 320 void kvm_riscv_vcpu_record_steal_time(struct kvm_vcpu *vcpu); 321 322 /* Flags representing implementation specific details */ 323 DECLARE_STATIC_KEY_FALSE(kvm_riscv_vsstage_tlb_no_gpa); 324 325 #endif /* __RISCV_KVM_HOST_H__ */ 326