1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2019 Western Digital Corporation or its affiliates. 4 * 5 * Authors: 6 * Anup Patel <anup.patel@wdc.com> 7 */ 8 9 #ifndef __RISCV_KVM_HOST_H__ 10 #define __RISCV_KVM_HOST_H__ 11 12 #include <linux/types.h> 13 #include <linux/kvm.h> 14 #include <linux/kvm_types.h> 15 #include <linux/spinlock.h> 16 #include <asm/hwcap.h> 17 #include <asm/kvm_aia.h> 18 #include <asm/ptrace.h> 19 #include <asm/kvm_tlb.h> 20 #include <asm/kvm_vmid.h> 21 #include <asm/kvm_vcpu_fp.h> 22 #include <asm/kvm_vcpu_insn.h> 23 #include <asm/kvm_vcpu_sbi.h> 24 #include <asm/kvm_vcpu_sbi_fwft.h> 25 #include <asm/kvm_vcpu_timer.h> 26 #include <asm/kvm_vcpu_pmu.h> 27 28 #define KVM_MAX_VCPUS 1024 29 30 #define KVM_HALT_POLL_NS_DEFAULT 500000 31 32 #define KVM_VCPU_MAX_FEATURES 0 33 34 #define KVM_IRQCHIP_NUM_PINS 1024 35 36 #define KVM_REQ_SLEEP \ 37 KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 38 #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(1) 39 #define KVM_REQ_UPDATE_HGATP KVM_ARCH_REQ(2) 40 #define KVM_REQ_FENCE_I \ 41 KVM_ARCH_REQ_FLAGS(3, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 42 #define KVM_REQ_HFENCE_VVMA_ALL \ 43 KVM_ARCH_REQ_FLAGS(4, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 44 #define KVM_REQ_HFENCE \ 45 KVM_ARCH_REQ_FLAGS(5, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 46 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(6) 47 48 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLBS_RANGE 49 50 #define KVM_HEDELEG_DEFAULT (BIT(EXC_INST_MISALIGNED) | \ 51 BIT(EXC_INST_ILLEGAL) | \ 52 BIT(EXC_BREAKPOINT) | \ 53 BIT(EXC_SYSCALL) | \ 54 BIT(EXC_INST_PAGE_FAULT) | \ 55 BIT(EXC_LOAD_PAGE_FAULT) | \ 56 BIT(EXC_STORE_PAGE_FAULT)) 57 58 #define KVM_HIDELEG_DEFAULT (BIT(IRQ_VS_SOFT) | \ 59 BIT(IRQ_VS_TIMER) | \ 60 BIT(IRQ_VS_EXT)) 61 62 struct kvm_vm_stat { 63 struct kvm_vm_stat_generic generic; 64 }; 65 66 struct kvm_vcpu_stat { 67 struct kvm_vcpu_stat_generic generic; 68 u64 ecall_exit_stat; 69 u64 wfi_exit_stat; 70 u64 wrs_exit_stat; 71 u64 mmio_exit_user; 72 u64 mmio_exit_kernel; 73 u64 csr_exit_user; 74 u64 csr_exit_kernel; 75 u64 signal_exits; 76 u64 exits; 77 u64 instr_illegal_exits; 78 u64 load_misaligned_exits; 79 u64 store_misaligned_exits; 80 u64 load_access_exits; 81 u64 store_access_exits; 82 }; 83 84 struct kvm_arch_memory_slot { 85 }; 86 87 struct kvm_arch { 88 /* G-stage vmid */ 89 struct kvm_vmid vmid; 90 91 /* G-stage page table */ 92 pgd_t *pgd; 93 phys_addr_t pgd_phys; 94 95 /* Guest Timer */ 96 struct kvm_guest_timer timer; 97 98 /* AIA Guest/VM context */ 99 struct kvm_aia aia; 100 101 /* KVM_CAP_RISCV_MP_STATE_RESET */ 102 bool mp_state_reset; 103 }; 104 105 struct kvm_cpu_trap { 106 unsigned long sepc; 107 unsigned long scause; 108 unsigned long stval; 109 unsigned long htval; 110 unsigned long htinst; 111 }; 112 113 struct kvm_cpu_context { 114 unsigned long zero; 115 unsigned long ra; 116 unsigned long sp; 117 unsigned long gp; 118 unsigned long tp; 119 unsigned long t0; 120 unsigned long t1; 121 unsigned long t2; 122 unsigned long s0; 123 unsigned long s1; 124 unsigned long a0; 125 unsigned long a1; 126 unsigned long a2; 127 unsigned long a3; 128 unsigned long a4; 129 unsigned long a5; 130 unsigned long a6; 131 unsigned long a7; 132 unsigned long s2; 133 unsigned long s3; 134 unsigned long s4; 135 unsigned long s5; 136 unsigned long s6; 137 unsigned long s7; 138 unsigned long s8; 139 unsigned long s9; 140 unsigned long s10; 141 unsigned long s11; 142 unsigned long t3; 143 unsigned long t4; 144 unsigned long t5; 145 unsigned long t6; 146 unsigned long sepc; 147 unsigned long sstatus; 148 unsigned long hstatus; 149 union __riscv_fp_state fp; 150 struct __riscv_v_ext_state vector; 151 }; 152 153 struct kvm_vcpu_csr { 154 unsigned long vsstatus; 155 unsigned long vsie; 156 unsigned long vstvec; 157 unsigned long vsscratch; 158 unsigned long vsepc; 159 unsigned long vscause; 160 unsigned long vstval; 161 unsigned long hvip; 162 unsigned long vsatp; 163 unsigned long scounteren; 164 unsigned long senvcfg; 165 }; 166 167 struct kvm_vcpu_config { 168 u64 henvcfg; 169 u64 hstateen0; 170 unsigned long hedeleg; 171 }; 172 173 struct kvm_vcpu_smstateen_csr { 174 unsigned long sstateen0; 175 }; 176 177 struct kvm_vcpu_reset_state { 178 spinlock_t lock; 179 unsigned long pc; 180 unsigned long a1; 181 }; 182 183 struct kvm_vcpu_arch { 184 /* VCPU ran at least once */ 185 bool ran_atleast_once; 186 187 /* Last Host CPU on which Guest VCPU exited */ 188 int last_exit_cpu; 189 190 /* ISA feature bits (similar to MISA) */ 191 DECLARE_BITMAP(isa, RISCV_ISA_EXT_MAX); 192 193 /* Vendor, Arch, and Implementation details */ 194 unsigned long mvendorid; 195 unsigned long marchid; 196 unsigned long mimpid; 197 198 /* SSCRATCH, STVEC, and SCOUNTEREN of Host */ 199 unsigned long host_sscratch; 200 unsigned long host_stvec; 201 unsigned long host_scounteren; 202 unsigned long host_senvcfg; 203 unsigned long host_sstateen0; 204 205 /* CPU context of Host */ 206 struct kvm_cpu_context host_context; 207 208 /* CPU context of Guest VCPU */ 209 struct kvm_cpu_context guest_context; 210 211 /* CPU CSR context of Guest VCPU */ 212 struct kvm_vcpu_csr guest_csr; 213 214 /* CPU Smstateen CSR context of Guest VCPU */ 215 struct kvm_vcpu_smstateen_csr smstateen_csr; 216 217 /* CPU reset state of Guest VCPU */ 218 struct kvm_vcpu_reset_state reset_state; 219 220 /* 221 * VCPU interrupts 222 * 223 * We have a lockless approach for tracking pending VCPU interrupts 224 * implemented using atomic bitops. The irqs_pending bitmap represent 225 * pending interrupts whereas irqs_pending_mask represent bits changed 226 * in irqs_pending. Our approach is modeled around multiple producer 227 * and single consumer problem where the consumer is the VCPU itself. 228 */ 229 #define KVM_RISCV_VCPU_NR_IRQS 64 230 DECLARE_BITMAP(irqs_pending, KVM_RISCV_VCPU_NR_IRQS); 231 DECLARE_BITMAP(irqs_pending_mask, KVM_RISCV_VCPU_NR_IRQS); 232 233 /* VCPU Timer */ 234 struct kvm_vcpu_timer timer; 235 236 /* HFENCE request queue */ 237 spinlock_t hfence_lock; 238 unsigned long hfence_head; 239 unsigned long hfence_tail; 240 struct kvm_riscv_hfence hfence_queue[KVM_RISCV_VCPU_MAX_HFENCE]; 241 242 /* MMIO instruction details */ 243 struct kvm_mmio_decode mmio_decode; 244 245 /* CSR instruction details */ 246 struct kvm_csr_decode csr_decode; 247 248 /* SBI context */ 249 struct kvm_vcpu_sbi_context sbi_context; 250 251 /* AIA VCPU context */ 252 struct kvm_vcpu_aia aia_context; 253 254 /* Cache pages needed to program page tables with spinlock held */ 255 struct kvm_mmu_memory_cache mmu_page_cache; 256 257 /* VCPU power state */ 258 struct kvm_mp_state mp_state; 259 spinlock_t mp_state_lock; 260 261 /* Don't run the VCPU (blocked) */ 262 bool pause; 263 264 /* Performance monitoring context */ 265 struct kvm_pmu pmu_context; 266 267 /* Firmware feature SBI extension context */ 268 struct kvm_sbi_fwft fwft_context; 269 270 /* 'static' configurations which are set only once */ 271 struct kvm_vcpu_config cfg; 272 273 /* SBI steal-time accounting */ 274 struct { 275 gpa_t shmem; 276 u64 last_steal; 277 } sta; 278 }; 279 280 /* 281 * Returns true if a Performance Monitoring Interrupt (PMI), a.k.a. perf event, 282 * arrived in guest context. For riscv, any event that arrives while a vCPU is 283 * loaded is considered to be "in guest". 284 */ 285 static inline bool kvm_arch_pmi_in_guest(struct kvm_vcpu *vcpu) 286 { 287 return IS_ENABLED(CONFIG_GUEST_PERF_EVENTS) && !!vcpu; 288 } 289 290 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {} 291 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {} 292 293 int kvm_riscv_setup_default_irq_routing(struct kvm *kvm, u32 lines); 294 295 void __kvm_riscv_unpriv_trap(void); 296 297 unsigned long kvm_riscv_vcpu_unpriv_read(struct kvm_vcpu *vcpu, 298 bool read_insn, 299 unsigned long guest_addr, 300 struct kvm_cpu_trap *trap); 301 void kvm_riscv_vcpu_trap_redirect(struct kvm_vcpu *vcpu, 302 struct kvm_cpu_trap *trap); 303 int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, 304 struct kvm_cpu_trap *trap); 305 306 void __kvm_riscv_switch_to(struct kvm_vcpu_arch *vcpu_arch); 307 308 void kvm_riscv_vcpu_setup_isa(struct kvm_vcpu *vcpu); 309 unsigned long kvm_riscv_vcpu_num_regs(struct kvm_vcpu *vcpu); 310 int kvm_riscv_vcpu_copy_reg_indices(struct kvm_vcpu *vcpu, 311 u64 __user *uindices); 312 int kvm_riscv_vcpu_get_reg(struct kvm_vcpu *vcpu, 313 const struct kvm_one_reg *reg); 314 int kvm_riscv_vcpu_set_reg(struct kvm_vcpu *vcpu, 315 const struct kvm_one_reg *reg); 316 317 int kvm_riscv_vcpu_set_interrupt(struct kvm_vcpu *vcpu, unsigned int irq); 318 int kvm_riscv_vcpu_unset_interrupt(struct kvm_vcpu *vcpu, unsigned int irq); 319 void kvm_riscv_vcpu_flush_interrupts(struct kvm_vcpu *vcpu); 320 void kvm_riscv_vcpu_sync_interrupts(struct kvm_vcpu *vcpu); 321 bool kvm_riscv_vcpu_has_interrupts(struct kvm_vcpu *vcpu, u64 mask); 322 void __kvm_riscv_vcpu_power_off(struct kvm_vcpu *vcpu); 323 void kvm_riscv_vcpu_power_off(struct kvm_vcpu *vcpu); 324 void __kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu); 325 void kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu); 326 bool kvm_riscv_vcpu_stopped(struct kvm_vcpu *vcpu); 327 328 void kvm_riscv_vcpu_record_steal_time(struct kvm_vcpu *vcpu); 329 330 #endif /* __RISCV_KVM_HOST_H__ */ 331