1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2012 Regents of the University of California 4 * Copyright (C) 2017 SiFive 5 */ 6 7 #ifndef _ASM_RISCV_IRQ_H 8 #define _ASM_RISCV_IRQ_H 9 10 #include <linux/interrupt.h> 11 #include <linux/linkage.h> 12 13 #include <asm-generic/irq.h> 14 15 void riscv_set_intc_hwnode_fn(struct fwnode_handle *(*fn)(void)); 16 17 struct fwnode_handle *riscv_get_intc_hwnode(void); 18 19 #ifdef CONFIG_ACPI 20 21 enum riscv_irqchip_type { 22 ACPI_RISCV_IRQCHIP_INTC = 0x00, 23 ACPI_RISCV_IRQCHIP_IMSIC = 0x01, 24 ACPI_RISCV_IRQCHIP_PLIC = 0x02, 25 ACPI_RISCV_IRQCHIP_APLIC = 0x03, 26 }; 27 28 int riscv_acpi_get_gsi_info(struct fwnode_handle *fwnode, u32 *gsi_base, 29 u32 *id, u32 *nr_irqs, u32 *nr_idcs); 30 struct fwnode_handle *riscv_acpi_get_gsi_domain_id(u32 gsi); 31 32 #else 33 static inline int riscv_acpi_get_gsi_info(struct fwnode_handle *fwnode, u32 *gsi_base, 34 u32 *id, u32 *nr_irqs, u32 *nr_idcs) 35 { 36 return 0; 37 } 38 39 #endif /* CONFIG_ACPI */ 40 41 #endif /* _ASM_RISCV_IRQ_H */ 42