1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2012 Regents of the University of California 4 * Copyright (C) 2017 SiFive 5 */ 6 7 #ifndef _ASM_RISCV_IRQ_H 8 #define _ASM_RISCV_IRQ_H 9 10 #include <linux/interrupt.h> 11 #include <linux/linkage.h> 12 13 #include <asm-generic/irq.h> 14 15 #define INVALID_CONTEXT UINT_MAX 16 17 #ifdef CONFIG_SMP 18 void arch_trigger_cpumask_backtrace(const cpumask_t *mask, int exclude_cpu); 19 #define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace 20 #endif 21 22 void riscv_set_intc_hwnode_fn(struct fwnode_handle *(*fn)(void)); 23 24 struct fwnode_handle *riscv_get_intc_hwnode(void); 25 int riscv_get_hart_index(struct fwnode_handle *fwnode, u32 logical_index, 26 u32 *hart_index); 27 28 #ifdef CONFIG_ACPI 29 30 enum riscv_irqchip_type { 31 ACPI_RISCV_IRQCHIP_INTC = 0x00, 32 ACPI_RISCV_IRQCHIP_IMSIC = 0x01, 33 ACPI_RISCV_IRQCHIP_PLIC = 0x02, 34 ACPI_RISCV_IRQCHIP_APLIC = 0x03, 35 ACPI_RISCV_IRQCHIP_SMSI = 0x04, 36 }; 37 38 int riscv_acpi_get_gsi_info(struct fwnode_handle *fwnode, u32 *gsi_base, 39 u32 *id, u32 *nr_irqs, u32 *nr_idcs); 40 struct fwnode_handle *riscv_acpi_get_gsi_domain_id(u32 gsi); 41 unsigned long acpi_rintc_index_to_hartid(u32 index); 42 unsigned long acpi_rintc_ext_parent_to_hartid(unsigned int plic_id, unsigned int ctxt_idx); 43 unsigned int acpi_rintc_get_plic_nr_contexts(unsigned int plic_id); 44 unsigned int acpi_rintc_get_plic_context(unsigned int plic_id, unsigned int ctxt_idx); 45 int __init acpi_rintc_get_imsic_mmio_info(u32 index, struct resource *res); 46 int riscv_acpi_update_gsi_range(u32 gsi_base, u32 nr_irqs); 47 48 #else 49 static inline int riscv_acpi_get_gsi_info(struct fwnode_handle *fwnode, u32 *gsi_base, 50 u32 *id, u32 *nr_irqs, u32 *nr_idcs) 51 { 52 return 0; 53 } 54 55 static inline unsigned long acpi_rintc_index_to_hartid(u32 index) 56 { 57 return INVALID_HARTID; 58 } 59 60 static inline unsigned long acpi_rintc_ext_parent_to_hartid(unsigned int plic_id, 61 unsigned int ctxt_idx) 62 { 63 return INVALID_HARTID; 64 } 65 66 static inline unsigned int acpi_rintc_get_plic_nr_contexts(unsigned int plic_id) 67 { 68 return INVALID_CONTEXT; 69 } 70 71 static inline unsigned int acpi_rintc_get_plic_context(unsigned int plic_id, unsigned int ctxt_idx) 72 { 73 return INVALID_CONTEXT; 74 } 75 76 static inline int __init acpi_rintc_get_imsic_mmio_info(u32 index, struct resource *res) 77 { 78 return 0; 79 } 80 81 static inline int riscv_acpi_update_gsi_range(u32 gsi_base, u32 nr_irqs) 82 { 83 return -ENODEV; 84 } 85 #endif /* CONFIG_ACPI */ 86 87 #endif /* _ASM_RISCV_IRQ_H */ 88