1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2015 Regents of the University of California 4 */ 5 6 #ifndef _ASM_RISCV_ASM_H 7 #define _ASM_RISCV_ASM_H 8 9 #ifdef __ASSEMBLER__ 10 #define __ASM_STR(x) x 11 #else 12 #define __ASM_STR(x) #x 13 #endif 14 15 #ifdef CONFIG_AS_HAS_INSN 16 #define ASM_INSN_I(__x) ".insn " __x 17 #else 18 #define ASM_INSN_I(__x) ".4byte " __x 19 #endif 20 21 #if __riscv_xlen == 64 22 #define __REG_SEL(a, b) __ASM_STR(a) 23 #elif __riscv_xlen == 32 24 #define __REG_SEL(a, b) __ASM_STR(b) 25 #else 26 #error "Unexpected __riscv_xlen" 27 #endif 28 29 #define REG_L __REG_SEL(ld, lw) 30 #define REG_S __REG_SEL(sd, sw) 31 #define REG_SC __REG_SEL(sc.d, sc.w) 32 #define REG_AMOSWAP_AQ __REG_SEL(amoswap.d.aq, amoswap.w.aq) 33 #define REG_ASM __REG_SEL(.dword, .word) 34 #define SZREG __REG_SEL(8, 4) 35 #define LGREG __REG_SEL(3, 2) 36 #define SRLI __REG_SEL(srliw, srli) 37 #define SLLI __REG_SEL(slliw, slli) 38 39 #if __SIZEOF_POINTER__ == 8 40 #ifdef __ASSEMBLER__ 41 #define RISCV_PTR .dword 42 #define RISCV_SZPTR 8 43 #define RISCV_LGPTR 3 44 #else 45 #define RISCV_PTR ".dword" 46 #define RISCV_SZPTR "8" 47 #define RISCV_LGPTR "3" 48 #endif 49 #elif __SIZEOF_POINTER__ == 4 50 #ifdef __ASSEMBLER__ 51 #define RISCV_PTR .word 52 #define RISCV_SZPTR 4 53 #define RISCV_LGPTR 2 54 #else 55 #define RISCV_PTR ".word" 56 #define RISCV_SZPTR "4" 57 #define RISCV_LGPTR "2" 58 #endif 59 #else 60 #error "Unexpected __SIZEOF_POINTER__" 61 #endif 62 63 #if (__SIZEOF_INT__ == 4) 64 #define RISCV_INT __ASM_STR(.word) 65 #define RISCV_SZINT __ASM_STR(4) 66 #define RISCV_LGINT __ASM_STR(2) 67 #else 68 #error "Unexpected __SIZEOF_INT__" 69 #endif 70 71 #if (__SIZEOF_SHORT__ == 2) 72 #define RISCV_SHORT __ASM_STR(.half) 73 #define RISCV_SZSHORT __ASM_STR(2) 74 #define RISCV_LGSHORT __ASM_STR(1) 75 #else 76 #error "Unexpected __SIZEOF_SHORT__" 77 #endif 78 79 #ifdef __ASSEMBLER__ 80 #include <asm/asm-offsets.h> 81 82 /* Common assembly source macros */ 83 84 /* 85 * NOP sequence 86 */ 87 .macro nops, num 88 .rept \num 89 nop 90 .endr 91 .endm 92 93 #ifdef CONFIG_SMP 94 .macro asm_per_cpu dst sym tmp 95 lw \tmp, TASK_TI_CPU_NUM(tp) 96 slli \tmp, \tmp, RISCV_LGPTR 97 la \dst, __per_cpu_offset 98 add \dst, \dst, \tmp 99 REG_L \tmp, 0(\dst) 100 la \dst, \sym 101 add \dst, \dst, \tmp 102 .endm 103 #else /* CONFIG_SMP */ 104 .macro asm_per_cpu dst sym tmp 105 la \dst, \sym 106 .endm 107 #endif /* CONFIG_SMP */ 108 109 .macro load_per_cpu dst ptr tmp 110 asm_per_cpu \dst \ptr \tmp 111 REG_L \dst, 0(\dst) 112 .endm 113 114 #ifdef CONFIG_SHADOW_CALL_STACK 115 /* gp is used as the shadow call stack pointer instead */ 116 .macro load_global_pointer 117 .endm 118 #else 119 /* load __global_pointer to gp */ 120 .macro load_global_pointer 121 .option push 122 .option norelax 123 la gp, __global_pointer$ 124 .option pop 125 .endm 126 #endif /* CONFIG_SHADOW_CALL_STACK */ 127 128 /* save all GPs except x1 ~ x5 */ 129 .macro save_from_x6_to_x31 130 REG_S x6, PT_T1(sp) 131 REG_S x7, PT_T2(sp) 132 REG_S x8, PT_S0(sp) 133 REG_S x9, PT_S1(sp) 134 REG_S x10, PT_A0(sp) 135 REG_S x11, PT_A1(sp) 136 REG_S x12, PT_A2(sp) 137 REG_S x13, PT_A3(sp) 138 REG_S x14, PT_A4(sp) 139 REG_S x15, PT_A5(sp) 140 REG_S x16, PT_A6(sp) 141 REG_S x17, PT_A7(sp) 142 REG_S x18, PT_S2(sp) 143 REG_S x19, PT_S3(sp) 144 REG_S x20, PT_S4(sp) 145 REG_S x21, PT_S5(sp) 146 REG_S x22, PT_S6(sp) 147 REG_S x23, PT_S7(sp) 148 REG_S x24, PT_S8(sp) 149 REG_S x25, PT_S9(sp) 150 REG_S x26, PT_S10(sp) 151 REG_S x27, PT_S11(sp) 152 REG_S x28, PT_T3(sp) 153 REG_S x29, PT_T4(sp) 154 REG_S x30, PT_T5(sp) 155 REG_S x31, PT_T6(sp) 156 .endm 157 158 /* restore all GPs except x1 ~ x5 */ 159 .macro restore_from_x6_to_x31 160 REG_L x6, PT_T1(sp) 161 REG_L x7, PT_T2(sp) 162 REG_L x8, PT_S0(sp) 163 REG_L x9, PT_S1(sp) 164 REG_L x10, PT_A0(sp) 165 REG_L x11, PT_A1(sp) 166 REG_L x12, PT_A2(sp) 167 REG_L x13, PT_A3(sp) 168 REG_L x14, PT_A4(sp) 169 REG_L x15, PT_A5(sp) 170 REG_L x16, PT_A6(sp) 171 REG_L x17, PT_A7(sp) 172 REG_L x18, PT_S2(sp) 173 REG_L x19, PT_S3(sp) 174 REG_L x20, PT_S4(sp) 175 REG_L x21, PT_S5(sp) 176 REG_L x22, PT_S6(sp) 177 REG_L x23, PT_S7(sp) 178 REG_L x24, PT_S8(sp) 179 REG_L x25, PT_S9(sp) 180 REG_L x26, PT_S10(sp) 181 REG_L x27, PT_S11(sp) 182 REG_L x28, PT_T3(sp) 183 REG_L x29, PT_T4(sp) 184 REG_L x30, PT_T5(sp) 185 REG_L x31, PT_T6(sp) 186 .endm 187 188 /* Annotate a function as being unsuitable for kprobes. */ 189 #ifdef CONFIG_KPROBES 190 #define ASM_NOKPROBE(name) \ 191 .pushsection "_kprobe_blacklist", "aw"; \ 192 RISCV_PTR name; \ 193 .popsection 194 #else 195 #define ASM_NOKPROBE(name) 196 #endif 197 198 #endif /* __ASSEMBLER__ */ 199 200 #endif /* _ASM_RISCV_ASM_H */ 201