xref: /linux/arch/riscv/include/asm/asm-extable.h (revision d0fdc20b0429150c9dd09111f9b1d9d48117b56f)
16dd10d91SJisheng Zhang /* SPDX-License-Identifier: GPL-2.0-only */
26dd10d91SJisheng Zhang #ifndef __ASM_ASM_EXTABLE_H
36dd10d91SJisheng Zhang #define __ASM_ASM_EXTABLE_H
46dd10d91SJisheng Zhang 
52bf847dbSJisheng Zhang #define EX_TYPE_NONE			0
62bf847dbSJisheng Zhang #define EX_TYPE_FIXUP			1
72bf847dbSJisheng Zhang #define EX_TYPE_BPF			2
820802d8dSJisheng Zhang #define EX_TYPE_UACCESS_ERR_ZERO	3
9*d0fdc20bSJisheng Zhang #define EX_TYPE_LOAD_UNALIGNED_ZEROPAD	4
102bf847dbSJisheng Zhang 
11de658bcfSJisheng Zhang #ifdef CONFIG_MMU
12de658bcfSJisheng Zhang 
136dd10d91SJisheng Zhang #ifdef __ASSEMBLY__
146dd10d91SJisheng Zhang 
152bf847dbSJisheng Zhang #define __ASM_EXTABLE_RAW(insn, fixup, type, data)	\
166dd10d91SJisheng Zhang 	.pushsection	__ex_table, "a";		\
176dd10d91SJisheng Zhang 	.balign		4;				\
186dd10d91SJisheng Zhang 	.long		((insn) - .);			\
196dd10d91SJisheng Zhang 	.long		((fixup) - .);			\
202bf847dbSJisheng Zhang 	.short		(type);				\
212bf847dbSJisheng Zhang 	.short		(data);				\
226dd10d91SJisheng Zhang 	.popsection;
236dd10d91SJisheng Zhang 
246dd10d91SJisheng Zhang 	.macro		_asm_extable, insn, fixup
252bf847dbSJisheng Zhang 	__ASM_EXTABLE_RAW(\insn, \fixup, EX_TYPE_FIXUP, 0)
266dd10d91SJisheng Zhang 	.endm
276dd10d91SJisheng Zhang 
286dd10d91SJisheng Zhang #else /* __ASSEMBLY__ */
296dd10d91SJisheng Zhang 
3020802d8dSJisheng Zhang #include <linux/bits.h>
316dd10d91SJisheng Zhang #include <linux/stringify.h>
3220802d8dSJisheng Zhang #include <asm/gpr-num.h>
336dd10d91SJisheng Zhang 
342bf847dbSJisheng Zhang #define __ASM_EXTABLE_RAW(insn, fixup, type, data)	\
356dd10d91SJisheng Zhang 	".pushsection	__ex_table, \"a\"\n"		\
366dd10d91SJisheng Zhang 	".balign	4\n"				\
376dd10d91SJisheng Zhang 	".long		((" insn ") - .)\n"		\
386dd10d91SJisheng Zhang 	".long		((" fixup ") - .)\n"		\
392bf847dbSJisheng Zhang 	".short		(" type ")\n"			\
402bf847dbSJisheng Zhang 	".short		(" data ")\n"			\
416dd10d91SJisheng Zhang 	".popsection\n"
426dd10d91SJisheng Zhang 
432bf847dbSJisheng Zhang #define _ASM_EXTABLE(insn, fixup)	\
442bf847dbSJisheng Zhang 	__ASM_EXTABLE_RAW(#insn, #fixup, __stringify(EX_TYPE_FIXUP), "0")
456dd10d91SJisheng Zhang 
4620802d8dSJisheng Zhang #define EX_DATA_REG_ERR_SHIFT	0
4720802d8dSJisheng Zhang #define EX_DATA_REG_ERR		GENMASK(4, 0)
4820802d8dSJisheng Zhang #define EX_DATA_REG_ZERO_SHIFT	5
4920802d8dSJisheng Zhang #define EX_DATA_REG_ZERO	GENMASK(9, 5)
5020802d8dSJisheng Zhang 
51*d0fdc20bSJisheng Zhang #define EX_DATA_REG_DATA_SHIFT	0
52*d0fdc20bSJisheng Zhang #define EX_DATA_REG_DATA	GENMASK(4, 0)
53*d0fdc20bSJisheng Zhang #define EX_DATA_REG_ADDR_SHIFT	5
54*d0fdc20bSJisheng Zhang #define EX_DATA_REG_ADDR	GENMASK(9, 5)
55*d0fdc20bSJisheng Zhang 
5620802d8dSJisheng Zhang #define EX_DATA_REG(reg, gpr)						\
5720802d8dSJisheng Zhang 	"((.L__gpr_num_" #gpr ") << " __stringify(EX_DATA_REG_##reg##_SHIFT) ")"
5820802d8dSJisheng Zhang 
5920802d8dSJisheng Zhang #define _ASM_EXTABLE_UACCESS_ERR_ZERO(insn, fixup, err, zero)		\
6020802d8dSJisheng Zhang 	__DEFINE_ASM_GPR_NUMS						\
6120802d8dSJisheng Zhang 	__ASM_EXTABLE_RAW(#insn, #fixup, 				\
6220802d8dSJisheng Zhang 			  __stringify(EX_TYPE_UACCESS_ERR_ZERO),	\
6320802d8dSJisheng Zhang 			  "("						\
6420802d8dSJisheng Zhang 			    EX_DATA_REG(ERR, err) " | "			\
6520802d8dSJisheng Zhang 			    EX_DATA_REG(ZERO, zero)			\
6620802d8dSJisheng Zhang 			  ")")
6720802d8dSJisheng Zhang 
6820802d8dSJisheng Zhang #define _ASM_EXTABLE_UACCESS_ERR(insn, fixup, err)			\
6920802d8dSJisheng Zhang 	_ASM_EXTABLE_UACCESS_ERR_ZERO(insn, fixup, err, zero)
7020802d8dSJisheng Zhang 
71*d0fdc20bSJisheng Zhang #define _ASM_EXTABLE_LOAD_UNALIGNED_ZEROPAD(insn, fixup, data, addr)		\
72*d0fdc20bSJisheng Zhang 	__DEFINE_ASM_GPR_NUMS							\
73*d0fdc20bSJisheng Zhang 	__ASM_EXTABLE_RAW(#insn, #fixup,					\
74*d0fdc20bSJisheng Zhang 			  __stringify(EX_TYPE_LOAD_UNALIGNED_ZEROPAD),		\
75*d0fdc20bSJisheng Zhang 			  "("							\
76*d0fdc20bSJisheng Zhang 			    EX_DATA_REG(DATA, data) " | "			\
77*d0fdc20bSJisheng Zhang 			    EX_DATA_REG(ADDR, addr)				\
78*d0fdc20bSJisheng Zhang 			  ")")
79*d0fdc20bSJisheng Zhang 
806dd10d91SJisheng Zhang #endif /* __ASSEMBLY__ */
816dd10d91SJisheng Zhang 
82de658bcfSJisheng Zhang #else /* CONFIG_MMU */
83de658bcfSJisheng Zhang 	#define _ASM_EXTABLE_UACCESS_ERR(insn, fixup, err)
84de658bcfSJisheng Zhang #endif /* CONFIG_MMU */
85de658bcfSJisheng Zhang 
866dd10d91SJisheng Zhang #endif /* __ASM_ASM_EXTABLE_H */
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