xref: /linux/arch/riscv/include/asm/alternative.h (revision e64f737ad70fee4a3c57d147fc511e5d5014b5dd)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2021 Sifive.
4  */
5 
6 #ifndef __ASM_ALTERNATIVE_H
7 #define __ASM_ALTERNATIVE_H
8 
9 #define ERRATA_STRING_LENGTH_MAX 32
10 
11 #include <asm/alternative-macros.h>
12 
13 #ifndef __ASSEMBLY__
14 
15 #ifdef CONFIG_RISCV_ALTERNATIVE
16 
17 #include <linux/init.h>
18 #include <linux/types.h>
19 #include <linux/stddef.h>
20 #include <asm/hwcap.h>
21 
22 void __init apply_boot_alternatives(void);
23 
24 struct alt_entry {
25 	void *old_ptr;		 /* address of original instruciton or data  */
26 	void *alt_ptr;		 /* address of replacement instruction or data */
27 	unsigned long vendor_id; /* cpu vendor id */
28 	unsigned long alt_len;   /* The replacement size */
29 	unsigned int errata_id;  /* The errata id */
30 } __packed;
31 
32 struct errata_checkfunc_id {
33 	unsigned long vendor_id;
34 	bool (*func)(struct alt_entry *alt);
35 };
36 
37 void sifive_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
38 			      unsigned long archid, unsigned long impid);
39 
40 #else /* CONFIG_RISCV_ALTERNATIVE */
41 
42 static inline void apply_boot_alternatives(void) { }
43 
44 #endif /* CONFIG_RISCV_ALTERNATIVE */
45 
46 #endif
47 #endif
48