1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2021 Sifive. 4 */ 5 6 #ifndef __ASM_ALTERNATIVE_H 7 #define __ASM_ALTERNATIVE_H 8 9 #define ERRATA_STRING_LENGTH_MAX 32 10 11 #include <asm/alternative-macros.h> 12 13 #ifndef __ASSEMBLY__ 14 15 #ifdef CONFIG_RISCV_ALTERNATIVE 16 17 #include <linux/init.h> 18 #include <linux/types.h> 19 #include <linux/stddef.h> 20 #include <asm/hwcap.h> 21 22 #define RISCV_ALTERNATIVES_BOOT 0 /* alternatives applied during regular boot */ 23 #define RISCV_ALTERNATIVES_MODULE 1 /* alternatives applied during module-init */ 24 #define RISCV_ALTERNATIVES_EARLY_BOOT 2 /* alternatives applied before mmu start */ 25 26 void __init apply_boot_alternatives(void); 27 void __init apply_early_boot_alternatives(void); 28 void apply_module_alternatives(void *start, size_t length); 29 30 struct alt_entry { 31 void *old_ptr; /* address of original instruciton or data */ 32 void *alt_ptr; /* address of replacement instruction or data */ 33 unsigned long vendor_id; /* cpu vendor id */ 34 unsigned long alt_len; /* The replacement size */ 35 unsigned int errata_id; /* The errata id */ 36 } __packed; 37 38 struct errata_checkfunc_id { 39 unsigned long vendor_id; 40 bool (*func)(struct alt_entry *alt); 41 }; 42 43 void sifive_errata_patch_func(struct alt_entry *begin, struct alt_entry *end, 44 unsigned long archid, unsigned long impid, 45 unsigned int stage); 46 void thead_errata_patch_func(struct alt_entry *begin, struct alt_entry *end, 47 unsigned long archid, unsigned long impid, 48 unsigned int stage); 49 50 void riscv_cpufeature_patch_func(struct alt_entry *begin, struct alt_entry *end, 51 unsigned int stage); 52 53 #else /* CONFIG_RISCV_ALTERNATIVE */ 54 55 static inline void apply_boot_alternatives(void) { } 56 static inline void apply_early_boot_alternatives(void) { } 57 static inline void apply_module_alternatives(void *start, size_t length) { } 58 59 #endif /* CONFIG_RISCV_ALTERNATIVE */ 60 61 #endif 62 #endif 63