xref: /linux/arch/riscv/errata/sifive/errata.c (revision 447e140e66fd226350b3ce86cffc965eaae4c856)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2021 Sifive.
4  */
5 
6 #include <linux/kernel.h>
7 #include <linux/memory.h>
8 #include <linux/module.h>
9 #include <linux/string.h>
10 #include <linux/bug.h>
11 #include <asm/patch.h>
12 #include <asm/alternative.h>
13 #include <asm/vendorid_list.h>
14 #include <asm/errata_list.h>
15 
16 struct errata_info_t {
17 	char name[32];
18 	bool (*check_func)(unsigned long  arch_id, unsigned long impid);
19 };
20 
21 static bool errata_cip_453_check_func(unsigned long  arch_id, unsigned long impid)
22 {
23 	/*
24 	 * Affected cores:
25 	 * Architecture ID: 0x8000000000000007
26 	 * Implement ID: 0x20181004 <= impid <= 0x20191105
27 	 */
28 	if (arch_id != 0x8000000000000007 ||
29 	    (impid < 0x20181004 || impid > 0x20191105))
30 		return false;
31 	return true;
32 }
33 
34 static bool errata_cip_1200_check_func(unsigned long  arch_id, unsigned long impid)
35 {
36 	/*
37 	 * Affected cores:
38 	 * Architecture ID: 0x8000000000000007 or 0x1
39 	 * Implement ID: mimpid[23:0] <= 0x200630 and mimpid != 0x01200626
40 	 */
41 	if (arch_id != 0x8000000000000007 && arch_id != 0x1)
42 		return false;
43 	if ((impid & 0xffffff) > 0x200630 || impid == 0x1200626)
44 		return false;
45 
46 #ifdef CONFIG_MMU
47 	tlb_flush_all_threshold = 0;
48 #endif
49 
50 	return true;
51 }
52 
53 static struct errata_info_t errata_list[ERRATA_SIFIVE_NUMBER] = {
54 	{
55 		.name = "cip-453",
56 		.check_func = errata_cip_453_check_func
57 	},
58 	{
59 		.name = "cip-1200",
60 		.check_func = errata_cip_1200_check_func
61 	},
62 };
63 
64 static u32 __init_or_module sifive_errata_probe(unsigned long archid,
65 						unsigned long impid)
66 {
67 	int idx;
68 	u32 cpu_req_errata = 0;
69 
70 	for (idx = 0; idx < ERRATA_SIFIVE_NUMBER; idx++)
71 		if (errata_list[idx].check_func(archid, impid))
72 			cpu_req_errata |= (1U << idx);
73 
74 	return cpu_req_errata;
75 }
76 
77 static void __init_or_module warn_miss_errata(u32 miss_errata)
78 {
79 	int i;
80 
81 	pr_warn("----------------------------------------------------------------\n");
82 	pr_warn("WARNING: Missing the following errata may cause potential issues\n");
83 	for (i = 0; i < ERRATA_SIFIVE_NUMBER; i++)
84 		if (miss_errata & 0x1 << i)
85 			pr_warn("\tSiFive Errata[%d]:%s\n", i, errata_list[i].name);
86 	pr_warn("Please enable the corresponding Kconfig to apply them\n");
87 	pr_warn("----------------------------------------------------------------\n");
88 }
89 
90 void sifive_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
91 			      unsigned long archid, unsigned long impid,
92 			      unsigned int stage)
93 {
94 	struct alt_entry *alt;
95 	u32 cpu_req_errata;
96 	u32 cpu_apply_errata = 0;
97 	u32 tmp;
98 
99 	if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
100 		return;
101 
102 	cpu_req_errata = sifive_errata_probe(archid, impid);
103 
104 	for (alt = begin; alt < end; alt++) {
105 		if (alt->vendor_id != SIFIVE_VENDOR_ID)
106 			continue;
107 		if (alt->patch_id >= ERRATA_SIFIVE_NUMBER) {
108 			WARN(1, "This errata id:%d is not in kernel errata list", alt->patch_id);
109 			continue;
110 		}
111 
112 		tmp = (1U << alt->patch_id);
113 		if (cpu_req_errata & tmp) {
114 			mutex_lock(&text_mutex);
115 			patch_text_nosync(ALT_OLD_PTR(alt), ALT_ALT_PTR(alt),
116 					  alt->alt_len);
117 			mutex_unlock(&text_mutex);
118 			cpu_apply_errata |= tmp;
119 		}
120 	}
121 	if (stage != RISCV_ALTERNATIVES_MODULE &&
122 	    cpu_apply_errata != cpu_req_errata)
123 		warn_miss_errata(cpu_req_errata - cpu_apply_errata);
124 }
125