1/* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */ 2// 3// This file is dual-licensed, meaning that you can use it under your 4// choice of either of the following two licenses: 5// 6// Copyright 2023 The OpenSSL Project Authors. All Rights Reserved. 7// 8// Licensed under the Apache License 2.0 (the "License"). You can obtain 9// a copy in the file LICENSE in the source distribution or at 10// https://www.openssl.org/source/license.html 11// 12// or 13// 14// Copyright (c) 2023, Christoph Müllner <christoph.muellner@vrull.eu> 15// Copyright (c) 2023, Phoebe Chen <phoebe.chen@sifive.com> 16// Copyright 2024 Google LLC 17// All rights reserved. 18// 19// Redistribution and use in source and binary forms, with or without 20// modification, are permitted provided that the following conditions 21// are met: 22// 1. Redistributions of source code must retain the above copyright 23// notice, this list of conditions and the following disclaimer. 24// 2. Redistributions in binary form must reproduce the above copyright 25// notice, this list of conditions and the following disclaimer in the 26// documentation and/or other materials provided with the distribution. 27// 28// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 40// The generated code of this file depends on the following RISC-V extensions: 41// - RV64I 42// - RISC-V Vector ('V') with VLEN >= 128 43// - RISC-V Vector SHA-2 Secure Hash extension ('Zvknhb') 44// - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb') 45 46#include <linux/cfi_types.h> 47 48.text 49.option arch, +zvknhb, +zvkb 50 51#define STATEP a0 52#define DATA a1 53#define NUM_BLOCKS a2 54 55#define STATEP_C a3 56#define K a4 57 58#define MASK v0 59#define INDICES v1 60#define W0 v10 // LMUL=2 61#define W1 v12 // LMUL=2 62#define W2 v14 // LMUL=2 63#define W3 v16 // LMUL=2 64#define VTMP v20 // LMUL=2 65#define FEBA v22 // LMUL=2 66#define HGDC v24 // LMUL=2 67#define PREV_FEBA v26 // LMUL=2 68#define PREV_HGDC v28 // LMUL=2 69 70// Do 4 rounds of SHA-512. w0 contains the current 4 message schedule words. 71// 72// If not all the message schedule words have been computed yet, then this also 73// computes 4 more message schedule words. w1-w3 contain the next 3 groups of 4 74// message schedule words; this macro computes the group after w3 and writes it 75// to w0. This means that the next (w0, w1, w2, w3) is the current (w1, w2, w3, 76// w0), so the caller must cycle through the registers accordingly. 77.macro sha512_4rounds last, w0, w1, w2, w3 78 vle64.v VTMP, (K) 79 addi K, K, 32 80 vadd.vv VTMP, VTMP, \w0 81 vsha2cl.vv HGDC, FEBA, VTMP 82 vsha2ch.vv FEBA, HGDC, VTMP 83.if !\last 84 vmerge.vvm VTMP, \w2, \w1, MASK 85 vsha2ms.vv \w0, VTMP, \w3 86.endif 87.endm 88 89.macro sha512_16rounds last 90 sha512_4rounds \last, W0, W1, W2, W3 91 sha512_4rounds \last, W1, W2, W3, W0 92 sha512_4rounds \last, W2, W3, W0, W1 93 sha512_4rounds \last, W3, W0, W1, W2 94.endm 95 96// void sha512_transform_zvknhb_zvkb(u64 state[8], const u8 *data, 97// int num_blocks); 98SYM_TYPED_FUNC_START(sha512_transform_zvknhb_zvkb) 99 100 // Setup mask for the vmerge to replace the first word (idx==0) in 101 // message scheduling. There are 4 words, so an 8-bit mask suffices. 102 vsetivli zero, 1, e8, m1, ta, ma 103 vmv.v.i MASK, 0x01 104 105 // Load the state. The state is stored as {a,b,c,d,e,f,g,h}, but we 106 // need {f,e,b,a},{h,g,d,c}. The dst vtype is e64m2 and the index vtype 107 // is e8mf4. We use index-load with the i8 indices {40, 32, 8, 0}, 108 // loaded using the 32-bit little endian value 0x00082028. 109 li t0, 0x00082028 110 vsetivli zero, 1, e32, m1, ta, ma 111 vmv.v.x INDICES, t0 112 addi STATEP_C, STATEP, 16 113 vsetivli zero, 4, e64, m2, ta, ma 114 vluxei8.v FEBA, (STATEP), INDICES 115 vluxei8.v HGDC, (STATEP_C), INDICES 116 117.Lnext_block: 118 la K, K512 119 addi NUM_BLOCKS, NUM_BLOCKS, -1 120 121 // Save the previous state, as it's needed later. 122 vmv.v.v PREV_FEBA, FEBA 123 vmv.v.v PREV_HGDC, HGDC 124 125 // Load the next 1024-bit message block and endian-swap each 64-bit word 126 vle64.v W0, (DATA) 127 vrev8.v W0, W0 128 addi DATA, DATA, 32 129 vle64.v W1, (DATA) 130 vrev8.v W1, W1 131 addi DATA, DATA, 32 132 vle64.v W2, (DATA) 133 vrev8.v W2, W2 134 addi DATA, DATA, 32 135 vle64.v W3, (DATA) 136 vrev8.v W3, W3 137 addi DATA, DATA, 32 138 139 // Do the 80 rounds of SHA-512. 140 sha512_16rounds 0 141 sha512_16rounds 0 142 sha512_16rounds 0 143 sha512_16rounds 0 144 sha512_16rounds 1 145 146 // Add the previous state. 147 vadd.vv FEBA, FEBA, PREV_FEBA 148 vadd.vv HGDC, HGDC, PREV_HGDC 149 150 // Repeat if more blocks remain. 151 bnez NUM_BLOCKS, .Lnext_block 152 153 // Store the new state and return. 154 vsuxei8.v FEBA, (STATEP), INDICES 155 vsuxei8.v HGDC, (STATEP_C), INDICES 156 ret 157SYM_FUNC_END(sha512_transform_zvknhb_zvkb) 158 159.section ".rodata" 160.p2align 3 161.type K512, @object 162K512: 163 .dword 0x428a2f98d728ae22, 0x7137449123ef65cd 164 .dword 0xb5c0fbcfec4d3b2f, 0xe9b5dba58189dbbc 165 .dword 0x3956c25bf348b538, 0x59f111f1b605d019 166 .dword 0x923f82a4af194f9b, 0xab1c5ed5da6d8118 167 .dword 0xd807aa98a3030242, 0x12835b0145706fbe 168 .dword 0x243185be4ee4b28c, 0x550c7dc3d5ffb4e2 169 .dword 0x72be5d74f27b896f, 0x80deb1fe3b1696b1 170 .dword 0x9bdc06a725c71235, 0xc19bf174cf692694 171 .dword 0xe49b69c19ef14ad2, 0xefbe4786384f25e3 172 .dword 0x0fc19dc68b8cd5b5, 0x240ca1cc77ac9c65 173 .dword 0x2de92c6f592b0275, 0x4a7484aa6ea6e483 174 .dword 0x5cb0a9dcbd41fbd4, 0x76f988da831153b5 175 .dword 0x983e5152ee66dfab, 0xa831c66d2db43210 176 .dword 0xb00327c898fb213f, 0xbf597fc7beef0ee4 177 .dword 0xc6e00bf33da88fc2, 0xd5a79147930aa725 178 .dword 0x06ca6351e003826f, 0x142929670a0e6e70 179 .dword 0x27b70a8546d22ffc, 0x2e1b21385c26c926 180 .dword 0x4d2c6dfc5ac42aed, 0x53380d139d95b3df 181 .dword 0x650a73548baf63de, 0x766a0abb3c77b2a8 182 .dword 0x81c2c92e47edaee6, 0x92722c851482353b 183 .dword 0xa2bfe8a14cf10364, 0xa81a664bbc423001 184 .dword 0xc24b8b70d0f89791, 0xc76c51a30654be30 185 .dword 0xd192e819d6ef5218, 0xd69906245565a910 186 .dword 0xf40e35855771202a, 0x106aa07032bbd1b8 187 .dword 0x19a4c116b8d2d0c8, 0x1e376c085141ab53 188 .dword 0x2748774cdf8eeb99, 0x34b0bcb5e19b48a8 189 .dword 0x391c0cb3c5c95a63, 0x4ed8aa4ae3418acb 190 .dword 0x5b9cca4f7763e373, 0x682e6ff3d6b2b8a3 191 .dword 0x748f82ee5defb2fc, 0x78a5636f43172f60 192 .dword 0x84c87814a1f0ab72, 0x8cc702081a6439ec 193 .dword 0x90befffa23631e28, 0xa4506cebde82bde9 194 .dword 0xbef9a3f7b2c67915, 0xc67178f2e372532b 195 .dword 0xca273eceea26619c, 0xd186b8c721c0c207 196 .dword 0xeada7dd6cde0eb1e, 0xf57d4f7fee6ed178 197 .dword 0x06f067aa72176fba, 0x0a637dc5a2c898a6 198 .dword 0x113f9804bef90dae, 0x1b710b35131c471b 199 .dword 0x28db77f523047d84, 0x32caab7b40c72493 200 .dword 0x3c9ebe0a15c9bebc, 0x431d67c49c100d4c 201 .dword 0x4cc5d4becb3e42b6, 0x597f299cfc657e2a 202 .dword 0x5fcb6fab3ad6faec, 0x6c44198c4a475817 203.size K512, . - K512 204