xref: /linux/arch/riscv/crypto/ghash-riscv64-zvkg.S (revision 4b660dbd9ee2059850fd30e0df420ca7a38a1856)
1/* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
2//
3// This file is dual-licensed, meaning that you can use it under your
4// choice of either of the following two licenses:
5//
6// Copyright 2023 The OpenSSL Project Authors. All Rights Reserved.
7//
8// Licensed under the Apache License 2.0 (the "License"). You can obtain
9// a copy in the file LICENSE in the source distribution or at
10// https://www.openssl.org/source/license.html
11//
12// or
13//
14// Copyright (c) 2023, Christoph Müllner <christoph.muellner@vrull.eu>
15// Copyright (c) 2023, Jerry Shih <jerry.shih@sifive.com>
16// Copyright 2024 Google LLC
17// All rights reserved.
18//
19// Redistribution and use in source and binary forms, with or without
20// modification, are permitted provided that the following conditions
21// are met:
22// 1. Redistributions of source code must retain the above copyright
23//    notice, this list of conditions and the following disclaimer.
24// 2. Redistributions in binary form must reproduce the above copyright
25//    notice, this list of conditions and the following disclaimer in the
26//    documentation and/or other materials provided with the distribution.
27//
28// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39
40// The generated code of this file depends on the following RISC-V extensions:
41// - RV64I
42// - RISC-V Vector ('V') with VLEN >= 128
43// - RISC-V Vector GCM/GMAC extension ('Zvkg')
44
45#include <linux/linkage.h>
46
47.text
48.option arch, +zvkg
49
50#define ACCUMULATOR	a0
51#define KEY		a1
52#define DATA		a2
53#define LEN		a3
54
55// void ghash_zvkg(be128 *accumulator, const be128 *key, const u8 *data,
56//		   size_t len);
57//
58// |len| must be nonzero and a multiple of 16 (GHASH_BLOCK_SIZE).
59SYM_FUNC_START(ghash_zvkg)
60	vsetivli	zero, 4, e32, m1, ta, ma
61	vle32.v		v1, (ACCUMULATOR)
62	vle32.v		v2, (KEY)
63.Lnext_block:
64	vle32.v		v3, (DATA)
65	vghsh.vv	v1, v2, v3
66	addi		DATA, DATA, 16
67	addi		LEN, LEN, -16
68	bnez		LEN, .Lnext_block
69
70	vse32.v		v1, (ACCUMULATOR)
71	ret
72SYM_FUNC_END(ghash_zvkg)
73