1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org> 4 */ 5 6/dts-v1/; 7 8#include "th1520.dtsi" 9 10/ { 11 model = "Sipeed Lichee Module 4A"; 12 compatible = "sipeed,lichee-module-4a", "thead,th1520"; 13 14 aliases { 15 ethernet0 = &gmac0; 16 ethernet1 = &gmac1; 17 }; 18 19 memory@0 { 20 device_type = "memory"; 21 reg = <0x0 0x00000000 0x2 0x00000000>; 22 }; 23}; 24 25&osc { 26 clock-frequency = <24000000>; 27}; 28 29&osc_32k { 30 clock-frequency = <32768>; 31}; 32 33&aogpio { 34 gpio-line-names = "", "", "", 35 "GPIO00", 36 "GPIO04"; 37}; 38 39&dmac0 { 40 status = "okay"; 41}; 42 43&emmc { 44 bus-width = <8>; 45 max-frequency = <198000000>; 46 mmc-hs400-1_8v; 47 non-removable; 48 no-sdio; 49 no-sd; 50 status = "okay"; 51}; 52 53&gmac0 { 54 pinctrl-names = "default"; 55 pinctrl-0 = <&gmac0_pins>, <&mdio0_pins>; 56 phy-handle = <&phy0>; 57 phy-mode = "rgmii-id"; 58 status = "okay"; 59}; 60 61&gmac1 { 62 pinctrl-names = "default"; 63 pinctrl-0 = <&gmac1_pins>; 64 phy-handle = <&phy1>; 65 phy-mode = "rgmii-id"; 66 status = "okay"; 67}; 68 69&gpio0 { 70 gpio-line-names = "", "", "", "", "", "", "", "", "", "", 71 "", "", "", "", "", "", "", "", "", "", 72 "", "", "", "", 73 "GPIO07", 74 "GPIO08", 75 "", 76 "GPIO01", 77 "GPIO02"; 78}; 79 80&gpio1 { 81 gpio-line-names = "", "", "", 82 "GPIO11", 83 "GPIO12", 84 "GPIO13", 85 "GPIO14", 86 "", "", "", "", "", "", "", "", "", "", 87 "", "", "", "", "", 88 "GPIO06"; 89}; 90 91&gpio2 { 92 gpio-line-names = "GPIO03", 93 "GPIO05"; 94}; 95 96&gpio3 { 97 gpio-line-names = "", "", 98 "GPIO09", 99 "GPIO10"; 100}; 101 102&mdio0 { 103 phy0: ethernet-phy@1 { 104 reg = <1>; 105 }; 106 107 phy1: ethernet-phy@2 { 108 reg = <2>; 109 }; 110}; 111 112&padctrl0_apsys { 113 gmac0_pins: gmac0-0 { 114 tx-pins { 115 pins = "GMAC0_TX_CLK", 116 "GMAC0_TXEN", 117 "GMAC0_TXD0", 118 "GMAC0_TXD1", 119 "GMAC0_TXD2", 120 "GMAC0_TXD3"; 121 function = "gmac0"; 122 bias-disable; 123 drive-strength = <25>; 124 input-disable; 125 input-schmitt-disable; 126 slew-rate = <0>; 127 }; 128 129 rx-pins { 130 pins = "GMAC0_RX_CLK", 131 "GMAC0_RXDV", 132 "GMAC0_RXD0", 133 "GMAC0_RXD1", 134 "GMAC0_RXD2", 135 "GMAC0_RXD3"; 136 function = "gmac0"; 137 bias-disable; 138 drive-strength = <1>; 139 input-enable; 140 input-schmitt-disable; 141 slew-rate = <0>; 142 }; 143 }; 144 145 gmac1_pins: gmac1-0 { 146 tx-pins { 147 pins = "GPIO2_18", /* GMAC1_TX_CLK */ 148 "GPIO2_20", /* GMAC1_TXEN */ 149 "GPIO2_21", /* GMAC1_TXD0 */ 150 "GPIO2_22", /* GMAC1_TXD1 */ 151 "GPIO2_23", /* GMAC1_TXD2 */ 152 "GPIO2_24"; /* GMAC1_TXD3 */ 153 function = "gmac1"; 154 bias-disable; 155 drive-strength = <25>; 156 input-disable; 157 input-schmitt-disable; 158 slew-rate = <0>; 159 }; 160 161 rx-pins { 162 pins = "GPIO2_19", /* GMAC1_RX_CLK */ 163 "GPIO2_25", /* GMAC1_RXDV */ 164 "GPIO2_30", /* GMAC1_RXD0 */ 165 "GPIO2_31", /* GMAC1_RXD1 */ 166 "GPIO3_0", /* GMAC1_RXD2 */ 167 "GPIO3_1"; /* GMAC1_RXD3 */ 168 function = "gmac1"; 169 bias-disable; 170 drive-strength = <1>; 171 input-enable; 172 input-schmitt-disable; 173 slew-rate = <0>; 174 }; 175 }; 176 177 mdio0_pins: mdio0-0 { 178 mdc-pins { 179 pins = "GMAC0_MDC"; 180 function = "gmac0"; 181 bias-disable; 182 drive-strength = <13>; 183 input-disable; 184 input-schmitt-disable; 185 slew-rate = <0>; 186 }; 187 188 mdio-pins { 189 pins = "GMAC0_MDIO"; 190 function = "gmac0"; 191 bias-disable; 192 drive-strength = <13>; 193 input-enable; 194 input-schmitt-enable; 195 slew-rate = <0>; 196 }; 197 }; 198}; 199 200&sdio0 { 201 bus-width = <4>; 202 max-frequency = <198000000>; 203 status = "okay"; 204}; 205