1// SPDX-License-Identifier: GPL-2.0 OR MIT 2/* 3 * Copyright (C) 2024 DeepComputing (HK) Limited 4 */ 5 6/dts-v1/; 7#include "jh7110-common.dtsi" 8 9/ { 10 model = "DeepComputing FML13V01"; 11 compatible = "deepcomputing,fml13v01", "starfive,jh7110"; 12}; 13 14&mmc0 { 15 cap-mmc-highspeed; 16 cap-mmc-hw-reset; 17 mmc-ddr-1_8v; 18 mmc-hs200-1_8v; 19 vmmc-supply = <&vcc_3v3>; 20 vqmmc-supply = <&emmc_vdd>; 21}; 22 23&mmc0_pins { 24 rst-pins { 25 pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST, 26 GPOEN_ENABLE, 27 GPI_NONE)>; 28 bias-pull-up; 29 drive-strength = <12>; 30 input-disable; 31 input-schmitt-disable; 32 slew-rate = <0>; 33 }; 34}; 35 36&mmc1 { 37 cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>; 38 disable-wp; 39}; 40 41&pcie1 { 42 perst-gpios = <&sysgpio 21 GPIO_ACTIVE_LOW>; 43 phys = <&pciephy1>; 44 pinctrl-names = "default"; 45 pinctrl-0 = <&pcie1_pins>; 46 status = "okay"; 47}; 48 49&sysgpio { 50 pcie1_pins: pcie1-0 { 51 clkreq-pins { 52 pinmux = <GPIOMUX(29, GPOUT_LOW, 53 GPOEN_DISABLE, 54 GPI_NONE)>; 55 bias-pull-down; 56 drive-strength = <2>; 57 input-enable; 58 input-schmitt-disable; 59 slew-rate = <0>; 60 }; 61 62 wake-pins { 63 pinmux = <GPIOMUX(28, GPOUT_HIGH, 64 GPOEN_DISABLE, 65 GPI_NONE)>; 66 bias-pull-up; 67 drive-strength = <2>; 68 input-enable; 69 input-schmitt-disable; 70 slew-rate = <0>; 71 }; 72 }; 73 74 usb0_pins: usb0-0 { 75 vbus-pins { 76 pinmux = <GPIOMUX(25, GPOUT_SYS_USB_DRIVE_VBUS, 77 GPOEN_ENABLE, 78 GPI_NONE)>; 79 bias-disable; 80 input-disable; 81 input-schmitt-disable; 82 slew-rate = <0>; 83 }; 84 }; 85}; 86 87&usb0 { 88 dr_mode = "host"; 89 pinctrl-names = "default"; 90 pinctrl-0 = <&usb0_pins>; 91 status = "okay"; 92}; 93 94&usb_cdns3 { 95 phys = <&usbphy0>, <&pciephy0>; 96 phy-names = "cdns3,usb2-phy", "cdns3,usb3-phy"; 97}; 98