1// SPDX-License-Identifier: GPL-2.0 OR MIT 2/* 3 * Copyright (C) 2022 StarFive Technology Co., Ltd. 4 * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> 5 */ 6 7/dts-v1/; 8#include "jh7110.dtsi" 9#include "jh7110-pinfunc.h" 10#include <dt-bindings/gpio/gpio.h> 11 12/ { 13 aliases { 14 ethernet0 = &gmac0; 15 i2c0 = &i2c0; 16 i2c2 = &i2c2; 17 i2c5 = &i2c5; 18 i2c6 = &i2c6; 19 mmc0 = &mmc0; 20 mmc1 = &mmc1; 21 serial0 = &uart0; 22 }; 23 24 chosen { 25 stdout-path = "serial0:115200n8"; 26 }; 27 28 memory@40000000 { 29 device_type = "memory"; 30 reg = <0x0 0x40000000 0x1 0x0>; 31 }; 32 33 gpio-restart { 34 compatible = "gpio-restart"; 35 gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>; 36 priority = <224>; 37 }; 38 39 pwmdac_codec: audio-codec { 40 compatible = "linux,spdif-dit"; 41 #sound-dai-cells = <0>; 42 }; 43 44 sound { 45 compatible = "simple-audio-card"; 46 simple-audio-card,name = "StarFive-PWMDAC-Sound-Card"; 47 #address-cells = <1>; 48 #size-cells = <0>; 49 50 simple-audio-card,dai-link@0 { 51 reg = <0>; 52 format = "left_j"; 53 bitclock-master = <&sndcpu0>; 54 frame-master = <&sndcpu0>; 55 56 sndcpu0: cpu { 57 sound-dai = <&pwmdac>; 58 }; 59 60 codec { 61 sound-dai = <&pwmdac_codec>; 62 }; 63 }; 64 }; 65}; 66 67&cpus { 68 timebase-frequency = <4000000>; 69}; 70 71&dvp_clk { 72 clock-frequency = <74250000>; 73}; 74 75&gmac0_rgmii_rxin { 76 clock-frequency = <125000000>; 77}; 78 79&gmac0_rmii_refin { 80 clock-frequency = <50000000>; 81}; 82 83&gmac1_rgmii_rxin { 84 clock-frequency = <125000000>; 85}; 86 87&gmac1_rmii_refin { 88 clock-frequency = <50000000>; 89}; 90 91&hdmitx0_pixelclk { 92 clock-frequency = <297000000>; 93}; 94 95&i2srx_bclk_ext { 96 clock-frequency = <12288000>; 97}; 98 99&i2srx_lrck_ext { 100 clock-frequency = <192000>; 101}; 102 103&i2stx_bclk_ext { 104 clock-frequency = <12288000>; 105}; 106 107&i2stx_lrck_ext { 108 clock-frequency = <192000>; 109}; 110 111&mclk_ext { 112 clock-frequency = <12288000>; 113}; 114 115&osc { 116 clock-frequency = <24000000>; 117}; 118 119&rtc_osc { 120 clock-frequency = <32768>; 121}; 122 123&tdm_ext { 124 clock-frequency = <49152000>; 125}; 126 127&camss { 128 assigned-clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>, 129 <&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>; 130 assigned-clock-rates = <49500000>, <198000000>; 131 status = "okay"; 132 133 ports { 134 #address-cells = <1>; 135 #size-cells = <0>; 136 137 port@0 { 138 reg = <0>; 139 }; 140 141 port@1 { 142 reg = <1>; 143 144 camss_from_csi2rx: endpoint { 145 remote-endpoint = <&csi2rx_to_camss>; 146 }; 147 }; 148 }; 149}; 150 151&csi2rx { 152 assigned-clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>; 153 assigned-clock-rates = <297000000>; 154 status = "okay"; 155 156 ports { 157 #address-cells = <1>; 158 #size-cells = <0>; 159 160 port@0 { 161 reg = <0>; 162 163 /* remote MIPI sensor endpoint */ 164 }; 165 166 port@1 { 167 reg = <1>; 168 169 csi2rx_to_camss: endpoint { 170 remote-endpoint = <&camss_from_csi2rx>; 171 }; 172 }; 173 }; 174}; 175 176&gmac0 { 177 phy-handle = <&phy0>; 178 phy-mode = "rgmii-id"; 179 status = "okay"; 180 181 mdio { 182 #address-cells = <1>; 183 #size-cells = <0>; 184 compatible = "snps,dwmac-mdio"; 185 186 phy0: ethernet-phy@0 { 187 reg = <0>; 188 }; 189 }; 190}; 191 192&i2c0 { 193 clock-frequency = <100000>; 194 i2c-sda-hold-time-ns = <300>; 195 i2c-sda-falling-time-ns = <510>; 196 i2c-scl-falling-time-ns = <510>; 197 pinctrl-names = "default"; 198 pinctrl-0 = <&i2c0_pins>; 199 status = "okay"; 200}; 201 202&i2c2 { 203 clock-frequency = <100000>; 204 i2c-sda-hold-time-ns = <300>; 205 i2c-sda-falling-time-ns = <510>; 206 i2c-scl-falling-time-ns = <510>; 207 pinctrl-names = "default"; 208 pinctrl-0 = <&i2c2_pins>; 209 status = "okay"; 210}; 211 212&i2c5 { 213 clock-frequency = <100000>; 214 i2c-sda-hold-time-ns = <300>; 215 i2c-sda-falling-time-ns = <510>; 216 i2c-scl-falling-time-ns = <510>; 217 pinctrl-names = "default"; 218 pinctrl-0 = <&i2c5_pins>; 219 status = "okay"; 220 221 axp15060: pmic@36 { 222 compatible = "x-powers,axp15060"; 223 reg = <0x36>; 224 interrupt-controller; 225 #interrupt-cells = <1>; 226 227 regulators { 228 vcc_3v3: dcdc1 { 229 regulator-boot-on; 230 regulator-always-on; 231 regulator-min-microvolt = <3300000>; 232 regulator-max-microvolt = <3300000>; 233 regulator-name = "vcc_3v3"; 234 }; 235 236 vdd_cpu: dcdc2 { 237 regulator-always-on; 238 regulator-min-microvolt = <500000>; 239 regulator-max-microvolt = <1540000>; 240 regulator-name = "vdd-cpu"; 241 }; 242 243 emmc_vdd: aldo4 { 244 regulator-boot-on; 245 regulator-always-on; 246 regulator-min-microvolt = <1800000>; 247 regulator-max-microvolt = <3300000>; 248 regulator-name = "emmc_vdd"; 249 }; 250 }; 251 }; 252}; 253 254&i2c6 { 255 clock-frequency = <100000>; 256 i2c-sda-hold-time-ns = <300>; 257 i2c-sda-falling-time-ns = <510>; 258 i2c-scl-falling-time-ns = <510>; 259 pinctrl-names = "default"; 260 pinctrl-0 = <&i2c6_pins>; 261 status = "okay"; 262}; 263 264&mmc0 { 265 max-frequency = <100000000>; 266 assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; 267 assigned-clock-rates = <50000000>; 268 bus-width = <8>; 269 cap-mmc-highspeed; 270 mmc-ddr-1_8v; 271 mmc-hs200-1_8v; 272 cap-mmc-hw-reset; 273 post-power-on-delay-ms = <200>; 274 pinctrl-names = "default"; 275 pinctrl-0 = <&mmc0_pins>; 276 vmmc-supply = <&vcc_3v3>; 277 vqmmc-supply = <&emmc_vdd>; 278 status = "okay"; 279}; 280 281&mmc1 { 282 max-frequency = <100000000>; 283 assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>; 284 assigned-clock-rates = <50000000>; 285 bus-width = <4>; 286 no-sdio; 287 no-mmc; 288 cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>; 289 disable-wp; 290 cap-sd-highspeed; 291 post-power-on-delay-ms = <200>; 292 pinctrl-names = "default"; 293 pinctrl-0 = <&mmc1_pins>; 294 status = "okay"; 295}; 296 297&pcie0 { 298 perst-gpios = <&sysgpio 26 GPIO_ACTIVE_LOW>; 299 phys = <&pciephy0>; 300 pinctrl-names = "default"; 301 pinctrl-0 = <&pcie0_pins>; 302}; 303 304&pcie1 { 305 perst-gpios = <&sysgpio 28 GPIO_ACTIVE_LOW>; 306 phys = <&pciephy1>; 307 pinctrl-names = "default"; 308 pinctrl-0 = <&pcie1_pins>; 309}; 310 311&pwmdac { 312 pinctrl-names = "default"; 313 pinctrl-0 = <&pwmdac_pins>; 314 status = "okay"; 315}; 316 317&qspi { 318 #address-cells = <1>; 319 #size-cells = <0>; 320 status = "okay"; 321 322 nor_flash: flash@0 { 323 compatible = "jedec,spi-nor"; 324 reg = <0>; 325 cdns,read-delay = <5>; 326 spi-max-frequency = <12000000>; 327 cdns,tshsl-ns = <1>; 328 cdns,tsd2d-ns = <1>; 329 cdns,tchsh-ns = <1>; 330 cdns,tslch-ns = <1>; 331 332 partitions { 333 compatible = "fixed-partitions"; 334 #address-cells = <1>; 335 #size-cells = <1>; 336 337 spl@0 { 338 reg = <0x0 0xf0000>; 339 }; 340 uboot-env@f0000 { 341 reg = <0xf0000 0x10000>; 342 }; 343 uboot@100000 { 344 reg = <0x100000 0xf00000>; 345 }; 346 }; 347 }; 348}; 349 350&pwm { 351 pinctrl-names = "default"; 352 pinctrl-0 = <&pwm_pins>; 353 status = "okay"; 354}; 355 356&spi0 { 357 pinctrl-names = "default"; 358 pinctrl-0 = <&spi0_pins>; 359 status = "okay"; 360 361 spi_dev0: spi@0 { 362 compatible = "rohm,dh2228fv"; 363 reg = <0>; 364 spi-max-frequency = <10000000>; 365 }; 366}; 367 368&syscrg { 369 assigned-clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>, 370 <&pllclk JH7110_PLLCLK_PLL0_OUT>; 371 assigned-clock-rates = <500000000>, <1500000000>; 372}; 373 374&sysgpio { 375 i2c0_pins: i2c0-0 { 376 i2c-pins { 377 pinmux = <GPIOMUX(57, GPOUT_LOW, 378 GPOEN_SYS_I2C0_CLK, 379 GPI_SYS_I2C0_CLK)>, 380 <GPIOMUX(58, GPOUT_LOW, 381 GPOEN_SYS_I2C0_DATA, 382 GPI_SYS_I2C0_DATA)>; 383 bias-disable; /* external pull-up */ 384 input-enable; 385 input-schmitt-enable; 386 }; 387 }; 388 389 i2c2_pins: i2c2-0 { 390 i2c-pins { 391 pinmux = <GPIOMUX(3, GPOUT_LOW, 392 GPOEN_SYS_I2C2_CLK, 393 GPI_SYS_I2C2_CLK)>, 394 <GPIOMUX(2, GPOUT_LOW, 395 GPOEN_SYS_I2C2_DATA, 396 GPI_SYS_I2C2_DATA)>; 397 bias-disable; /* external pull-up */ 398 input-enable; 399 input-schmitt-enable; 400 }; 401 }; 402 403 i2c5_pins: i2c5-0 { 404 i2c-pins { 405 pinmux = <GPIOMUX(19, GPOUT_LOW, 406 GPOEN_SYS_I2C5_CLK, 407 GPI_SYS_I2C5_CLK)>, 408 <GPIOMUX(20, GPOUT_LOW, 409 GPOEN_SYS_I2C5_DATA, 410 GPI_SYS_I2C5_DATA)>; 411 bias-disable; /* external pull-up */ 412 input-enable; 413 input-schmitt-enable; 414 }; 415 }; 416 417 i2c6_pins: i2c6-0 { 418 i2c-pins { 419 pinmux = <GPIOMUX(16, GPOUT_LOW, 420 GPOEN_SYS_I2C6_CLK, 421 GPI_SYS_I2C6_CLK)>, 422 <GPIOMUX(17, GPOUT_LOW, 423 GPOEN_SYS_I2C6_DATA, 424 GPI_SYS_I2C6_DATA)>; 425 bias-disable; /* external pull-up */ 426 input-enable; 427 input-schmitt-enable; 428 }; 429 }; 430 431 mmc0_pins: mmc0-0 { 432 rst-pins { 433 pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST, 434 GPOEN_ENABLE, 435 GPI_NONE)>; 436 bias-pull-up; 437 drive-strength = <12>; 438 input-disable; 439 input-schmitt-disable; 440 slew-rate = <0>; 441 }; 442 443 mmc-pins { 444 pinmux = <PINMUX(64, 0)>, 445 <PINMUX(65, 0)>, 446 <PINMUX(66, 0)>, 447 <PINMUX(67, 0)>, 448 <PINMUX(68, 0)>, 449 <PINMUX(69, 0)>, 450 <PINMUX(70, 0)>, 451 <PINMUX(71, 0)>, 452 <PINMUX(72, 0)>, 453 <PINMUX(73, 0)>; 454 bias-pull-up; 455 drive-strength = <12>; 456 input-enable; 457 }; 458 }; 459 460 mmc1_pins: mmc1-0 { 461 clk-pins { 462 pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK, 463 GPOEN_ENABLE, 464 GPI_NONE)>; 465 bias-pull-up; 466 drive-strength = <12>; 467 input-disable; 468 input-schmitt-disable; 469 slew-rate = <0>; 470 }; 471 472 mmc-pins { 473 pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD, 474 GPOEN_SYS_SDIO1_CMD, 475 GPI_SYS_SDIO1_CMD)>, 476 <GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0, 477 GPOEN_SYS_SDIO1_DATA0, 478 GPI_SYS_SDIO1_DATA0)>, 479 <GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1, 480 GPOEN_SYS_SDIO1_DATA1, 481 GPI_SYS_SDIO1_DATA1)>, 482 <GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2, 483 GPOEN_SYS_SDIO1_DATA2, 484 GPI_SYS_SDIO1_DATA2)>, 485 <GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3, 486 GPOEN_SYS_SDIO1_DATA3, 487 GPI_SYS_SDIO1_DATA3)>; 488 bias-pull-up; 489 drive-strength = <12>; 490 input-enable; 491 input-schmitt-enable; 492 slew-rate = <0>; 493 }; 494 }; 495 496 pcie0_pins: pcie0-0 { 497 clkreq-pins { 498 pinmux = <GPIOMUX(27, GPOUT_LOW, 499 GPOEN_DISABLE, 500 GPI_NONE)>; 501 bias-pull-down; 502 drive-strength = <2>; 503 input-enable; 504 input-schmitt-disable; 505 slew-rate = <0>; 506 }; 507 508 wake-pins { 509 pinmux = <GPIOMUX(32, GPOUT_LOW, 510 GPOEN_DISABLE, 511 GPI_NONE)>; 512 bias-pull-up; 513 drive-strength = <2>; 514 input-enable; 515 input-schmitt-disable; 516 slew-rate = <0>; 517 }; 518 }; 519 520 pcie1_pins: pcie1-0 { 521 clkreq-pins { 522 pinmux = <GPIOMUX(29, GPOUT_LOW, 523 GPOEN_DISABLE, 524 GPI_NONE)>; 525 bias-pull-down; 526 drive-strength = <2>; 527 input-enable; 528 input-schmitt-disable; 529 slew-rate = <0>; 530 }; 531 532 wake-pins { 533 pinmux = <GPIOMUX(21, GPOUT_LOW, 534 GPOEN_DISABLE, 535 GPI_NONE)>; 536 bias-pull-up; 537 drive-strength = <2>; 538 input-enable; 539 input-schmitt-disable; 540 slew-rate = <0>; 541 }; 542 }; 543 544 pwmdac_pins: pwmdac-0 { 545 pwmdac-pins { 546 pinmux = <GPIOMUX(33, GPOUT_SYS_PWMDAC_LEFT, 547 GPOEN_ENABLE, 548 GPI_NONE)>, 549 <GPIOMUX(34, GPOUT_SYS_PWMDAC_RIGHT, 550 GPOEN_ENABLE, 551 GPI_NONE)>; 552 bias-disable; 553 drive-strength = <2>; 554 input-disable; 555 input-schmitt-disable; 556 slew-rate = <0>; 557 }; 558 }; 559 560 pwm_pins: pwm-0 { 561 pwm-pins { 562 pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0, 563 GPOEN_SYS_PWM0_CHANNEL0, 564 GPI_NONE)>, 565 <GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1, 566 GPOEN_SYS_PWM0_CHANNEL1, 567 GPI_NONE)>; 568 bias-disable; 569 drive-strength = <12>; 570 input-disable; 571 input-schmitt-disable; 572 slew-rate = <0>; 573 }; 574 }; 575 576 spi0_pins: spi0-0 { 577 mosi-pins { 578 pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD, 579 GPOEN_ENABLE, 580 GPI_NONE)>; 581 bias-disable; 582 input-disable; 583 input-schmitt-disable; 584 }; 585 586 miso-pins { 587 pinmux = <GPIOMUX(53, GPOUT_LOW, 588 GPOEN_DISABLE, 589 GPI_SYS_SPI0_RXD)>; 590 bias-pull-up; 591 input-enable; 592 input-schmitt-enable; 593 }; 594 595 sck-pins { 596 pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK, 597 GPOEN_ENABLE, 598 GPI_SYS_SPI0_CLK)>; 599 bias-disable; 600 input-disable; 601 input-schmitt-disable; 602 }; 603 604 ss-pins { 605 pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS, 606 GPOEN_ENABLE, 607 GPI_SYS_SPI0_FSS)>; 608 bias-disable; 609 input-disable; 610 input-schmitt-disable; 611 }; 612 }; 613 614 uart0_pins: uart0-0 { 615 tx-pins { 616 pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX, 617 GPOEN_ENABLE, 618 GPI_NONE)>; 619 bias-disable; 620 drive-strength = <12>; 621 input-disable; 622 input-schmitt-disable; 623 slew-rate = <0>; 624 }; 625 626 rx-pins { 627 pinmux = <GPIOMUX(6, GPOUT_LOW, 628 GPOEN_DISABLE, 629 GPI_SYS_UART0_RX)>; 630 bias-disable; /* external pull-up */ 631 drive-strength = <2>; 632 input-enable; 633 input-schmitt-enable; 634 slew-rate = <0>; 635 }; 636 }; 637}; 638 639&uart0 { 640 pinctrl-names = "default"; 641 pinctrl-0 = <&uart0_pins>; 642 status = "okay"; 643}; 644 645&usb0 { 646 dr_mode = "peripheral"; 647 status = "okay"; 648}; 649 650&U74_1 { 651 cpu-supply = <&vdd_cpu>; 652}; 653 654&U74_2 { 655 cpu-supply = <&vdd_cpu>; 656}; 657 658&U74_3 { 659 cpu-supply = <&vdd_cpu>; 660}; 661 662&U74_4 { 663 cpu-supply = <&vdd_cpu>; 664}; 665