1// SPDX-License-Identifier: GPL-2.0 OR MIT 2/* 3 * Copyright (C) 2022 StarFive Technology Co., Ltd. 4 * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> 5 */ 6 7/dts-v1/; 8#include "jh7110.dtsi" 9#include "jh7110-pinfunc.h" 10#include <dt-bindings/gpio/gpio.h> 11 12/ { 13 aliases { 14 ethernet0 = &gmac0; 15 i2c0 = &i2c0; 16 i2c2 = &i2c2; 17 i2c5 = &i2c5; 18 i2c6 = &i2c6; 19 mmc0 = &mmc0; 20 mmc1 = &mmc1; 21 serial0 = &uart0; 22 }; 23 24 chosen { 25 stdout-path = "serial0:115200n8"; 26 }; 27 28 memory@40000000 { 29 device_type = "memory"; 30 reg = <0x0 0x40000000 0x1 0x0>; 31 }; 32 33 gpio-restart { 34 compatible = "gpio-restart"; 35 gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>; 36 priority = <224>; 37 }; 38 39 pwmdac_codec: audio-codec { 40 compatible = "linux,spdif-dit"; 41 #sound-dai-cells = <0>; 42 }; 43 44 sound { 45 compatible = "simple-audio-card"; 46 simple-audio-card,name = "StarFive-PWMDAC-Sound-Card"; 47 #address-cells = <1>; 48 #size-cells = <0>; 49 50 simple-audio-card,dai-link@0 { 51 reg = <0>; 52 format = "left_j"; 53 bitclock-master = <&sndcpu0>; 54 frame-master = <&sndcpu0>; 55 56 sndcpu0: cpu { 57 sound-dai = <&pwmdac>; 58 }; 59 60 codec { 61 sound-dai = <&pwmdac_codec>; 62 }; 63 }; 64 }; 65}; 66 67&cpus { 68 timebase-frequency = <4000000>; 69}; 70 71&dvp_clk { 72 clock-frequency = <74250000>; 73}; 74 75&gmac0_rgmii_rxin { 76 clock-frequency = <125000000>; 77}; 78 79&gmac0_rmii_refin { 80 clock-frequency = <50000000>; 81}; 82 83&gmac1_rgmii_rxin { 84 clock-frequency = <125000000>; 85}; 86 87&gmac1_rmii_refin { 88 clock-frequency = <50000000>; 89}; 90 91&hdmitx0_pixelclk { 92 clock-frequency = <297000000>; 93}; 94 95&i2srx_bclk_ext { 96 clock-frequency = <12288000>; 97}; 98 99&i2srx_lrck_ext { 100 clock-frequency = <192000>; 101}; 102 103&i2stx_bclk_ext { 104 clock-frequency = <12288000>; 105}; 106 107&i2stx_lrck_ext { 108 clock-frequency = <192000>; 109}; 110 111&mclk_ext { 112 clock-frequency = <12288000>; 113}; 114 115&osc { 116 clock-frequency = <24000000>; 117}; 118 119&rtc_osc { 120 clock-frequency = <32768>; 121}; 122 123&tdm_ext { 124 clock-frequency = <49152000>; 125}; 126 127&camss { 128 assigned-clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>, 129 <&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>; 130 assigned-clock-rates = <49500000>, <198000000>; 131 132 ports { 133 #address-cells = <1>; 134 #size-cells = <0>; 135 136 port@0 { 137 reg = <0>; 138 }; 139 140 port@1 { 141 reg = <1>; 142 143 camss_from_csi2rx: endpoint { 144 remote-endpoint = <&csi2rx_to_camss>; 145 }; 146 }; 147 }; 148}; 149 150&csi2rx { 151 assigned-clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>; 152 assigned-clock-rates = <297000000>; 153 154 ports { 155 #address-cells = <1>; 156 #size-cells = <0>; 157 158 port@0 { 159 reg = <0>; 160 161 /* remote MIPI sensor endpoint */ 162 }; 163 164 port@1 { 165 reg = <1>; 166 167 csi2rx_to_camss: endpoint { 168 remote-endpoint = <&camss_from_csi2rx>; 169 }; 170 }; 171 }; 172}; 173 174&gmac0 { 175 phy-handle = <&phy0>; 176 phy-mode = "rgmii-id"; 177 178 mdio { 179 #address-cells = <1>; 180 #size-cells = <0>; 181 compatible = "snps,dwmac-mdio"; 182 183 phy0: ethernet-phy@0 { 184 reg = <0>; 185 }; 186 }; 187}; 188 189&i2c0 { 190 clock-frequency = <100000>; 191 i2c-sda-hold-time-ns = <300>; 192 i2c-sda-falling-time-ns = <510>; 193 i2c-scl-falling-time-ns = <510>; 194 pinctrl-names = "default"; 195 pinctrl-0 = <&i2c0_pins>; 196}; 197 198&i2c2 { 199 clock-frequency = <100000>; 200 i2c-sda-hold-time-ns = <300>; 201 i2c-sda-falling-time-ns = <510>; 202 i2c-scl-falling-time-ns = <510>; 203 pinctrl-names = "default"; 204 pinctrl-0 = <&i2c2_pins>; 205 status = "okay"; 206}; 207 208&i2c5 { 209 clock-frequency = <100000>; 210 i2c-sda-hold-time-ns = <300>; 211 i2c-sda-falling-time-ns = <510>; 212 i2c-scl-falling-time-ns = <510>; 213 pinctrl-names = "default"; 214 pinctrl-0 = <&i2c5_pins>; 215 status = "okay"; 216 217 axp15060: pmic@36 { 218 compatible = "x-powers,axp15060"; 219 reg = <0x36>; 220 interrupt-controller; 221 #interrupt-cells = <1>; 222 223 regulators { 224 vcc_3v3: dcdc1 { 225 regulator-boot-on; 226 regulator-always-on; 227 regulator-min-microvolt = <3300000>; 228 regulator-max-microvolt = <3300000>; 229 regulator-name = "vcc_3v3"; 230 }; 231 232 vdd_cpu: dcdc2 { 233 regulator-always-on; 234 regulator-min-microvolt = <500000>; 235 regulator-max-microvolt = <1540000>; 236 regulator-name = "vdd-cpu"; 237 }; 238 239 emmc_vdd: aldo4 { 240 regulator-boot-on; 241 regulator-always-on; 242 regulator-min-microvolt = <1800000>; 243 regulator-max-microvolt = <3300000>; 244 regulator-name = "emmc_vdd"; 245 }; 246 }; 247 }; 248}; 249 250&i2c6 { 251 clock-frequency = <100000>; 252 i2c-sda-hold-time-ns = <300>; 253 i2c-sda-falling-time-ns = <510>; 254 i2c-scl-falling-time-ns = <510>; 255 pinctrl-names = "default"; 256 pinctrl-0 = <&i2c6_pins>; 257 status = "okay"; 258}; 259 260&mmc0 { 261 max-frequency = <100000000>; 262 assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; 263 assigned-clock-rates = <50000000>; 264 bus-width = <8>; 265 cap-mmc-highspeed; 266 mmc-ddr-1_8v; 267 mmc-hs200-1_8v; 268 cap-mmc-hw-reset; 269 post-power-on-delay-ms = <200>; 270 pinctrl-names = "default"; 271 pinctrl-0 = <&mmc0_pins>; 272 vmmc-supply = <&vcc_3v3>; 273 vqmmc-supply = <&emmc_vdd>; 274 status = "okay"; 275}; 276 277&mmc1 { 278 max-frequency = <100000000>; 279 assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>; 280 assigned-clock-rates = <50000000>; 281 bus-width = <4>; 282 no-sdio; 283 no-mmc; 284 cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>; 285 disable-wp; 286 cap-sd-highspeed; 287 post-power-on-delay-ms = <200>; 288 pinctrl-names = "default"; 289 pinctrl-0 = <&mmc1_pins>; 290 status = "okay"; 291}; 292 293&pcie0 { 294 perst-gpios = <&sysgpio 26 GPIO_ACTIVE_LOW>; 295 phys = <&pciephy0>; 296 pinctrl-names = "default"; 297 pinctrl-0 = <&pcie0_pins>; 298}; 299 300&pcie1 { 301 perst-gpios = <&sysgpio 28 GPIO_ACTIVE_LOW>; 302 phys = <&pciephy1>; 303 pinctrl-names = "default"; 304 pinctrl-0 = <&pcie1_pins>; 305}; 306 307&pwmdac { 308 pinctrl-names = "default"; 309 pinctrl-0 = <&pwmdac_pins>; 310}; 311 312&qspi { 313 #address-cells = <1>; 314 #size-cells = <0>; 315 status = "okay"; 316 317 nor_flash: flash@0 { 318 compatible = "jedec,spi-nor"; 319 reg = <0>; 320 cdns,read-delay = <5>; 321 spi-max-frequency = <12000000>; 322 cdns,tshsl-ns = <1>; 323 cdns,tsd2d-ns = <1>; 324 cdns,tchsh-ns = <1>; 325 cdns,tslch-ns = <1>; 326 327 partitions { 328 compatible = "fixed-partitions"; 329 #address-cells = <1>; 330 #size-cells = <1>; 331 332 spl@0 { 333 reg = <0x0 0xf0000>; 334 }; 335 uboot-env@f0000 { 336 reg = <0xf0000 0x10000>; 337 }; 338 uboot@100000 { 339 reg = <0x100000 0xf00000>; 340 }; 341 }; 342 }; 343}; 344 345&pwm { 346 pinctrl-names = "default"; 347 pinctrl-0 = <&pwm_pins>; 348}; 349 350&spi0 { 351 pinctrl-names = "default"; 352 pinctrl-0 = <&spi0_pins>; 353 354 spi_dev0: spi@0 { 355 compatible = "rohm,dh2228fv"; 356 reg = <0>; 357 spi-max-frequency = <10000000>; 358 }; 359}; 360 361&syscrg { 362 assigned-clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>, 363 <&pllclk JH7110_PLLCLK_PLL0_OUT>; 364 assigned-clock-rates = <500000000>, <1500000000>; 365}; 366 367&sysgpio { 368 i2c0_pins: i2c0-0 { 369 i2c-pins { 370 pinmux = <GPIOMUX(57, GPOUT_LOW, 371 GPOEN_SYS_I2C0_CLK, 372 GPI_SYS_I2C0_CLK)>, 373 <GPIOMUX(58, GPOUT_LOW, 374 GPOEN_SYS_I2C0_DATA, 375 GPI_SYS_I2C0_DATA)>; 376 bias-disable; /* external pull-up */ 377 input-enable; 378 input-schmitt-enable; 379 }; 380 }; 381 382 i2c2_pins: i2c2-0 { 383 i2c-pins { 384 pinmux = <GPIOMUX(3, GPOUT_LOW, 385 GPOEN_SYS_I2C2_CLK, 386 GPI_SYS_I2C2_CLK)>, 387 <GPIOMUX(2, GPOUT_LOW, 388 GPOEN_SYS_I2C2_DATA, 389 GPI_SYS_I2C2_DATA)>; 390 bias-disable; /* external pull-up */ 391 input-enable; 392 input-schmitt-enable; 393 }; 394 }; 395 396 i2c5_pins: i2c5-0 { 397 i2c-pins { 398 pinmux = <GPIOMUX(19, GPOUT_LOW, 399 GPOEN_SYS_I2C5_CLK, 400 GPI_SYS_I2C5_CLK)>, 401 <GPIOMUX(20, GPOUT_LOW, 402 GPOEN_SYS_I2C5_DATA, 403 GPI_SYS_I2C5_DATA)>; 404 bias-disable; /* external pull-up */ 405 input-enable; 406 input-schmitt-enable; 407 }; 408 }; 409 410 i2c6_pins: i2c6-0 { 411 i2c-pins { 412 pinmux = <GPIOMUX(16, GPOUT_LOW, 413 GPOEN_SYS_I2C6_CLK, 414 GPI_SYS_I2C6_CLK)>, 415 <GPIOMUX(17, GPOUT_LOW, 416 GPOEN_SYS_I2C6_DATA, 417 GPI_SYS_I2C6_DATA)>; 418 bias-disable; /* external pull-up */ 419 input-enable; 420 input-schmitt-enable; 421 }; 422 }; 423 424 mmc0_pins: mmc0-0 { 425 rst-pins { 426 pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST, 427 GPOEN_ENABLE, 428 GPI_NONE)>; 429 bias-pull-up; 430 drive-strength = <12>; 431 input-disable; 432 input-schmitt-disable; 433 slew-rate = <0>; 434 }; 435 436 mmc-pins { 437 pinmux = <PINMUX(64, 0)>, 438 <PINMUX(65, 0)>, 439 <PINMUX(66, 0)>, 440 <PINMUX(67, 0)>, 441 <PINMUX(68, 0)>, 442 <PINMUX(69, 0)>, 443 <PINMUX(70, 0)>, 444 <PINMUX(71, 0)>, 445 <PINMUX(72, 0)>, 446 <PINMUX(73, 0)>; 447 bias-pull-up; 448 drive-strength = <12>; 449 input-enable; 450 }; 451 }; 452 453 mmc1_pins: mmc1-0 { 454 clk-pins { 455 pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK, 456 GPOEN_ENABLE, 457 GPI_NONE)>; 458 bias-pull-up; 459 drive-strength = <12>; 460 input-disable; 461 input-schmitt-disable; 462 slew-rate = <0>; 463 }; 464 465 mmc-pins { 466 pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD, 467 GPOEN_SYS_SDIO1_CMD, 468 GPI_SYS_SDIO1_CMD)>, 469 <GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0, 470 GPOEN_SYS_SDIO1_DATA0, 471 GPI_SYS_SDIO1_DATA0)>, 472 <GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1, 473 GPOEN_SYS_SDIO1_DATA1, 474 GPI_SYS_SDIO1_DATA1)>, 475 <GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2, 476 GPOEN_SYS_SDIO1_DATA2, 477 GPI_SYS_SDIO1_DATA2)>, 478 <GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3, 479 GPOEN_SYS_SDIO1_DATA3, 480 GPI_SYS_SDIO1_DATA3)>; 481 bias-pull-up; 482 drive-strength = <12>; 483 input-enable; 484 input-schmitt-enable; 485 slew-rate = <0>; 486 }; 487 }; 488 489 pcie0_pins: pcie0-0 { 490 clkreq-pins { 491 pinmux = <GPIOMUX(27, GPOUT_LOW, 492 GPOEN_DISABLE, 493 GPI_NONE)>; 494 bias-pull-down; 495 drive-strength = <2>; 496 input-enable; 497 input-schmitt-disable; 498 slew-rate = <0>; 499 }; 500 501 wake-pins { 502 pinmux = <GPIOMUX(32, GPOUT_LOW, 503 GPOEN_DISABLE, 504 GPI_NONE)>; 505 bias-pull-up; 506 drive-strength = <2>; 507 input-enable; 508 input-schmitt-disable; 509 slew-rate = <0>; 510 }; 511 }; 512 513 pcie1_pins: pcie1-0 { 514 clkreq-pins { 515 pinmux = <GPIOMUX(29, GPOUT_LOW, 516 GPOEN_DISABLE, 517 GPI_NONE)>; 518 bias-pull-down; 519 drive-strength = <2>; 520 input-enable; 521 input-schmitt-disable; 522 slew-rate = <0>; 523 }; 524 525 wake-pins { 526 pinmux = <GPIOMUX(21, GPOUT_LOW, 527 GPOEN_DISABLE, 528 GPI_NONE)>; 529 bias-pull-up; 530 drive-strength = <2>; 531 input-enable; 532 input-schmitt-disable; 533 slew-rate = <0>; 534 }; 535 }; 536 537 pwmdac_pins: pwmdac-0 { 538 pwmdac-pins { 539 pinmux = <GPIOMUX(33, GPOUT_SYS_PWMDAC_LEFT, 540 GPOEN_ENABLE, 541 GPI_NONE)>, 542 <GPIOMUX(34, GPOUT_SYS_PWMDAC_RIGHT, 543 GPOEN_ENABLE, 544 GPI_NONE)>; 545 bias-disable; 546 drive-strength = <2>; 547 input-disable; 548 input-schmitt-disable; 549 slew-rate = <0>; 550 }; 551 }; 552 553 pwm_pins: pwm-0 { 554 pwm-pins { 555 pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0, 556 GPOEN_SYS_PWM0_CHANNEL0, 557 GPI_NONE)>, 558 <GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1, 559 GPOEN_SYS_PWM0_CHANNEL1, 560 GPI_NONE)>; 561 bias-disable; 562 drive-strength = <12>; 563 input-disable; 564 input-schmitt-disable; 565 slew-rate = <0>; 566 }; 567 }; 568 569 spi0_pins: spi0-0 { 570 mosi-pins { 571 pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD, 572 GPOEN_ENABLE, 573 GPI_NONE)>; 574 bias-disable; 575 input-disable; 576 input-schmitt-disable; 577 }; 578 579 miso-pins { 580 pinmux = <GPIOMUX(53, GPOUT_LOW, 581 GPOEN_DISABLE, 582 GPI_SYS_SPI0_RXD)>; 583 bias-pull-up; 584 input-enable; 585 input-schmitt-enable; 586 }; 587 588 sck-pins { 589 pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK, 590 GPOEN_ENABLE, 591 GPI_SYS_SPI0_CLK)>; 592 bias-disable; 593 input-disable; 594 input-schmitt-disable; 595 }; 596 597 ss-pins { 598 pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS, 599 GPOEN_ENABLE, 600 GPI_SYS_SPI0_FSS)>; 601 bias-disable; 602 input-disable; 603 input-schmitt-disable; 604 }; 605 }; 606 607 uart0_pins: uart0-0 { 608 tx-pins { 609 pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX, 610 GPOEN_ENABLE, 611 GPI_NONE)>; 612 bias-disable; 613 drive-strength = <12>; 614 input-disable; 615 input-schmitt-disable; 616 slew-rate = <0>; 617 }; 618 619 rx-pins { 620 pinmux = <GPIOMUX(6, GPOUT_LOW, 621 GPOEN_DISABLE, 622 GPI_SYS_UART0_RX)>; 623 bias-disable; /* external pull-up */ 624 drive-strength = <2>; 625 input-enable; 626 input-schmitt-enable; 627 slew-rate = <0>; 628 }; 629 }; 630}; 631 632&uart0 { 633 pinctrl-names = "default"; 634 pinctrl-0 = <&uart0_pins>; 635 status = "okay"; 636}; 637 638&U74_1 { 639 cpu-supply = <&vdd_cpu>; 640}; 641 642&U74_2 { 643 cpu-supply = <&vdd_cpu>; 644}; 645 646&U74_3 { 647 cpu-supply = <&vdd_cpu>; 648}; 649 650&U74_4 { 651 cpu-supply = <&vdd_cpu>; 652}; 653